2 * Celleb/Beat Interrupt controller
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/percpu.h>
25 #include <linux/types.h>
27 #include <asm/machdep.h>
29 #include "beat_interrupt.h"
30 #include "beat_wrapper.h"
32 #define MAX_IRQS NR_IRQS
33 static DEFINE_SPINLOCK(beatic_irq_mask_lock);
34 static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64];
35 static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64];
37 static struct irq_host *beatic_host;
40 * In this implementation, "virq" == "IRQ plug number",
41 * "(irq_hw_number_t)hwirq" == "IRQ outlet number".
44 /* assumption: locked */
45 static inline void beatic_update_irq_mask(unsigned int irq_plug)
48 unsigned long masks[4];
50 off = (irq_plug / 256) * 4;
51 masks[0] = beatic_irq_mask_enable[off + 0]
52 & beatic_irq_mask_ack[off + 0];
53 masks[1] = beatic_irq_mask_enable[off + 1]
54 & beatic_irq_mask_ack[off + 1];
55 masks[2] = beatic_irq_mask_enable[off + 2]
56 & beatic_irq_mask_ack[off + 2];
57 masks[3] = beatic_irq_mask_enable[off + 3]
58 & beatic_irq_mask_ack[off + 3];
59 if (beat_set_interrupt_mask(irq_plug&~255UL,
60 masks[0], masks[1], masks[2], masks[3]) != 0)
61 panic("Failed to set mask IRQ!");
64 static void beatic_mask_irq(unsigned int irq_plug)
68 spin_lock_irqsave(&beatic_irq_mask_lock, flags);
69 beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
70 beatic_update_irq_mask(irq_plug);
71 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
74 static void beatic_unmask_irq(unsigned int irq_plug)
78 spin_lock_irqsave(&beatic_irq_mask_lock, flags);
79 beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
80 beatic_update_irq_mask(irq_plug);
81 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
84 static void beatic_ack_irq(unsigned int irq_plug)
88 spin_lock_irqsave(&beatic_irq_mask_lock, flags);
89 beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
90 beatic_update_irq_mask(irq_plug);
91 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
94 static void beatic_end_irq(unsigned int irq_plug)
99 err = beat_downcount_of_interrupt(irq_plug);
101 if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */
102 panic("Failed to downcount IRQ! Error = %16llx", err);
104 printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug);
106 spin_lock_irqsave(&beatic_irq_mask_lock, flags);
107 beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
108 beatic_update_irq_mask(irq_plug);
109 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
112 static struct irq_chip beatic_pic = {
113 .typename = " CELL-BEAT ",
114 .unmask = beatic_unmask_irq,
115 .mask = beatic_mask_irq,
116 .eoi = beatic_end_irq,
120 * Dispose binding hardware IRQ number (hw) and Virtuql IRQ number (virq),
123 * Note that the number (virq) is already assigned at upper layer.
125 static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
127 beat_destruct_irq_plug(virq);
131 * Create or update binding hardware IRQ number (hw) and Virtuql
132 * IRQ number (virq). This is called only once for a given mapping.
134 * Note that the number (virq) is already assigned at upper layer.
136 static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
139 struct irq_desc *desc = get_irq_desc(virq);
142 err = beat_construct_and_connect_irq_plug(virq, hw);
146 desc->status |= IRQ_LEVEL;
147 set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
152 * Update binding hardware IRQ number (hw) and Virtuql
153 * IRQ number (virq). This is called only once for a given mapping.
155 static void beatic_pic_host_remap(struct irq_host *h, unsigned int virq,
158 beat_construct_and_connect_irq_plug(virq, hw);
162 * Translate device-tree interrupt spec to irq_hw_number_t style (ulong),
163 * to pass away to irq_create_mapping().
165 * Called from irq_create_of_mapping() only.
166 * Note: We have only 1 entry to translate.
168 static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct,
169 u32 *intspec, unsigned int intsize,
170 irq_hw_number_t *out_hwirq,
171 unsigned int *out_flags)
173 u64 *intspec2 = (u64 *)intspec;
175 *out_hwirq = *intspec2;
176 *out_flags |= IRQ_TYPE_LEVEL_LOW;
180 static int beatic_pic_host_match(struct irq_host *h, struct device_node *np)
186 static struct irq_host_ops beatic_pic_host_ops = {
187 .map = beatic_pic_host_map,
188 .remap = beatic_pic_host_remap,
189 .unmap = beatic_pic_host_unmap,
190 .xlate = beatic_pic_host_xlate,
191 .match = beatic_pic_host_match,
198 static inline unsigned int beatic_get_irq_plug(void)
201 uint64_t pending[4], ub;
203 for (i = 0; i < MAX_IRQS; i += 256) {
204 beat_detect_pending_interrupts(i, pending);
205 __asm__ ("cntlzd %0,%1":"=r"(ub):
206 "r"(pending[0] & beatic_irq_mask_enable[i/64+0]
207 & beatic_irq_mask_ack[i/64+0]));
210 __asm__ ("cntlzd %0,%1":"=r"(ub):
211 "r"(pending[1] & beatic_irq_mask_enable[i/64+1]
212 & beatic_irq_mask_ack[i/64+1]));
215 __asm__ ("cntlzd %0,%1":"=r"(ub):
216 "r"(pending[2] & beatic_irq_mask_enable[i/64+2]
217 & beatic_irq_mask_ack[i/64+2]));
220 __asm__ ("cntlzd %0,%1":"=r"(ub):
221 "r"(pending[3] & beatic_irq_mask_enable[i/64+3]
222 & beatic_irq_mask_ack[i/64+3]));
229 unsigned int beatic_get_irq(void)
233 ret = beatic_get_irq_plug();
241 void __init beatic_init_IRQ(void)
245 memset(beatic_irq_mask_enable, 0, sizeof(beatic_irq_mask_enable));
246 memset(beatic_irq_mask_ack, 255, sizeof(beatic_irq_mask_ack));
247 for (i = 0; i < MAX_IRQS; i += 256)
248 beat_set_interrupt_mask(i, 0L, 0L, 0L, 0L);
250 /* Set out get_irq function */
251 ppc_md.get_irq = beatic_get_irq;
253 /* Allocate an irq host */
254 beatic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
255 &beatic_pic_host_ops,
257 BUG_ON(beatic_host == NULL);
258 irq_set_default_host(beatic_host);
263 /* Nullified to compile with SMP mode */
264 void beatic_setup_cpu(int cpu)
268 void beatic_cause_IPI(int cpu, int mesg)
272 void beatic_request_IPIs(void)
275 #endif /* CONFIG_SMP */
277 void beatic_deinit_IRQ(void)
281 for (i = 1; i < NR_IRQS; i++)
282 beat_destruct_irq_plug(i);