2 * jmb38x_ms.c - JMicron jmb38x MemoryStick card reader
4 * Copyright (C) 2008 Alex Dubov <oakad@yahoo.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
12 #include <linux/spinlock.h>
13 #include <linux/interrupt.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/delay.h>
17 #include <linux/highmem.h>
18 #include <linux/memstick.h>
20 #define DRIVER_NAME "jmb38x_ms"
23 module_param(no_dma, bool, 0644);
36 INT_STATUS_ENABLE = 0x28,
37 INT_SIGNAL_ENABLE = 0x2c,
40 PAD_OUTPUT_ENABLE = 0x38,
49 struct jmb38x_ms_host {
50 struct jmb38x_ms *chip;
54 char host_id[DEVICE_ID_SIZE];
56 unsigned int block_pos;
57 unsigned long timeout_jiffies;
58 struct timer_list timer;
59 struct memstick_request *req;
60 unsigned char eject:1,
62 unsigned char cmd_flags;
64 unsigned int io_word[2];
70 struct memstick_host *hosts[];
73 #define BLOCK_COUNT_MASK 0xffff0000
74 #define BLOCK_SIZE_MASK 0x00000fff
76 #define DMA_CONTROL_ENABLE 0x00000001
78 #define TPC_DATA_SEL 0x00008000
79 #define TPC_DIR 0x00004000
80 #define TPC_WAIT_INT 0x00002000
81 #define TPC_GET_INT 0x00000800
82 #define TPC_CODE_SZ_MASK 0x00000700
83 #define TPC_DATA_SZ_MASK 0x00000007
85 #define HOST_CONTROL_RESET_REQ 0x00008000
86 #define HOST_CONTROL_REI 0x00004000
87 #define HOST_CONTROL_LED 0x00000400
88 #define HOST_CONTROL_FAST_CLK 0x00000200
89 #define HOST_CONTROL_RESET 0x00000100
90 #define HOST_CONTROL_POWER_EN 0x00000080
91 #define HOST_CONTROL_CLOCK_EN 0x00000040
92 #define HOST_CONTROL_IF_SHIFT 4
94 #define HOST_CONTROL_IF_SERIAL 0x0
95 #define HOST_CONTROL_IF_PAR4 0x1
96 #define HOST_CONTROL_IF_PAR8 0x3
98 #define STATUS_HAS_MEDIA 0x00000400
99 #define STATUS_FIFO_EMPTY 0x00000200
100 #define STATUS_FIFO_FULL 0x00000100
102 #define INT_STATUS_TPC_ERR 0x00080000
103 #define INT_STATUS_CRC_ERR 0x00040000
104 #define INT_STATUS_TIMER_TO 0x00020000
105 #define INT_STATUS_HSK_TO 0x00010000
106 #define INT_STATUS_ANY_ERR 0x00008000
107 #define INT_STATUS_FIFO_WRDY 0x00000080
108 #define INT_STATUS_FIFO_RRDY 0x00000040
109 #define INT_STATUS_MEDIA_OUT 0x00000010
110 #define INT_STATUS_MEDIA_IN 0x00000008
111 #define INT_STATUS_DMA_BOUNDARY 0x00000004
112 #define INT_STATUS_EOTRAN 0x00000002
113 #define INT_STATUS_EOTPC 0x00000001
115 #define INT_STATUS_ALL 0x000f801f
117 #define PAD_OUTPUT_ENABLE_MS 0x0F3F
119 #define PAD_PU_PD_OFF 0x7FFF0000
120 #define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000
121 #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000
130 static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host,
131 unsigned char *buf, unsigned int length)
133 unsigned int off = 0;
135 while (host->io_pos && length) {
136 buf[off++] = host->io_word[0] & 0xff;
137 host->io_word[0] >>= 8;
145 while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
148 *(unsigned int *)(buf + off) = __raw_readl(host->addr + DATA);
154 && !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
155 host->io_word[0] = readl(host->addr + DATA);
156 for (host->io_pos = 4; host->io_pos; --host->io_pos) {
157 buf[off++] = host->io_word[0] & 0xff;
158 host->io_word[0] >>= 8;
168 static unsigned int jmb38x_ms_read_reg_data(struct jmb38x_ms_host *host,
172 unsigned int off = 0;
174 while (host->io_pos > 4 && length) {
175 buf[off++] = host->io_word[0] & 0xff;
176 host->io_word[0] >>= 8;
184 while (host->io_pos && length) {
185 buf[off++] = host->io_word[1] & 0xff;
186 host->io_word[1] >>= 8;
194 static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host,
198 unsigned int off = 0;
201 while (host->io_pos < 4 && length) {
202 host->io_word[0] |= buf[off++] << (host->io_pos * 8);
208 if (host->io_pos == 4
209 && !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
210 writel(host->io_word[0], host->addr + DATA);
212 host->io_word[0] = 0;
213 } else if (host->io_pos) {
220 while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
224 __raw_writel(*(unsigned int *)(buf + off),
232 host->io_word[0] |= buf[off + 2] << 16;
235 host->io_word[0] |= buf[off + 1] << 8;
238 host->io_word[0] |= buf[off];
247 static unsigned int jmb38x_ms_write_reg_data(struct jmb38x_ms_host *host,
251 unsigned int off = 0;
253 while (host->io_pos < 4 && length) {
254 host->io_word[0] &= ~(0xff << (host->io_pos * 8));
255 host->io_word[0] |= buf[off++] << (host->io_pos * 8);
263 while (host->io_pos < 8 && length) {
264 host->io_word[1] &= ~(0xff << (host->io_pos * 8));
265 host->io_word[1] |= buf[off++] << (host->io_pos * 8);
273 static int jmb38x_ms_transfer_data(struct jmb38x_ms_host *host)
277 unsigned int t_size, p_off, p_cnt;
280 unsigned long flags = 0;
282 if (host->req->long_data) {
283 length = host->req->sg.length - host->block_pos;
284 off = host->req->sg.offset + host->block_pos;
286 length = host->req->data_len - host->block_pos;
291 if (host->req->long_data) {
292 pg = nth_page(sg_page(&host->req->sg),
294 p_off = offset_in_page(off);
295 p_cnt = PAGE_SIZE - p_off;
296 p_cnt = min(p_cnt, length);
298 local_irq_save(flags);
299 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
301 buf = host->req->data + host->block_pos;
302 p_cnt = host->req->data_len - host->block_pos;
305 if (host->req->data_dir == WRITE)
306 t_size = !(host->cmd_flags & REG_DATA)
307 ? jmb38x_ms_write_data(host, buf, p_cnt)
308 : jmb38x_ms_write_reg_data(host, buf, p_cnt);
310 t_size = !(host->cmd_flags & REG_DATA)
311 ? jmb38x_ms_read_data(host, buf, p_cnt)
312 : jmb38x_ms_read_reg_data(host, buf, p_cnt);
314 if (host->req->long_data) {
315 kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
316 local_irq_restore(flags);
321 host->block_pos += t_size;
326 if (!length && host->req->data_dir == WRITE) {
327 if (host->cmd_flags & REG_DATA) {
328 writel(host->io_word[0], host->addr + TPC_P0);
329 writel(host->io_word[1], host->addr + TPC_P1);
330 } else if (host->io_pos) {
331 writel(host->io_word[0], host->addr + DATA);
338 static int jmb38x_ms_issue_cmd(struct memstick_host *msh)
340 struct jmb38x_ms_host *host = memstick_priv(msh);
342 unsigned int data_len, cmd, t_val;
344 if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) {
345 dev_dbg(msh->cdev.dev, "no media status\n");
346 host->req->error = -ETIME;
347 return host->req->error;
350 dev_dbg(msh->cdev.dev, "control %08x\n",
351 readl(host->addr + HOST_CONTROL));
352 dev_dbg(msh->cdev.dev, "status %08x\n", readl(host->addr + INT_STATUS));
353 dev_dbg(msh->cdev.dev, "hstatus %08x\n", readl(host->addr + STATUS));
358 host->io_word[0] = 0;
359 host->io_word[1] = 0;
361 cmd = host->req->tpc << 16;
364 if (host->req->data_dir == READ)
366 if (host->req->need_card_int)
368 if (host->req->get_int_reg)
371 data = host->req->data;
373 host->use_dma = !no_dma;
375 if (host->req->long_data) {
376 data_len = host->req->sg.length;
378 data_len = host->req->data_len;
383 cmd &= ~(TPC_DATA_SEL | 0xf);
384 host->cmd_flags |= REG_DATA;
385 cmd |= data_len & 0xf;
390 if (1 != pci_map_sg(host->chip->pdev, &host->req->sg, 1,
391 host->req->data_dir == READ
393 : PCI_DMA_TODEVICE)) {
394 host->req->error = -ENOMEM;
395 return host->req->error;
397 data_len = sg_dma_len(&host->req->sg);
398 writel(sg_dma_address(&host->req->sg),
399 host->addr + DMA_ADDRESS);
400 writel(((1 << 16) & BLOCK_COUNT_MASK)
401 | (data_len & BLOCK_SIZE_MASK),
403 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
404 } else if (!(host->cmd_flags & REG_DATA)) {
405 writel(((1 << 16) & BLOCK_COUNT_MASK)
406 | (data_len & BLOCK_SIZE_MASK),
408 t_val = readl(host->addr + INT_STATUS_ENABLE);
409 t_val |= host->req->data_dir == READ
410 ? INT_STATUS_FIFO_RRDY
411 : INT_STATUS_FIFO_WRDY;
413 writel(t_val, host->addr + INT_STATUS_ENABLE);
414 writel(t_val, host->addr + INT_SIGNAL_ENABLE);
416 cmd &= ~(TPC_DATA_SEL | 0xf);
417 host->cmd_flags |= REG_DATA;
418 cmd |= data_len & 0xf;
420 if (host->req->data_dir == WRITE) {
421 jmb38x_ms_transfer_data(host);
422 writel(host->io_word[0], host->addr + TPC_P0);
423 writel(host->io_word[1], host->addr + TPC_P1);
427 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
428 writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL),
429 host->addr + HOST_CONTROL);
430 host->req->error = 0;
432 writel(cmd, host->addr + TPC);
433 dev_dbg(msh->cdev.dev, "executing TPC %08x, len %x\n", cmd, data_len);
438 static void jmb38x_ms_complete_cmd(struct memstick_host *msh, int last)
440 struct jmb38x_ms_host *host = memstick_priv(msh);
441 unsigned int t_val = 0;
444 del_timer(&host->timer);
446 dev_dbg(msh->cdev.dev, "c control %08x\n",
447 readl(host->addr + HOST_CONTROL));
448 dev_dbg(msh->cdev.dev, "c status %08x\n",
449 readl(host->addr + INT_STATUS));
450 dev_dbg(msh->cdev.dev, "c hstatus %08x\n", readl(host->addr + STATUS));
452 if (host->req->get_int_reg) {
453 t_val = readl(host->addr + TPC_P0);
454 host->req->int_reg = (t_val & 0xff);
458 writel(0, host->addr + DMA_CONTROL);
459 pci_unmap_sg(host->chip->pdev, &host->req->sg, 1,
460 host->req->data_dir == READ
461 ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
463 t_val = readl(host->addr + INT_STATUS_ENABLE);
464 if (host->req->data_dir == READ)
465 t_val &= ~INT_STATUS_FIFO_RRDY;
467 t_val &= ~INT_STATUS_FIFO_WRDY;
469 writel(t_val, host->addr + INT_STATUS_ENABLE);
470 writel(t_val, host->addr + INT_SIGNAL_ENABLE);
473 writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL),
474 host->addr + HOST_CONTROL);
478 rc = memstick_next_req(msh, &host->req);
479 } while (!rc && jmb38x_ms_issue_cmd(msh));
482 rc = memstick_next_req(msh, &host->req);
484 host->req->error = -ETIME;
489 static irqreturn_t jmb38x_ms_isr(int irq, void *dev_id)
491 struct memstick_host *msh = dev_id;
492 struct jmb38x_ms_host *host = memstick_priv(msh);
493 unsigned int irq_status;
495 spin_lock(&host->lock);
496 irq_status = readl(host->addr + INT_STATUS);
497 dev_dbg(&host->chip->pdev->dev, "irq_status = %08x\n", irq_status);
498 if (irq_status == 0 || irq_status == (~0)) {
499 spin_unlock(&host->lock);
504 if (irq_status & INT_STATUS_ANY_ERR) {
505 if (irq_status & INT_STATUS_CRC_ERR)
506 host->req->error = -EILSEQ;
508 host->req->error = -ETIME;
511 if (irq_status & INT_STATUS_EOTRAN)
512 host->cmd_flags |= FIFO_READY;
514 if (irq_status & (INT_STATUS_FIFO_RRDY
515 | INT_STATUS_FIFO_WRDY))
516 jmb38x_ms_transfer_data(host);
518 if (irq_status & INT_STATUS_EOTRAN) {
519 jmb38x_ms_transfer_data(host);
520 host->cmd_flags |= FIFO_READY;
524 if (irq_status & INT_STATUS_EOTPC) {
525 host->cmd_flags |= CMD_READY;
526 if (host->cmd_flags & REG_DATA) {
527 if (host->req->data_dir == READ) {
536 jmb38x_ms_transfer_data(host);
538 host->cmd_flags |= FIFO_READY;
544 if (irq_status & (INT_STATUS_MEDIA_IN | INT_STATUS_MEDIA_OUT)) {
545 dev_dbg(&host->chip->pdev->dev, "media changed\n");
546 memstick_detect_change(msh);
549 writel(irq_status, host->addr + INT_STATUS);
552 && (((host->cmd_flags & CMD_READY)
553 && (host->cmd_flags & FIFO_READY))
554 || host->req->error))
555 jmb38x_ms_complete_cmd(msh, 0);
557 spin_unlock(&host->lock);
561 static void jmb38x_ms_abort(unsigned long data)
563 struct memstick_host *msh = (struct memstick_host *)data;
564 struct jmb38x_ms_host *host = memstick_priv(msh);
567 dev_dbg(&host->chip->pdev->dev, "abort\n");
568 spin_lock_irqsave(&host->lock, flags);
570 host->req->error = -ETIME;
571 jmb38x_ms_complete_cmd(msh, 0);
573 spin_unlock_irqrestore(&host->lock, flags);
576 static void jmb38x_ms_request(struct memstick_host *msh)
578 struct jmb38x_ms_host *host = memstick_priv(msh);
582 spin_lock_irqsave(&host->lock, flags);
584 spin_unlock_irqrestore(&host->lock, flags);
590 rc = memstick_next_req(msh, &host->req);
591 } while (!rc && jmb38x_ms_issue_cmd(msh));
592 spin_unlock_irqrestore(&host->lock, flags);
595 static void jmb38x_ms_reset(struct jmb38x_ms_host *host)
597 unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
599 writel(host_ctl | HOST_CONTROL_RESET_REQ | HOST_CONTROL_RESET,
600 host->addr + HOST_CONTROL);
602 while (HOST_CONTROL_RESET_REQ
603 & (host_ctl = readl(host->addr + HOST_CONTROL))) {
605 dev_dbg(&host->chip->pdev->dev, "reset\n");
608 writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
609 writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE);
611 dev_dbg(&host->chip->pdev->dev, "reset\n");
614 static void jmb38x_ms_set_param(struct memstick_host *msh,
615 enum memstick_param param,
618 struct jmb38x_ms_host *host = memstick_priv(msh);
619 unsigned int host_ctl;
622 spin_lock_irqsave(&host->lock, flags);
626 if (value == MEMSTICK_POWER_ON) {
627 jmb38x_ms_reset(host);
629 writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
630 : PAD_PU_PD_ON_MS_SOCK0,
631 host->addr + PAD_PU_PD);
633 writel(PAD_OUTPUT_ENABLE_MS,
634 host->addr + PAD_OUTPUT_ENABLE);
636 host_ctl = readl(host->addr + HOST_CONTROL);
638 writel(host_ctl | (HOST_CONTROL_POWER_EN
639 | HOST_CONTROL_CLOCK_EN),
640 host->addr + HOST_CONTROL);
642 dev_dbg(&host->chip->pdev->dev, "power on\n");
643 } else if (value == MEMSTICK_POWER_OFF) {
644 writel(readl(host->addr + HOST_CONTROL)
645 & ~(HOST_CONTROL_POWER_EN
646 | HOST_CONTROL_CLOCK_EN),
647 host->addr + HOST_CONTROL);
648 writel(0, host->addr + PAD_OUTPUT_ENABLE);
649 writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD);
650 dev_dbg(&host->chip->pdev->dev, "power off\n");
653 case MEMSTICK_INTERFACE:
654 /* jmb38x_ms_reset(host); */
656 host_ctl = readl(host->addr + HOST_CONTROL);
657 host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT);
660 if (value == MEMSTICK_SERIAL) {
661 host_ctl &= ~HOST_CONTROL_FAST_CLK;
662 host_ctl |= HOST_CONTROL_IF_SERIAL
663 << HOST_CONTROL_IF_SHIFT;
664 host_ctl |= HOST_CONTROL_REI;
665 writel(0, host->addr + CLOCK_DELAY);
666 } else if (value == MEMSTICK_PAR4) {
667 host_ctl |= HOST_CONTROL_FAST_CLK;
668 host_ctl |= HOST_CONTROL_IF_PAR4
669 << HOST_CONTROL_IF_SHIFT;
670 host_ctl &= ~HOST_CONTROL_REI;
671 writel(4, host->addr + CLOCK_DELAY);
672 } else if (value == MEMSTICK_PAR8) {
673 host_ctl |= HOST_CONTROL_FAST_CLK;
674 host_ctl |= HOST_CONTROL_IF_PAR8
675 << HOST_CONTROL_IF_SHIFT;
676 host_ctl &= ~HOST_CONTROL_REI;
677 writel(4, host->addr + CLOCK_DELAY);
679 writel(host_ctl, host->addr + HOST_CONTROL);
683 spin_unlock_irqrestore(&host->lock, flags);
688 static int jmb38x_ms_suspend(struct pci_dev *dev, pm_message_t state)
690 struct jmb38x_ms *jm = pci_get_drvdata(dev);
693 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
696 memstick_suspend_host(jm->hosts[cnt]);
700 pci_enable_wake(dev, pci_choose_state(dev, state), 0);
701 pci_disable_device(dev);
702 pci_set_power_state(dev, pci_choose_state(dev, state));
706 static int jmb38x_ms_resume(struct pci_dev *dev)
708 struct jmb38x_ms *jm = pci_get_drvdata(dev);
711 pci_set_power_state(dev, PCI_D0);
712 pci_restore_state(dev);
713 rc = pci_enable_device(dev);
718 pci_read_config_dword(dev, 0xac, &rc);
719 pci_write_config_dword(dev, 0xac, rc | 0x00470000);
721 for (rc = 0; rc < jm->host_cnt; ++rc) {
724 memstick_resume_host(jm->hosts[rc]);
725 memstick_detect_change(jm->hosts[rc]);
733 #define jmb38x_ms_suspend NULL
734 #define jmb38x_ms_resume NULL
736 #endif /* CONFIG_PM */
738 static int jmb38x_ms_count_slots(struct pci_dev *pdev)
742 for (cnt = 0; cnt < PCI_ROM_RESOURCE; ++cnt) {
743 if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt)))
746 if (256 != pci_resource_len(pdev, cnt))
754 static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt)
756 struct memstick_host *msh;
757 struct jmb38x_ms_host *host;
759 msh = memstick_alloc_host(sizeof(struct jmb38x_ms_host),
764 host = memstick_priv(msh);
766 host->addr = ioremap(pci_resource_start(jm->pdev, cnt),
767 pci_resource_len(jm->pdev, cnt));
771 spin_lock_init(&host->lock);
773 snprintf(host->host_id, DEVICE_ID_SIZE, DRIVER_NAME ":slot%d",
775 host->irq = jm->pdev->irq;
776 host->timeout_jiffies = msecs_to_jiffies(4000);
777 msh->request = jmb38x_ms_request;
778 msh->set_param = jmb38x_ms_set_param;
780 msh->caps = MEMSTICK_CAP_AUTO_GET_INT | MEMSTICK_CAP_PAR4
783 msh->caps = MEMSTICK_CAP_PAR4 | MEMSTICK_CAP_PAR8;
785 setup_timer(&host->timer, jmb38x_ms_abort, (unsigned long)msh);
787 if (!request_irq(host->irq, jmb38x_ms_isr, IRQF_SHARED, host->host_id,
797 static void jmb38x_ms_free_host(struct memstick_host *msh)
799 struct jmb38x_ms_host *host = memstick_priv(msh);
801 free_irq(host->irq, msh);
803 memstick_free_host(msh);
806 static int jmb38x_ms_probe(struct pci_dev *pdev,
807 const struct pci_device_id *dev_id)
809 struct jmb38x_ms *jm;
810 int pci_dev_busy = 0;
813 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
817 rc = pci_enable_device(pdev);
821 pci_set_master(pdev);
823 rc = pci_request_regions(pdev, DRIVER_NAME);
829 pci_read_config_dword(pdev, 0xac, &rc);
830 pci_write_config_dword(pdev, 0xac, rc | 0x00470000);
832 cnt = jmb38x_ms_count_slots(pdev);
839 jm = kzalloc(sizeof(struct jmb38x_ms)
840 + cnt * sizeof(struct memstick_host *), GFP_KERNEL);
848 pci_set_drvdata(pdev, jm);
850 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
851 jm->hosts[cnt] = jmb38x_ms_alloc_host(jm, cnt);
855 rc = memstick_add_host(jm->hosts[cnt]);
858 jmb38x_ms_free_host(jm->hosts[cnt]);
859 jm->hosts[cnt] = NULL;
869 pci_set_drvdata(pdev, NULL);
872 pci_release_regions(pdev);
875 pci_disable_device(pdev);
879 static void jmb38x_ms_remove(struct pci_dev *dev)
881 struct jmb38x_ms *jm = pci_get_drvdata(dev);
882 struct jmb38x_ms_host *host;
886 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
890 host = memstick_priv(jm->hosts[cnt]);
892 writel(0, host->addr + INT_SIGNAL_ENABLE);
893 writel(0, host->addr + INT_STATUS_ENABLE);
895 dev_dbg(&jm->pdev->dev, "interrupts off\n");
896 spin_lock_irqsave(&host->lock, flags);
898 host->req->error = -ETIME;
899 jmb38x_ms_complete_cmd(jm->hosts[cnt], 1);
901 spin_unlock_irqrestore(&host->lock, flags);
903 memstick_remove_host(jm->hosts[cnt]);
904 dev_dbg(&jm->pdev->dev, "host removed\n");
906 jmb38x_ms_free_host(jm->hosts[cnt]);
909 pci_set_drvdata(dev, NULL);
910 pci_release_regions(dev);
911 pci_disable_device(dev);
915 static struct pci_device_id jmb38x_ms_id_tbl [] = {
916 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_MS, PCI_ANY_ID,
917 PCI_ANY_ID, 0, 0, 0 },
921 static struct pci_driver jmb38x_ms_driver = {
923 .id_table = jmb38x_ms_id_tbl,
924 .probe = jmb38x_ms_probe,
925 .remove = jmb38x_ms_remove,
926 .suspend = jmb38x_ms_suspend,
927 .resume = jmb38x_ms_resume
930 static int __init jmb38x_ms_init(void)
932 return pci_register_driver(&jmb38x_ms_driver);
935 static void __exit jmb38x_ms_exit(void)
937 pci_unregister_driver(&jmb38x_ms_driver);
940 MODULE_AUTHOR("Alex Dubov");
941 MODULE_DESCRIPTION("JMicron jmb38x MemoryStick driver");
942 MODULE_LICENSE("GPL");
943 MODULE_DEVICE_TABLE(pci, jmb38x_ms_id_tbl);
945 module_init(jmb38x_ms_init);
946 module_exit(jmb38x_ms_exit);