2 * Optimized RAID-5 checksumming functions for MMX and SSE.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
9 * You should have received a copy of the GNU General Public License
10 * (for example /usr/src/linux/COPYING); if not, write to the Free
11 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
16 * Cache avoiding checksumming functions utilizing KNI instructions
17 * Copyright (C) 1999 Zach Brown (with obvious credit due Ingo)
22 * High-speed RAID5 checksumming functions utilizing SSE instructions.
23 * Copyright (C) 1998 Ingo Molnar.
27 * x86-64 changes / gcc fixes from Andi Kleen.
28 * Copyright 2002 Andi Kleen, SuSE Labs.
30 * This hasn't been optimized for the hammer yet, but there are likely
31 * no advantages to be gotten from x86-64 here anyways.
36 } __attribute__((aligned(16))) xmm_store_t;
38 /* Doesn't use gcc to save the XMM registers, because there is no easy way to
39 tell it to do a clts before the register saving. */
44 "movq %%cr0,%0 ;\n\t" \
46 "movups %%xmm0,(%1) ;\n\t" \
47 "movups %%xmm1,0x10(%1) ;\n\t" \
48 "movups %%xmm2,0x20(%1) ;\n\t" \
49 "movups %%xmm3,0x30(%1) ;\n\t" \
55 #define XMMS_RESTORE \
59 "movups (%1),%%xmm0 ;\n\t" \
60 "movups 0x10(%1),%%xmm1 ;\n\t" \
61 "movups 0x20(%1),%%xmm2 ;\n\t" \
62 "movups 0x30(%1),%%xmm3 ;\n\t" \
63 "movq %0,%%cr0 ;\n\t" \
65 : "r" (cr0), "r" (xmm_save) \
70 #define OFFS(x) "16*("#x")"
71 #define PF_OFFS(x) "256+16*("#x")"
72 #define PF0(x) " prefetchnta "PF_OFFS(x)"(%[p1]) ;\n"
73 #define LD(x, y) " movaps "OFFS(x)"(%[p1]), %%xmm"#y" ;\n"
74 #define ST(x, y) " movaps %%xmm"#y", "OFFS(x)"(%[p1]) ;\n"
75 #define PF1(x) " prefetchnta "PF_OFFS(x)"(%[p2]) ;\n"
76 #define PF2(x) " prefetchnta "PF_OFFS(x)"(%[p3]) ;\n"
77 #define PF3(x) " prefetchnta "PF_OFFS(x)"(%[p4]) ;\n"
78 #define PF4(x) " prefetchnta "PF_OFFS(x)"(%[p5]) ;\n"
79 #define PF5(x) " prefetchnta "PF_OFFS(x)"(%[p6]) ;\n"
80 #define XO1(x, y) " xorps "OFFS(x)"(%[p2]), %%xmm"#y" ;\n"
81 #define XO2(x, y) " xorps "OFFS(x)"(%[p3]), %%xmm"#y" ;\n"
82 #define XO3(x, y) " xorps "OFFS(x)"(%[p4]), %%xmm"#y" ;\n"
83 #define XO4(x, y) " xorps "OFFS(x)"(%[p5]), %%xmm"#y" ;\n"
84 #define XO5(x, y) " xorps "OFFS(x)"(%[p6]), %%xmm"#y" ;\n"
88 xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
90 unsigned int lines = bytes >> 8;
92 xmm_store_t xmm_save[4];
128 " addq %[inc], %[p1] ;\n"
129 " addq %[inc], %[p2] ;\n"
130 " decl %[cnt] ; jnz 1b"
131 : [p1] "+r" (p1), [p2] "+r" (p2), [cnt] "+r" (lines)
139 xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
142 unsigned int lines = bytes >> 8;
143 xmm_store_t xmm_save[4];
186 " addq %[inc], %[p1] ;\n"
187 " addq %[inc], %[p2] ;\n"
188 " addq %[inc], %[p3] ;\n"
189 " decl %[cnt] ; jnz 1b"
190 : [cnt] "+r" (lines),
191 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3)
198 xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
199 unsigned long *p3, unsigned long *p4)
201 unsigned int lines = bytes >> 8;
202 xmm_store_t xmm_save[4];
251 " addq %[inc], %[p1] ;\n"
252 " addq %[inc], %[p2] ;\n"
253 " addq %[inc], %[p3] ;\n"
254 " addq %[inc], %[p4] ;\n"
255 " decl %[cnt] ; jnz 1b"
256 : [cnt] "+c" (lines),
257 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4)
265 xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
266 unsigned long *p3, unsigned long *p4, unsigned long *p5)
268 unsigned int lines = bytes >> 8;
269 xmm_store_t xmm_save[4];
324 " addq %[inc], %[p1] ;\n"
325 " addq %[inc], %[p2] ;\n"
326 " addq %[inc], %[p3] ;\n"
327 " addq %[inc], %[p4] ;\n"
328 " addq %[inc], %[p5] ;\n"
329 " decl %[cnt] ; jnz 1b"
330 : [cnt] "+c" (lines),
331 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4),
339 static struct xor_block_template xor_block_sse = {
340 .name = "generic_sse",
347 #undef XOR_TRY_TEMPLATES
348 #define XOR_TRY_TEMPLATES \
350 xor_speed(&xor_block_sse); \
353 /* We force the use of the SSE xor block because it can write around L2.
354 We may also be able to load into the L1 only depending on how the cpu
355 deals with a load to a line that is being prefetched. */
356 #define XOR_SELECT_TEMPLATE(FASTEST) (&xor_block_sse)