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   1 /*
   2  * linux/include/asm-arm/arch-s3c2410/io.h
   3  *  from linux/include/asm-arm/arch-rpc/io.h
   4  *
   5  * Copyright (C) 1997 Russell King
   6  *           (C) 2003 Simtec Electronics
   7  *
   8  * Modifications:
   9  *  06-Dec-1997 RMK     Created.
  10  *  02-Sep-2003 BJD     Modified for S3C2410
  11  *  10-Mar-2005 LCVR    Changed S3C2410_VA to S3C24XX_VA
  12  *  13-Oct-2005 BJD     Fixed problems with LDRH/STRH offset range
  13  */
  14
  15 #ifndef __ASM_ARM_ARCH_IO_H
  16 #define __ASM_ARM_ARCH_IO_H
  17
  18 #include <asm/hardware.h>
  19
  20 #define IO_SPACE_LIMIT 0xffffffff
  21
  22 /*
  23  * We use two different types of addressing - PC style addresses, and ARM
  24  * addresses.  PC style accesses the PC hardware with the normal PC IO
  25  * addresses, eg 0x3f8 for serial#1.  ARM addresses are above A28
  26  * and are translated to the start of IO.  Note that all addresses are
  27  * not shifted left!
  28  */
  29
  30 #define __PORT_PCIO(x)  ((x) < (1<<28))
  31
  32 #define PCIO_BASE        (S3C24XX_VA_ISA_WORD)
  33 #define PCIO_BASE_b      (S3C24XX_VA_ISA_BYTE)
  34 #define PCIO_BASE_w      (S3C24XX_VA_ISA_WORD)
  35 #define PCIO_BASE_l      (S3C24XX_VA_ISA_WORD)
  36 /*
  37  * Dynamic IO functions - let the compiler
  38  * optimize the expressions
  39  */
  40
  41 #define DECLARE_DYN_OUT(sz,fnsuffix,instr) \
  42 static inline void __out##fnsuffix (unsigned int val, unsigned int port) \
  43 { \
  44         unsigned long temp;                                   \
  45         __asm__ __volatile__(                                 \
  46         "cmp    %2, #(1<<28)\n\t"                             \
  47         "mov    %0, %2\n\t"                                   \
  48         "addcc  %0, %0, %3\n\t"                               \
  49         "str" instr " %1, [%0, #0 ]     @ out" #fnsuffix      \
  50         : "=&r" (temp)                                        \
  51         : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix)  \
  52         : "cc");                                              \
  53 }
  54
  55
  56 #define DECLARE_DYN_IN(sz,fnsuffix,instr)                               \
  57 static inline unsigned sz __in##fnsuffix (unsigned int port)            \
  58 {                                                                       \
  59         unsigned long temp, value;                                      \
  60         __asm__ __volatile__(                                           \
  61         "cmp    %2, #(1<<28)\n\t"                                       \
  62         "mov    %0, %2\n\t"                                             \
  63         "addcc  %0, %0, %3\n\t"                                         \
  64         "ldr" instr "   %1, [%0, #0 ]   @ in" #fnsuffix         \
  65         : "=&r" (temp), "=r" (value)                                    \
  66         : "r" (port), "Ir" (PCIO_BASE_##fnsuffix)       \
  67         : "cc");                                                        \
  68         return (unsigned sz)value;                                      \
  69 }
  70
  71 static inline void __iomem *__ioaddr (unsigned long port)
  72 {
  73         return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void __iomem *)port;
  74 }
  75
  76 #define DECLARE_IO(sz,fnsuffix,instr)   \
  77         DECLARE_DYN_IN(sz,fnsuffix,instr) \
  78         DECLARE_DYN_OUT(sz,fnsuffix,instr)
  79
  80 DECLARE_IO(char,b,"b")
  81 DECLARE_IO(short,w,"h")
  82 DECLARE_IO(int,l,"")
  83
  84 #undef DECLARE_IO
  85 #undef DECLARE_DYN_IN
  86
  87 /*
  88  * Constant address IO functions
  89  *
  90  * These have to be macros for the 'J' constraint to work -
  91  * +/-4096 immediate operand.
  92  */
  93 #define __outbc(value,port)                                             \
  94 ({                                                                      \
  95         if (__PORT_PCIO((port)))                                        \
  96                 __asm__ __volatile__(                                   \
  97                 "strb   %0, [%1, %2]    @ outbc"                        \
  98                 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port)));       \
  99         else                                                            \
 100                 __asm__ __volatile__(                                   \
 101                 "strb   %0, [%1, #0]    @ outbc"                        \
 102                 : : "r" (value), "r" ((port)));                         \
 103 })
 104
 105 #define __inbc(port)                                                    \
 106 ({                                                                      \
 107         unsigned char result;                                           \
 108         if (__PORT_PCIO((port)))                                        \
 109                 __asm__ __volatile__(                                   \
 110                 "ldrb   %0, [%1, %2]    @ inbc"                         \
 111                 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));      \
 112         else                                                            \
 113                 __asm__ __volatile__(                                   \
 114                 "ldrb   %0, [%1, #0]    @ inbc"                         \
 115                 : "=r" (result) : "r" ((port)));                        \
 116         result;                                                         \
 117 })
 118
 119 #define __outwc(value,port)                                             \
 120 ({                                                                      \
 121         unsigned long v = value;                                        \
 122         if (__PORT_PCIO((port))) {                                      \
 123                 if ((port) < 256 && (port) > -256)                      \
 124                         __asm__ __volatile__(                           \
 125                         "strh   %0, [%1, %2]    @ outwc"                \
 126                         : : "r" (v), "r" (PCIO_BASE), "Jr" ((port)));   \
 127                 else if ((port) > 0)                                    \
 128                         __asm__ __volatile__(                           \
 129                         "strh   %0, [%1, %2]    @ outwc"                \
 130                         : : "r" (v),                                    \
 131                             "r" (PCIO_BASE + ((port) & ~0xff)),         \
 132                              "Jr" (((port) & 0xff)));                   \
 133                 else                                                    \
 134                         __asm__ __volatile__(                           \
 135                         "strh   %0, [%1, #0]    @ outwc"                \
 136                         : : "r" (v),                                    \
 137                             "r" (PCIO_BASE + (port)));                  \
 138         } else                                                          \
 139                 __asm__ __volatile__(                                   \
 140                 "strh   %0, [%1, #0]    @ outwc"                        \
 141                 : : "r" (v), "r" ((port)));                             \
 142 })
 143
 144 #define __inwc(port)                                                    \
 145 ({                                                                      \
 146         unsigned short result;                                          \
 147         if (__PORT_PCIO((port))) {                                      \
 148                 if ((port) < 256 && (port) > -256 )                     \
 149                         __asm__ __volatile__(                           \
 150                         "ldrh   %0, [%1, %2]    @ inwc"                 \
 151                         : "=r" (result)                                 \
 152                         : "r" (PCIO_BASE),                              \
 153                           "Jr" ((port)));                               \
 154                 else if ((port) > 0)                                    \
 155                         __asm__ __volatile__(                           \
 156                         "ldrh   %0, [%1, %2]    @ inwc"                 \
 157                         : "=r" (result)                                 \
 158                         : "r" (PCIO_BASE + ((port) & ~0xff)),           \
 159                           "Jr" (((port) & 0xff)));                      \
 160                 else                                                    \
 161                         __asm__ __volatile__(                           \
 162                         "ldrh   %0, [%1, #0]    @ inwc"                 \
 163                         : "=r" (result)                                 \
 164                         : "r" (PCIO_BASE + ((port))));                  \
 165         } else                                                          \
 166                 __asm__ __volatile__(                                   \
 167                 "ldrh   %0, [%1, #0]    @ inwc"                         \
 168                 : "=r" (result) : "r" ((port)));                        \
 169         result;                                                         \
 170 })
 171
 172 #define __outlc(value,port)                                             \
 173 ({                                                                      \
 174         unsigned long v = value;                                        \
 175         if (__PORT_PCIO((port)))                                        \
 176                 __asm__ __volatile__(                                   \
 177                 "str    %0, [%1, %2]    @ outlc"                        \
 178                 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port)));   \
 179         else                                                            \
 180                 __asm__ __volatile__(                                   \
 181                 "str    %0, [%1, #0]    @ outlc"                        \
 182                 : : "r" (v), "r" ((port)));             \
 183 })
 184
 185 #define __inlc(port)                                                    \
 186 ({                                                                      \
 187         unsigned long result;                                           \
 188         if (__PORT_PCIO((port)))                                        \
 189                 __asm__ __volatile__(                                   \
 190                 "ldr    %0, [%1, %2]    @ inlc"                         \
 191                 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));      \
 192         else                                                            \
 193                 __asm__ __volatile__(                                   \
 194                 "ldr    %0, [%1, #0]    @ inlc"                         \
 195                 : "=r" (result) : "r" ((port)));                \
 196         result;                                                         \
 197 })
 198
 199 #define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void __iomem *)(port)))
 200
 201 #define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)     : __inb(p))
 202 #define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)     : __inw(p))
 203 #define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)     : __inl(p))
 204 #define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
 205 #define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
 206 #define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
 207 #define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
 208 /* the following macro is deprecated */
 209 #define ioaddr(port)    __ioaddr((port))
 210
 211 #define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
 212 #define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
 213 #define insl(p,d,l)     __raw_readsl(__ioaddr(p),d,l)
 214
 215 #define outsb(p,d,l)    __raw_writesb(__ioaddr(p),d,l)
 216 #define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
 217 #define outsl(p,d,l)    __raw_writesl(__ioaddr(p),d,l)
 218
 219 /*
 220  * 1:1 mapping for ioremapped regions.
 221  */
 222 #define __mem_pci(x)    (x)
 223
 224 #endif