1 #include <linux/config.h>
2 #include <linux/types.h>
3 #include <linux/init.h>
4 #include <linux/delay.h>
5 #include <linux/kernel.h>
6 #include <linux/interrupt.h>
7 #include <linux/spinlock.h>
9 #include <asm/pmac_feature.h>
10 #include <asm/pmac_pfunc.h>
14 #define DBG(fmt...) printk(fmt)
19 static irqreturn_t macio_gpio_irq(int irq, void *data, struct pt_regs *regs)
26 static int macio_do_gpio_irq_enable(struct pmf_function *func)
28 if (func->node->n_intrs < 1)
31 return request_irq(func->node->intrs[0].line, macio_gpio_irq, 0,
32 func->node->name, func);
35 static int macio_do_gpio_irq_disable(struct pmf_function *func)
37 if (func->node->n_intrs < 1)
40 free_irq(func->node->intrs[0].line, func);
44 static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask)
46 u8 __iomem *addr = (u8 __iomem *)func->driver_data;
51 if (args && args->count && !args->u[0].v)
55 spin_lock_irqsave(&feature_lock, flags);
57 tmp = (tmp & ~mask) | (value & mask);
58 DBG("Do write 0x%02x to GPIO %s (%p)\n",
59 tmp, func->node->full_name, addr);
61 spin_unlock_irqrestore(&feature_lock, flags);
66 static int macio_do_gpio_read(PMF_STD_ARGS, u8 mask, int rshift, u8 xor)
68 u8 __iomem *addr = (u8 __iomem *)func->driver_data;
71 /* Check if we have room for reply */
72 if (args == NULL || args->count == 0 || args->u[0].p == NULL)
76 *args->u[0].p = ((value & mask) >> rshift) ^ xor;
81 static int macio_do_delay(PMF_STD_ARGS, u32 duration)
83 /* assume we can sleep ! */
84 msleep((duration + 999) / 1000);
88 static struct pmf_handlers macio_gpio_handlers = {
89 .irq_enable = macio_do_gpio_irq_enable,
90 .irq_disable = macio_do_gpio_irq_disable,
91 .write_gpio = macio_do_gpio_write,
92 .read_gpio = macio_do_gpio_read,
93 .delay = macio_do_delay,
96 static void macio_gpio_init_one(struct macio_chip *macio)
98 struct device_node *gparent, *gp;
101 * Find the "gpio" parent node
105 (gparent = of_get_next_child(macio->of_node, gparent)) != NULL;)
106 if (strcmp(gparent->name, "gpio") == 0)
111 DBG("Installing GPIO functions for macio %s\n",
112 macio->of_node->full_name);
115 * Ok, got one, we dont need anything special to track them down, so
116 * we just create them all
118 for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;) {
119 u32 *reg = (u32 *)get_property(gp, "reg", NULL);
120 unsigned long offset;
124 /* Deal with old style device-tree. We can safely hard code the
125 * offset for now too even if it's a bit gross ...
129 offset += (unsigned long)macio->base;
130 pmf_register_driver(gp, &macio_gpio_handlers, (void *)offset);
133 DBG("Calling initial GPIO functions for macio %s\n",
134 macio->of_node->full_name);
136 /* And now we run all the init ones */
137 for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;)
138 pmf_do_functions(gp, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
140 /* Note: We do not at this point implement the "at sleep" or "at wake"
141 * functions. I yet to find any for GPIOs anyway
145 static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
147 struct macio_chip *macio = func->driver_data;
150 spin_lock_irqsave(&feature_lock, flags);
151 MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask));
152 spin_unlock_irqrestore(&feature_lock, flags);
156 static int macio_do_read_reg32(PMF_STD_ARGS, u32 offset)
158 struct macio_chip *macio = func->driver_data;
160 /* Check if we have room for reply */
161 if (args == NULL || args->count == 0 || args->u[0].p == NULL)
164 *args->u[0].p = MACIO_IN32(offset);
168 static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask)
170 struct macio_chip *macio = func->driver_data;
173 spin_lock_irqsave(&feature_lock, flags);
174 MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask));
175 spin_unlock_irqrestore(&feature_lock, flags);
179 static int macio_do_read_reg8(PMF_STD_ARGS, u32 offset)
181 struct macio_chip *macio = func->driver_data;
183 /* Check if we have room for reply */
184 if (args == NULL || args->count == 0 || args->u[0].p == NULL)
187 *((u8 *)(args->u[0].p)) = MACIO_IN8(offset);
191 static int macio_do_read_reg32_msrx(PMF_STD_ARGS, u32 offset, u32 mask,
194 struct macio_chip *macio = func->driver_data;
196 /* Check if we have room for reply */
197 if (args == NULL || args->count == 0 || args->u[0].p == NULL)
200 *args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor;
204 static int macio_do_read_reg8_msrx(PMF_STD_ARGS, u32 offset, u32 mask,
207 struct macio_chip *macio = func->driver_data;
209 /* Check if we have room for reply */
210 if (args == NULL || args->count == 0 || args->u[0].p == NULL)
213 *((u8 *)(args->u[0].p)) = ((MACIO_IN8(offset) & mask) >> shift) ^ xor;
217 static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift,
220 struct macio_chip *macio = func->driver_data;
225 if (args == NULL || args->count == 0)
228 spin_lock_irqsave(&feature_lock, flags);
229 tmp = MACIO_IN32(offset);
230 val = args->u[0].v << shift;
231 tmp = (tmp & ~mask) | (val & mask);
232 MACIO_OUT32(offset, tmp);
233 spin_unlock_irqrestore(&feature_lock, flags);
237 static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift,
240 struct macio_chip *macio = func->driver_data;
245 if (args == NULL || args->count == 0)
248 spin_lock_irqsave(&feature_lock, flags);
249 tmp = MACIO_IN8(offset);
250 val = args->u[0].v << shift;
251 tmp = (tmp & ~mask) | (val & mask);
252 MACIO_OUT8(offset, tmp);
253 spin_unlock_irqrestore(&feature_lock, flags);
257 static struct pmf_handlers macio_mmio_handlers = {
258 .write_reg32 = macio_do_write_reg32,
259 .read_reg32 = macio_do_read_reg32,
260 .write_reg8 = macio_do_write_reg8,
261 .read_reg32 = macio_do_read_reg8,
262 .read_reg32_msrx = macio_do_read_reg32_msrx,
263 .read_reg8_msrx = macio_do_read_reg8_msrx,
264 .write_reg32_slm = macio_do_write_reg32_slm,
265 .write_reg8_slm = macio_do_write_reg8_slm,
266 .delay = macio_do_delay,
269 static void macio_mmio_init_one(struct macio_chip *macio)
271 DBG("Installing MMIO functions for macio %s\n",
272 macio->of_node->full_name);
274 pmf_register_driver(macio->of_node, &macio_mmio_handlers, macio);
277 static struct device_node *unin_hwclock;
279 static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
283 spin_lock_irqsave(&feature_lock, flags);
284 /* This is fairly bogus in darwin, but it should work for our needs
285 * implemeted that way:
287 UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask));
288 spin_unlock_irqrestore(&feature_lock, flags);
293 static struct pmf_handlers unin_mmio_handlers = {
294 .write_reg32 = unin_do_write_reg32,
295 .delay = macio_do_delay,
298 static void uninorth_install_pfunc(void)
300 struct device_node *np;
302 DBG("Installing functions for UniN %s\n",
303 uninorth_node->full_name);
306 * Install handlers for the bridge itself
308 pmf_register_driver(uninorth_node, &unin_mmio_handlers, NULL);
309 pmf_do_functions(uninorth_node, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
313 * Install handlers for the hwclock child if any
315 for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;)
316 if (strcmp(np->name, "hw-clock") == 0) {
321 DBG("Installing functions for UniN clock %s\n",
322 unin_hwclock->full_name);
323 pmf_register_driver(unin_hwclock, &unin_mmio_handlers, NULL);
324 pmf_do_functions(unin_hwclock, NULL, 0, PMF_FLAGS_ON_INIT,
329 /* We export this as the SMP code might init us early */
330 int __init pmac_pfunc_base_install(void)
332 static int pfbase_inited;
339 if (!machine_is(powermac))
342 DBG("Installing base platform functions...\n");
345 * Locate mac-io chips and install handlers
347 for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
348 if (macio_chips[i].of_node) {
349 macio_mmio_init_one(&macio_chips[i]);
350 macio_gpio_init_one(&macio_chips[i]);
355 * Install handlers for northbridge and direct mapped hwclock
356 * if any. We do not implement the config space access callback
357 * which is only ever used for functions that we do not call in
358 * the current driver (enabling/disabling cells in U2, mostly used
359 * to restore the PCI settings, we do that differently)
361 if (uninorth_node && uninorth_base)
362 uninorth_install_pfunc();
364 DBG("All base functions installed\n");
369 arch_initcall(pmac_pfunc_base_install);
373 /* Those can be called by pmac_feature. Ultimately, I should use a sysdev
374 * or a device, but for now, that's good enough until I sort out some
375 * ordering issues. Also, we do not bother with GPIOs, as so far I yet have
376 * to see a case where a GPIO function has the on-suspend or on-resume bit
378 void pmac_pfunc_base_suspend(void)
382 for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
383 if (macio_chips[i].of_node)
384 pmf_do_functions(macio_chips[i].of_node, NULL, 0,
385 PMF_FLAGS_ON_SLEEP, NULL);
388 pmf_do_functions(uninorth_node, NULL, 0,
389 PMF_FLAGS_ON_SLEEP, NULL);
391 pmf_do_functions(unin_hwclock, NULL, 0,
392 PMF_FLAGS_ON_SLEEP, NULL);
395 void pmac_pfunc_base_resume(void)
400 pmf_do_functions(unin_hwclock, NULL, 0,
401 PMF_FLAGS_ON_WAKE, NULL);
403 pmf_do_functions(uninorth_node, NULL, 0,
404 PMF_FLAGS_ON_WAKE, NULL);
405 for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
406 if (macio_chips[i].of_node)
407 pmf_do_functions(macio_chips[i].of_node, NULL, 0,
408 PMF_FLAGS_ON_WAKE, NULL);
412 #endif /* CONFIG_PM */