2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
4 * Copyright (C) 2001-5, B2C2 inc.
6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
8 * This driver is "hard-coded" to be used with the 1st generation of
9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11 * another device with a BCM3510, this is no problem.
13 * The driver works also with QAM64 DVB-C, but had an unreasonable high
14 * UNC. (Tested with the Air2PC ATSC 1st generation)
16 * You'll need a firmware for this driver in order to get it running. It is
17 * called "dvb-fe-bcm3510-01.fw".
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the Free
21 * Software Foundation; either version 2 of the License, or (at your option)
24 * This program is distributed in the hope that it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
29 * You should have received a copy of the GNU General Public License along with
30 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
31 * Ave, Cambridge, MA 02139, USA.
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/device.h>
38 #include <linux/firmware.h>
39 #include <linux/jiffies.h>
40 #include <linux/string.h>
41 #include <linux/slab.h>
42 #include <linux/mutex.h>
44 #include "dvb_frontend.h"
46 #include "bcm3510_priv.h"
48 struct bcm3510_state {
50 struct i2c_adapter* i2c;
51 struct dvb_frontend_ops ops;
52 const struct bcm3510_config* config;
53 struct dvb_frontend frontend;
55 /* demodulator private data */
56 struct mutex hab_mutex;
59 unsigned long next_status_check;
60 unsigned long status_check_interval;
61 struct bcm3510_hab_cmd_status1 status1;
62 struct bcm3510_hab_cmd_status2 status2;
66 module_param(debug, int, 0644);
67 MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
69 #define dprintk(level,x...) if (level & debug) printk(x)
70 #define dbufout(b,l,m) {\
72 for (i = 0; i < l; i++) \
75 #define deb_info(args...) dprintk(0x01,args)
76 #define deb_i2c(args...) dprintk(0x02,args)
77 #define deb_hab(args...) dprintk(0x04,args)
79 /* transfer functions */
80 static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
84 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
87 memcpy(&b[1],buf,len);
89 deb_i2c("i2c wr %02x: ",reg);
90 dbufout(buf,len,deb_i2c);
93 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
95 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
96 __FUNCTION__, state->config->demod_address, reg, err);
103 static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
105 struct i2c_msg msg[] = {
106 { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
107 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
113 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
114 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
115 __FUNCTION__, state->config->demod_address, reg, err);
118 deb_i2c("i2c rd %02x: ",reg);
119 dbufout(buf,len,deb_i2c);
125 static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
127 return bcm3510_writebytes(state,reg,&v.raw,1);
130 static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
132 return bcm3510_readbytes(state,reg,&v->raw,1);
135 /* Host Access Buffer transfers */
136 static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
138 bcm3510_register_value v;
141 v.HABADR_a6.HABADR = 0;
142 if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
145 for (i = 0; i < len; i++) {
146 if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
148 buf[i] = v.HABDATA_a7;
153 static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
155 bcm3510_register_value v,hab;
159 /* Check if any previous HAB request still needs to be serviced by the
160 * Aquisition Processor before sending new request */
161 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
163 if (v.HABSTAT_a8.HABR) {
164 deb_info("HAB is running already - clearing it.\n");
165 v.HABSTAT_a8.HABR = 0;
166 bcm3510_writeB(st,0xa8,v);
170 /* Send the start HAB Address (automatically incremented after write of
171 * HABDATA) and write the HAB Data */
172 hab.HABADR_a6.HABADR = 0;
173 if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
176 for (i = 0; i < len; i++) {
177 hab.HABDATA_a7 = buf[i];
178 if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
182 /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
184 v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
185 if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
188 /* Polling method: Wait until the AP finishes processing the HAB request */
190 while (time_before(jiffies, t)) {
191 deb_info("waiting for HAB to complete\n");
193 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
196 if (!v.HABSTAT_a8.HABR)
200 deb_info("send_request execution timed out.\n");
204 static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
206 u8 ob[olen+2],ib[ilen+2];
211 memcpy(&ob[2],obuf,olen);
213 deb_hab("hab snd: ");
214 dbufout(ob,olen+2,deb_hab);
217 if (mutex_lock_interruptible(&st->hab_mutex) < 0)
220 if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
221 (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
224 deb_hab("hab get: ");
225 dbufout(ib,ilen+2,deb_hab);
228 memcpy(ibuf,&ib[2],ilen);
230 mutex_unlock(&st->hab_mutex);
235 /* not needed, we use a semaphore to prevent HAB races */
236 static int bcm3510_is_ap_ready(struct bcm3510_state *st)
238 bcm3510_register_value ap,hab;
241 if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
242 (ret = bcm3510_readB(st,0xa2,&ap) < 0))
245 if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
246 deb_info("AP is busy\n");
254 static int bcm3510_bert_reset(struct bcm3510_state *st)
256 bcm3510_register_value b;
259 if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
262 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
263 b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
264 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
265 b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
267 /* clear residual bit counter TODO */
271 static int bcm3510_refresh_state(struct bcm3510_state *st)
273 if (time_after(jiffies,st->next_status_check)) {
274 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
275 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
276 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
281 static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status)
283 struct bcm3510_state* st = fe->demodulator_priv;
284 bcm3510_refresh_state(st);
287 if (st->status1.STATUS1.RECEIVER_LOCK)
288 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
290 if (st->status1.STATUS1.FEC_LOCK)
291 *status |= FE_HAS_VITERBI;
293 if (st->status1.STATUS1.OUT_PLL_LOCK)
294 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
296 if (*status & FE_HAS_LOCK)
297 st->status_check_interval = 1500;
298 else /* more frequently checks if no lock has been achieved yet */
299 st->status_check_interval = 500;
301 deb_info("real_status: %02x\n",*status);
305 static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
307 struct bcm3510_state* st = fe->demodulator_priv;
308 bcm3510_refresh_state(st);
310 *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
314 static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
316 struct bcm3510_state* st = fe->demodulator_priv;
317 bcm3510_refresh_state(st);
318 *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
322 static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
324 struct bcm3510_state* st = fe->demodulator_priv;
327 bcm3510_refresh_state(st);
328 t = st->status2.SIGNAL;
337 /* normalize if necessary */
338 *strength = (t << 8) | t;
342 static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
344 struct bcm3510_state* st = fe->demodulator_priv;
345 bcm3510_refresh_state(st);
347 *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
351 /* tuner frontend programming */
352 static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
354 struct bcm3510_hab_cmd_tune c;
355 memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
357 /* I2C Mode disabled, set 16 control / Data pairs */
360 /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
361 * logic high (as Configuration) */
363 /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
364 c.TUNCTL_state = 0x40;
366 /* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
367 c.ctl_dat[0].ctrl.size = BITS_8;
368 c.ctl_dat[0].data = 0x80 | bc;
370 /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
371 c.ctl_dat[1].ctrl.size = BITS_8;
372 c.ctl_dat[1].data = 4;
374 /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
375 c.ctl_dat[2].ctrl.size = BITS_3;
376 c.ctl_dat[2].data = 0x20;
378 /* control CS0 pin, pulse byte ? */
379 c.ctl_dat[3].ctrl.size = BITS_3;
380 c.ctl_dat[3].ctrl.clk_off = 1;
381 c.ctl_dat[3].ctrl.cs0 = 1;
382 c.ctl_dat[3].data = 0x40;
384 /* PGM_S18 to PGM_S11 */
385 c.ctl_dat[4].ctrl.size = BITS_8;
386 c.ctl_dat[4].data = n >> 3;
388 /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
389 c.ctl_dat[5].ctrl.size = BITS_8;
390 c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
392 /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
393 c.ctl_dat[6].ctrl.size = BITS_3;
394 c.ctl_dat[6].data = (a << 6) & 0xdf;
396 /* control CS0 pin, pulse byte ? */
397 c.ctl_dat[7].ctrl.size = BITS_3;
398 c.ctl_dat[7].ctrl.clk_off = 1;
399 c.ctl_dat[7].ctrl.cs0 = 1;
400 c.ctl_dat[7].data = 0x40;
402 /* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
403 c.ctl_dat[8].ctrl.size = BITS_8;
404 c.ctl_dat[8].data = 0x80;
406 /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
407 c.ctl_dat[9].ctrl.size = BITS_8;
408 c.ctl_dat[9].data = 0x10;
410 /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
411 c.ctl_dat[10].ctrl.size = BITS_3;
412 c.ctl_dat[10].data = 0x20;
415 c.ctl_dat[11].ctrl.size = BITS_3;
416 c.ctl_dat[11].ctrl.clk_off = 1;
417 c.ctl_dat[11].ctrl.cs1 = 1;
418 c.ctl_dat[11].data = 0x40;
420 /* PGM_S18 to PGM_S11 */
421 c.ctl_dat[12].ctrl.size = BITS_8;
422 c.ctl_dat[12].data = 0x2a;
424 /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
425 c.ctl_dat[13].ctrl.size = BITS_8;
426 c.ctl_dat[13].data = 0x8e;
428 /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
429 c.ctl_dat[14].ctrl.size = BITS_3;
430 c.ctl_dat[14].data = 0;
433 c.ctl_dat[15].ctrl.size = BITS_3;
434 c.ctl_dat[15].ctrl.clk_off = 1;
435 c.ctl_dat[15].ctrl.cs1 = 1;
436 c.ctl_dat[15].data = 0x40;
438 return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
441 static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
445 s32 YIntercept,Tfvco1;
449 deb_info("%dkHz:",freq);
450 /* set Band Switch */
453 else if (freq <= 378000)
458 if (freq >= 470000) {
461 } else if (freq >= 90000) {
464 } else if (freq >= 76000){
472 Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
477 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
478 if (n >= 16 && n <= 2047)
479 return bcm3510_tuner_cmd(st,bc,n,a);
484 static int bcm3510_set_frontend(struct dvb_frontend* fe,
485 struct dvb_frontend_parameters *p)
487 struct bcm3510_state* st = fe->demodulator_priv;
488 struct bcm3510_hab_cmd_ext_acquire cmd;
489 struct bcm3510_hab_cmd_bert_control bert;
492 memset(&cmd,0,sizeof(cmd));
493 switch (p->u.vsb.modulation) {
495 cmd.ACQUIRE0.MODE = 0x1;
496 cmd.ACQUIRE1.SYM_RATE = 0x1;
497 cmd.ACQUIRE1.IF_FREQ = 0x1;
500 cmd.ACQUIRE0.MODE = 0x2;
501 cmd.ACQUIRE1.SYM_RATE = 0x2;
502 cmd.ACQUIRE1.IF_FREQ = 0x1;
505 cmd.ACQUIRE0.MODE = 0x3;
508 cmd.ACQUIRE0.MODE = 0x4;
511 cmd.ACQUIRE0.MODE = 0x5;
514 cmd.ACQUIRE0.MODE = 0x6;
517 cmd.ACQUIRE0.MODE = 0x7;
520 cmd.ACQUIRE0.MODE = 0x8;
521 cmd.ACQUIRE1.SYM_RATE = 0x0;
522 cmd.ACQUIRE1.IF_FREQ = 0x0;
525 cmd.ACQUIRE0.MODE = 0x9;
526 cmd.ACQUIRE1.SYM_RATE = 0x0;
527 cmd.ACQUIRE1.IF_FREQ = 0x0;
531 cmd.ACQUIRE0.OFFSET = 0;
532 cmd.ACQUIRE0.NTSCSWEEP = 1;
536 /* if (enableOffset) {
540 cmd.SYM_OFFSET0 = xx;
541 cmd.SYM_OFFSET1 = xx;
542 if (enableNtscSweep) {
547 bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
549 /* doing it with different MSGIDs, data book and source differs */
552 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
553 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
555 bcm3510_bert_reset(st);
557 if ((ret = bcm3510_set_freq(st,p->frequency)) < 0)
560 memset(&st->status1,0,sizeof(st->status1));
561 memset(&st->status2,0,sizeof(st->status2));
562 st->status_check_interval = 500;
564 /* Give the AP some time */
570 static int bcm3510_sleep(struct dvb_frontend* fe)
575 static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
577 s->min_delay_ms = 1000;
583 static void bcm3510_release(struct dvb_frontend* fe)
585 struct bcm3510_state* state = fe->demodulator_priv;
589 /* firmware download:
590 * firmware file is build up like this:
591 * 16bit addr, 16bit length, 8byte of length
593 #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
595 static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, u8 *b, u16 len)
598 bcm3510_register_value vH, vL,vD;
600 vH.MADRH_a9 = addr >> 8;
602 if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
603 if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
605 for (i = 0; i < len; i++) {
607 if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
614 static int bcm3510_download_firmware(struct dvb_frontend* fe)
616 struct bcm3510_state* st = fe->demodulator_priv;
617 const struct firmware *fw;
622 deb_info("requesting firmware\n");
623 if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
624 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
627 deb_info("got firmware: %zd\n",fw->size);
630 for (i = 0; i < fw->size;) {
631 addr = le16_to_cpu( *( (u16 *)&b[i] ) );
632 len = le16_to_cpu( *( (u16 *)&b[i+2] ) );
633 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
634 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
635 err("firmware download failed: %d\n",ret);
640 release_firmware(fw);
641 deb_info("firmware download successfully completed\n");
645 static int bcm3510_check_firmware_version(struct bcm3510_state *st)
647 struct bcm3510_hab_cmd_get_version_info ver;
648 bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
650 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
651 ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
653 if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
654 ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
655 ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
658 deb_info("version check failed\n");
662 /* (un)resetting the AP */
663 static int bcm3510_reset(struct bcm3510_state *st)
667 bcm3510_register_value v;
669 bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
670 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
674 while (time_before(jiffies, t)) {
676 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
679 if (v.APSTAT1_a2.RESET)
682 deb_info("reset timed out\n");
686 static int bcm3510_clear_reset(struct bcm3510_state *st)
688 bcm3510_register_value v;
693 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
697 while (time_before(jiffies, t)) {
699 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
702 /* verify that reset is cleared */
703 if (!v.APSTAT1_a2.RESET)
706 deb_info("reset clear timed out\n");
710 static int bcm3510_init_cold(struct bcm3510_state *st)
713 bcm3510_register_value v;
715 /* read Acquisation Processor status register and check it is not in RUN mode */
716 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
718 if (v.APSTAT1_a2.RUN) {
719 deb_info("AP is already running - firmware already loaded.\n");
723 deb_info("reset?\n");
724 if ((ret = bcm3510_reset(st)) < 0)
727 deb_info("tristate?\n");
730 if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
733 deb_info("firmware?\n");
734 if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
735 (ret = bcm3510_clear_reset(st)) < 0)
738 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
743 static int bcm3510_init(struct dvb_frontend* fe)
745 struct bcm3510_state* st = fe->demodulator_priv;
746 bcm3510_register_value j;
747 struct bcm3510_hab_cmd_set_agc c;
750 if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
753 deb_info("JDEC: %02x\n",j.raw);
755 switch (j.JDEC_ca.JDEC) {
756 case JDEC_WAIT_AT_RAM:
757 deb_info("attempting to download firmware\n");
758 if ((ret = bcm3510_init_cold(st)) < 0)
760 case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
761 deb_info("firmware is loaded\n");
762 bcm3510_check_firmware_version(st);
770 bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
776 static struct dvb_frontend_ops bcm3510_ops;
778 struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
779 struct i2c_adapter *i2c)
781 struct bcm3510_state* state = NULL;
783 bcm3510_register_value v;
785 /* allocate memory for the internal state */
786 state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
790 /* setup the state */
792 state->config = config;
794 memcpy(&state->ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
796 /* create dvb_frontend */
797 state->frontend.ops = &state->ops;
798 state->frontend.demodulator_priv = state;
800 mutex_init(&state->hab_mutex);
802 if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
805 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
807 if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
808 (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
811 info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
813 bcm3510_reset(state);
815 return &state->frontend;
821 EXPORT_SYMBOL(bcm3510_attach);
823 static struct dvb_frontend_ops bcm3510_ops = {
826 .name = "Broadcom BCM3510 VSB/QAM frontend",
828 .frequency_min = 54000000,
829 .frequency_max = 803000000,
830 /* stepsize is just a guess */
831 .frequency_stepsize = 0,
833 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
834 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
835 FE_CAN_8VSB | FE_CAN_16VSB |
836 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
839 .release = bcm3510_release,
841 .init = bcm3510_init,
842 .sleep = bcm3510_sleep,
844 .set_frontend = bcm3510_set_frontend,
845 .get_tune_settings = bcm3510_get_tune_settings,
847 .read_status = bcm3510_read_status,
848 .read_ber = bcm3510_read_ber,
849 .read_signal_strength = bcm3510_read_signal_strength,
850 .read_snr = bcm3510_read_snr,
851 .read_ucblocks = bcm3510_read_unc,
854 MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
855 MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
856 MODULE_LICENSE("GPL");