2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
7 #include <linux/init.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/string.h>
11 #include <linux/bootmem.h>
12 #include <linux/bitops.h>
13 #include <linux/module.h>
14 #include <asm/bootsetup.h>
16 #include <asm/pgtable.h>
17 #include <asm/processor.h>
19 #include <asm/atomic.h>
20 #include <asm/mmu_context.h>
23 #include <asm/percpu.h>
24 #include <asm/proto.h>
25 #include <asm/sections.h>
27 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
29 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
31 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
32 EXPORT_SYMBOL(_cpu_pda);
33 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
35 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
37 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
39 unsigned long __supported_pte_mask __read_mostly = ~0UL;
40 EXPORT_SYMBOL(__supported_pte_mask);
41 static int do_not_nx __cpuinitdata = 0;
44 Control non executable mappings for 64bit processes.
49 int __init nonx_setup(char *str)
51 if (!strncmp(str, "on", 2)) {
52 __supported_pte_mask |= _PAGE_NX;
54 } else if (!strncmp(str, "off", 3)) {
56 __supported_pte_mask &= ~_PAGE_NX;
60 __setup("noexec=", nonx_setup); /* parsed early actually */
62 int force_personality32 = 0;
65 Control non executable heap for 32bit processes.
66 To control the stack too use noexec=off
68 on PROT_READ does not imply PROT_EXEC for 32bit processes
69 off PROT_READ implies PROT_EXEC (default)
71 static int __init nonx32_setup(char *str)
73 if (!strcmp(str, "on"))
74 force_personality32 &= ~READ_IMPLIES_EXEC;
75 else if (!strcmp(str, "off"))
76 force_personality32 |= READ_IMPLIES_EXEC;
79 __setup("noexec32=", nonx32_setup);
83 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
84 * Always point %gs to its beginning
86 void __init setup_per_cpu_areas(void)
91 #ifdef CONFIG_HOTPLUG_CPU
92 prefill_possible_map();
95 /* Copy section for each CPU (we discard the original) */
96 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
98 if (size < PERCPU_ENOUGH_ROOM)
99 size = PERCPU_ENOUGH_ROOM;
102 for_each_cpu_mask (i, cpu_possible_map) {
105 if (!NODE_DATA(cpu_to_node(i))) {
106 printk("cpu with no node %d, num_online_nodes %d\n",
107 i, num_online_nodes());
108 ptr = alloc_bootmem(size);
110 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
113 panic("Cannot allocate cpu data for CPU %d\n", i);
114 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
115 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
119 void pda_init(int cpu)
121 struct x8664_pda *pda = cpu_pda(cpu);
123 /* Setup up data that may be needed in __get_free_pages early */
124 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
125 wrmsrl(MSR_GS_BASE, pda);
127 pda->cpunumber = cpu;
130 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
131 pda->active_mm = &init_mm;
135 /* others are initialized in smpboot.c */
136 pda->pcurrent = &init_task;
137 pda->irqstackptr = boot_cpu_stack;
139 pda->irqstackptr = (char *)
140 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
141 if (!pda->irqstackptr)
142 panic("cannot allocate irqstack for cpu %d", cpu);
146 pda->irqstackptr += IRQSTACKSIZE-64;
149 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
150 __attribute__((section(".bss.page_aligned")));
152 /* May not be marked __init: used by software suspend */
153 void syscall_init(void)
156 * LSTAR and STAR live in a bit strange symbiosis.
157 * They both write to the same internal register. STAR allows to set CS/DS
158 * but only a 32bit target. LSTAR sets the 64bit rip.
160 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
161 wrmsrl(MSR_LSTAR, system_call);
163 #ifdef CONFIG_IA32_EMULATION
164 syscall32_cpu_init ();
167 /* Flags to clear on syscall */
168 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
171 void __cpuinit check_efer(void)
175 rdmsrl(MSR_EFER, efer);
176 if (!(efer & EFER_NX) || do_not_nx) {
177 __supported_pte_mask &= ~_PAGE_NX;
182 * cpu_init() initializes state that is per-CPU. Some data is already
183 * initialized (naturally) in the bootstrap process, such as the GDT
184 * and IDT. We reload them nevertheless, this function acts as a
185 * 'CPU state barrier', nothing should get across.
186 * A lot of state is already set up in PDA init.
188 void __cpuinit cpu_init (void)
190 int cpu = stack_smp_processor_id();
191 struct tss_struct *t = &per_cpu(init_tss, cpu);
192 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
194 char *estacks = NULL;
195 struct task_struct *me;
198 /* CPU 0 is initialised in head64.c */
201 zap_low_mappings(cpu);
203 estacks = boot_exception_stacks;
207 if (cpu_test_and_set(cpu, cpu_initialized))
208 panic("CPU#%d already initialized!\n", cpu);
210 printk("Initializing CPU#%d\n", cpu);
212 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
215 * Initialize the per-CPU GDT with the boot GDT,
216 * and set up the GDT descriptor:
219 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
221 cpu_gdt_descr[cpu].size = GDT_SIZE;
222 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
223 asm volatile("lidt %0" :: "m" (idt_descr));
225 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
228 wrmsrl(MSR_FS_BASE, 0);
229 wrmsrl(MSR_KERNEL_GS_BASE, 0);
235 * set up and load the per-CPU TSS
237 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
239 static const unsigned int order[N_EXCEPTION_STACKS] = {
240 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
241 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
244 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
246 panic("Cannot allocate exception stack %ld %d\n",
250 #if DEBUG_STKSZ > EXCEPTION_STKSZ
252 cpu_pda(cpu)->debugstack = (unsigned long)estacks;
253 estacks += DEBUG_STKSZ;
257 estacks += EXCEPTION_STKSZ;
260 orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
263 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
265 * <= is required because the CPU will access up to
266 * 8 bits beyond the end of the IO permission bitmap.
268 for (i = 0; i <= IO_BITMAP_LONGS; i++)
269 t->io_bitmap[i] = ~0UL;
271 atomic_inc(&init_mm.mm_count);
272 me->active_mm = &init_mm;
275 enter_lazy_tlb(&init_mm, me);
277 set_tss_desc(cpu, t);
279 load_LDT(&init_mm.context);
282 * Clear all 6 debug registers:
285 set_debugreg(0UL, 0);
286 set_debugreg(0UL, 1);
287 set_debugreg(0UL, 2);
288 set_debugreg(0UL, 3);
289 set_debugreg(0UL, 6);
290 set_debugreg(0UL, 7);