8 extern const struct pcr_ops *pcr_ops;
10 extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
11 extern void schedule_deferred_pcr_work(void);
13 #define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
14 #define PCR_STRACE 0x00000002 /* Trace supervisor events */
15 #define PCR_UTRACE 0x00000004 /* Trace user events */
16 #define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
17 #define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
18 #define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
19 #define PCR_N2_MASK0 0x00003fc0
20 #define PCR_N2_MASK0_SHIFT 6
21 #define PCR_N2_SL0 0x0003c000
22 #define PCR_N2_SL0_SHIFT 14
23 #define PCR_N2_OV0 0x00040000
24 #define PCR_N2_MASK1 0x07f80000
25 #define PCR_N2_MASK1_SHIFT 19
26 #define PCR_N2_SL1 0x78000000
27 #define PCR_N2_SL1_SHIFT 27
28 #define PCR_N2_OV1 0x80000000
30 extern unsigned int picl_shift;
32 /* In order to commonize as much of the implementation as
33 * possible, we use PICH as our counter. Mostly this is
34 * to accomodate Niagara-1 which can only count insn cycles
37 static inline u64 picl_value(unsigned int nmi_hz)
39 u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
41 return ((u64)((0 - delta) & 0xffffffff)) << 32;
44 extern u64 pcr_enable;