git.oblomov.eu Git - linux-2.6/blob - drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38 #include <linux/workqueue.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/irq.h>
  42 #include <asm/system.h>
  43 #include <asm/unaligned.h>
  44 #include <asm/byteorder.h>
  45 #ifdef CONFIG_PPC_PS3
  46 #include <asm/firmware.h>
  47 #endif
  48
  49 #include "../core/hcd.h"
  50
  51 #define DRIVER_VERSION "2006 August 04"
  52 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  53 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  54
  55 /*-------------------------------------------------------------------------*/
  56
  57 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  58
  59 /* For initializing controller (mask in an HCFS mode too) */
  60 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  61 #define OHCI_INTR_INIT \
  62                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  63                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  64
  65 #ifdef __hppa__
  66 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  67 #define IR_DISABLE
  68 #endif
  69
  70 #ifdef CONFIG_ARCH_OMAP
  71 /* OMAP doesn't support IR (no SMM; not needed) */
  72 #define IR_DISABLE
  73 #endif
  74
  75 /*-------------------------------------------------------------------------*/
  76
  77 static const char       hcd_name [] = "ohci_hcd";
  78
  79 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  80
  81 #include "ohci.h"
  82
  83 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  84 static int ohci_init (struct ohci_hcd *ohci);
  85 static void ohci_stop (struct usb_hcd *hcd);
  86 static int ohci_restart (struct ohci_hcd *ohci);
  87 static void ohci_quirk_nec_worker (struct work_struct *work);
  88
  89 #include "ohci-hub.c"
  90 #include "ohci-dbg.c"
  91 #include "ohci-mem.c"
  92 #include "ohci-q.c"
  93
  94
  95 /*
  96  * On architectures with edge-triggered interrupts we must never return
  97  * IRQ_NONE.
  98  */
  99 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 100 #define IRQ_NOTMINE     IRQ_HANDLED
 101 #else
 102 #define IRQ_NOTMINE     IRQ_NONE
 103 #endif
 104
 105
 106 /* Some boards misreport power switching/overcurrent */
 107 static int distrust_firmware = 1;
 108 module_param (distrust_firmware, bool, 0);
 109 MODULE_PARM_DESC (distrust_firmware,
 110         "true to distrust firmware power/overcurrent setup");
 111
 112 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 113 static int no_handshake = 0;
 114 module_param (no_handshake, bool, 0);
 115 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 116
 117 /*-------------------------------------------------------------------------*/
 118
 119 /*
 120  * queue up an urb for anything except the root hub
 121  */
 122 static int ohci_urb_enqueue (
 123         struct usb_hcd  *hcd,
 124         struct usb_host_endpoint *ep,
 125         struct urb      *urb,
 126         gfp_t           mem_flags
 127 ) {
 128         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 129         struct ed       *ed;
 130         urb_priv_t      *urb_priv;
 131         unsigned int    pipe = urb->pipe;
 132         int             i, size = 0;
 133         unsigned long   flags;
 134         int             retval = 0;
 135
 136 #ifdef OHCI_VERBOSE_DEBUG
 137         urb_print (urb, "SUB", usb_pipein (pipe));
 138 #endif
 139
 140         /* every endpoint has a ed, locate and maybe (re)initialize it */
 141         if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
 142                 return -ENOMEM;
 143
 144         /* for the private part of the URB we need the number of TDs (size) */
 145         switch (ed->type) {
 146                 case PIPE_CONTROL:
 147                         /* td_submit_urb() doesn't yet handle these */
 148                         if (urb->transfer_buffer_length > 4096)
 149                                 return -EMSGSIZE;
 150
 151                         /* 1 TD for setup, 1 for ACK, plus ... */
 152                         size = 2;
 153                         /* FALLTHROUGH */
 154                 // case PIPE_INTERRUPT:
 155                 // case PIPE_BULK:
 156                 default:
 157                         /* one TD for every 4096 Bytes (can be upto 8K) */
 158                         size += urb->transfer_buffer_length / 4096;
 159                         /* ... and for any remaining bytes ... */
 160                         if ((urb->transfer_buffer_length % 4096) != 0)
 161                                 size++;
 162                         /* ... and maybe a zero length packet to wrap it up */
 163                         if (size == 0)
 164                                 size++;
 165                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 166                                 && (urb->transfer_buffer_length
 167                                         % usb_maxpacket (urb->dev, pipe,
 168                                                 usb_pipeout (pipe))) == 0)
 169                                 size++;
 170                         break;
 171                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 172                         size = urb->number_of_packets;
 173                         break;
 174         }
 175
 176         /* allocate the private part of the URB */
 177         urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 178                         mem_flags);
 179         if (!urb_priv)
 180                 return -ENOMEM;
 181         memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
 182         INIT_LIST_HEAD (&urb_priv->pending);
 183         urb_priv->length = size;
 184         urb_priv->ed = ed;
 185
 186         /* allocate the TDs (deferring hash chain updates) */
 187         for (i = 0; i < size; i++) {
 188                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 189                 if (!urb_priv->td [i]) {
 190                         urb_priv->length = i;
 191                         urb_free_priv (ohci, urb_priv);
 192                         return -ENOMEM;
 193                 }
 194         }
 195
 196         spin_lock_irqsave (&ohci->lock, flags);
 197
 198         /* don't submit to a dead HC */
 199         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 200                 retval = -ENODEV;
 201                 goto fail;
 202         }
 203         if (!HC_IS_RUNNING(hcd->state)) {
 204                 retval = -ENODEV;
 205                 goto fail;
 206         }
 207
 208         /* in case of unlink-during-submit */
 209         spin_lock (&urb->lock);
 210         if (urb->status != -EINPROGRESS) {
 211                 spin_unlock (&urb->lock);
 212                 urb->hcpriv = urb_priv;
 213                 finish_urb (ohci, urb);
 214                 retval = 0;
 215                 goto fail;
 216         }
 217
 218         /* schedule the ed if needed */
 219         if (ed->state == ED_IDLE) {
 220                 retval = ed_schedule (ohci, ed);
 221                 if (retval < 0)
 222                         goto fail0;
 223                 if (ed->type == PIPE_ISOCHRONOUS) {
 224                         u16     frame = ohci_frame_no(ohci);
 225
 226                         /* delay a few frames before the first TD */
 227                         frame += max_t (u16, 8, ed->interval);
 228                         frame &= ~(ed->interval - 1);
 229                         frame |= ed->branch;
 230                         urb->start_frame = frame;
 231
 232                         /* yes, only URB_ISO_ASAP is supported, and
 233                          * urb->start_frame is never used as input.
 234                          */
 235                 }
 236         } else if (ed->type == PIPE_ISOCHRONOUS)
 237                 urb->start_frame = ed->last_iso + ed->interval;
 238
 239         /* fill the TDs and link them to the ed; and
 240          * enable that part of the schedule, if needed
 241          * and update count of queued periodic urbs
 242          */
 243         urb->hcpriv = urb_priv;
 244         td_submit_urb (ohci, urb);
 245
 246 fail0:
 247         spin_unlock (&urb->lock);
 248 fail:
 249         if (retval)
 250                 urb_free_priv (ohci, urb_priv);
 251         spin_unlock_irqrestore (&ohci->lock, flags);
 252         return retval;
 253 }
 254
 255 /*
 256  * decouple the URB from the HC queues (TDs, urb_priv); it's
 257  * already marked using urb->status.  reporting is always done
 258  * asynchronously, and we might be dealing with an urb that's
 259  * partially transferred, or an ED with other urbs being unlinked.
 260  */
 261 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
 262 {
 263         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 264         unsigned long           flags;
 265
 266 #ifdef OHCI_VERBOSE_DEBUG
 267         urb_print (urb, "UNLINK", 1);
 268 #endif
 269
 270         spin_lock_irqsave (&ohci->lock, flags);
 271         if (HC_IS_RUNNING(hcd->state)) {
 272                 urb_priv_t  *urb_priv;
 273
 274                 /* Unless an IRQ completed the unlink while it was being
 275                  * handed to us, flag it for unlink and giveback, and force
 276                  * some upcoming INTR_SF to call finish_unlinks()
 277                  */
 278                 urb_priv = urb->hcpriv;
 279                 if (urb_priv) {
 280                         if (urb_priv->ed->state == ED_OPER)
 281                                 start_ed_unlink (ohci, urb_priv->ed);
 282                 }
 283         } else {
 284                 /*
 285                  * with HC dead, we won't respect hc queue pointers
 286                  * any more ... just clean up every urb's memory.
 287                  */
 288                 if (urb->hcpriv)
 289                         finish_urb (ohci, urb);
 290         }
 291         spin_unlock_irqrestore (&ohci->lock, flags);
 292         return 0;
 293 }
 294
 295 /*-------------------------------------------------------------------------*/
 296
 297 /* frees config/altsetting state for endpoints,
 298  * including ED memory, dummy TD, and bulk/intr data toggle
 299  */
 300
 301 static void
 302 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 303 {
 304         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 305         unsigned long           flags;
 306         struct ed               *ed = ep->hcpriv;
 307         unsigned                limit = 1000;
 308
 309         /* ASSERT:  any requests/urbs are being unlinked */
 310         /* ASSERT:  nobody can be submitting urbs for this any more */
 311
 312         if (!ed)
 313                 return;
 314
 315 rescan:
 316         spin_lock_irqsave (&ohci->lock, flags);
 317
 318         if (!HC_IS_RUNNING (hcd->state)) {
 319 sanitize:
 320                 ed->state = ED_IDLE;
 321                 finish_unlinks (ohci, 0);
 322         }
 323
 324         switch (ed->state) {
 325         case ED_UNLINK:         /* wait for hw to finish? */
 326                 /* major IRQ delivery trouble loses INTR_SF too... */
 327                 if (limit-- == 0) {
 328                         ohci_warn (ohci, "IRQ INTR_SF lossage\n");
 329                         goto sanitize;
 330                 }
 331                 spin_unlock_irqrestore (&ohci->lock, flags);
 332                 schedule_timeout_uninterruptible(1);
 333                 goto rescan;
 334         case ED_IDLE:           /* fully unlinked */
 335                 if (list_empty (&ed->td_list)) {
 336                         td_free (ohci, ed->dummy);
 337                         ed_free (ohci, ed);
 338                         break;
 339                 }
 340                 /* else FALL THROUGH */
 341         default:
 342                 /* caller was supposed to have unlinked any requests;
 343                  * that's not our job.  can't recover; must leak ed.
 344                  */
 345                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 346                         ed, ep->desc.bEndpointAddress, ed->state,
 347                         list_empty (&ed->td_list) ? "" : " (has tds)");
 348                 td_free (ohci, ed->dummy);
 349                 break;
 350         }
 351         ep->hcpriv = NULL;
 352         spin_unlock_irqrestore (&ohci->lock, flags);
 353         return;
 354 }
 355
 356 static int ohci_get_frame (struct usb_hcd *hcd)
 357 {
 358         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 359
 360         return ohci_frame_no(ohci);
 361 }
 362
 363 static void ohci_usb_reset (struct ohci_hcd *ohci)
 364 {
 365         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 366         ohci->hc_control &= OHCI_CTRL_RWC;
 367         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 368 }
 369
 370 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 371  * other cases where the next software may expect clean state from the
 372  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 373  */
 374 static void
 375 ohci_shutdown (struct usb_hcd *hcd)
 376 {
 377         struct ohci_hcd *ohci;
 378
 379         ohci = hcd_to_ohci (hcd);
 380         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 381         ohci_usb_reset (ohci);
 382         /* flush the writes */
 383         (void) ohci_readl (ohci, &ohci->regs->control);
 384 }
 385
 386 /*-------------------------------------------------------------------------*
 387  * HC functions
 388  *-------------------------------------------------------------------------*/
 389
 390 /* init memory, and kick BIOS/SMM off */
 391
 392 static int ohci_init (struct ohci_hcd *ohci)
 393 {
 394         int ret;
 395         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 396
 397         disable (ohci);
 398         ohci->regs = hcd->regs;
 399
 400         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 401          * was never needed for most non-PCI systems ... remove the code?
 402          */
 403
 404 #ifndef IR_DISABLE
 405         /* SMM owns the HC?  not for long! */
 406         if (!no_handshake && ohci_readl (ohci,
 407                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 408                 u32 temp;
 409
 410                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 411
 412                 /* this timeout is arbitrary.  we make it long, so systems
 413                  * depending on usb keyboards may be usable even if the
 414                  * BIOS/SMM code seems pretty broken.
 415                  */
 416                 temp = 500;     /* arbitrary: five seconds */
 417
 418                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 419                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 420                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 421                         msleep (10);
 422                         if (--temp == 0) {
 423                                 ohci_err (ohci, "USB HC takeover failed!"
 424                                         "  (BIOS/SMM bug)\n");
 425                                 return -EBUSY;
 426                         }
 427                 }
 428                 ohci_usb_reset (ohci);
 429         }
 430 #endif
 431
 432         /* Disable HC interrupts */
 433         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 434
 435         /* flush the writes, and save key bits like RWC */
 436         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 437                 ohci->hc_control |= OHCI_CTRL_RWC;
 438
 439         /* Read the number of ports unless overridden */
 440         if (ohci->num_ports == 0)
 441                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 442
 443         if (ohci->hcca)
 444                 return 0;
 445
 446         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 447                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 448         if (!ohci->hcca)
 449                 return -ENOMEM;
 450
 451         if ((ret = ohci_mem_init (ohci)) < 0)
 452                 ohci_stop (hcd);
 453         else {
 454                 create_debug_files (ohci);
 455         }
 456
 457         return ret;
 458 }
 459
 460 /*-------------------------------------------------------------------------*/
 461
 462 /* Start an OHCI controller, set the BUS operational
 463  * resets USB and controller
 464  * enable interrupts
 465  */
 466 static int ohci_run (struct ohci_hcd *ohci)
 467 {
 468         u32                     mask, temp;
 469         int                     first = ohci->fminterval == 0;
 470         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 471
 472         disable (ohci);
 473
 474         /* boot firmware should have set this up (5.1.1.3.1) */
 475         if (first) {
 476
 477                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 478                 ohci->fminterval = temp & 0x3fff;
 479                 if (ohci->fminterval != FI)
 480                         ohci_dbg (ohci, "fminterval delta %d\n",
 481                                 ohci->fminterval - FI);
 482                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 483                 /* also: power/overcurrent flags in roothub.a */
 484         }
 485
 486         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 487          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 488          * or if bus glue did the same (e.g. for PCI add-in cards with
 489          * PCI PM support).
 490          */
 491         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
 492                         && !device_may_wakeup(hcd->self.controller))
 493                 device_init_wakeup(hcd->self.controller, 1);
 494
 495         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 496         case OHCI_USB_OPER:
 497                 temp = 0;
 498                 break;
 499         case OHCI_USB_SUSPEND:
 500         case OHCI_USB_RESUME:
 501                 ohci->hc_control &= OHCI_CTRL_RWC;
 502                 ohci->hc_control |= OHCI_USB_RESUME;
 503                 temp = 10 /* msec wait */;
 504                 break;
 505         // case OHCI_USB_RESET:
 506         default:
 507                 ohci->hc_control &= OHCI_CTRL_RWC;
 508                 ohci->hc_control |= OHCI_USB_RESET;
 509                 temp = 50 /* msec wait */;
 510                 break;
 511         }
 512         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 513         // flush the writes
 514         (void) ohci_readl (ohci, &ohci->regs->control);
 515         msleep(temp);
 516
 517         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 518
 519         /* 2msec timelimit here means no irqs/preempt */
 520         spin_lock_irq (&ohci->lock);
 521
 522 retry:
 523         /* HC Reset requires max 10 us delay */
 524         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 525         temp = 30;      /* ... allow extra time */
 526         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 527                 if (--temp == 0) {
 528                         spin_unlock_irq (&ohci->lock);
 529                         ohci_err (ohci, "USB HC reset timed out!\n");
 530                         return -1;
 531                 }
 532                 udelay (1);
 533         }
 534
 535         /* now we're in the SUSPEND state ... must go OPERATIONAL
 536          * within 2msec else HC enters RESUME
 537          *
 538          * ... but some hardware won't init fmInterval "by the book"
 539          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 540          * this if we write fmInterval after we're OPERATIONAL.
 541          * Unclear about ALi, ServerWorks, and others ... this could
 542          * easily be a longstanding bug in chip init on Linux.
 543          */
 544         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 545                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 546                 // flush those writes
 547                 (void) ohci_readl (ohci, &ohci->regs->control);
 548         }
 549
 550         /* Tell the controller where the control and bulk lists are
 551          * The lists are empty now. */
 552         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 553         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 554
 555         /* a reset clears this */
 556         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 557
 558         periodic_reinit (ohci);
 559
 560         /* some OHCI implementations are finicky about how they init.
 561          * bogus values here mean not even enumeration could work.
 562          */
 563         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 564                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 565                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 566                         ohci->flags |= OHCI_QUIRK_INITRESET;
 567                         ohci_dbg (ohci, "enabling initreset quirk\n");
 568                         goto retry;
 569                 }
 570                 spin_unlock_irq (&ohci->lock);
 571                 ohci_err (ohci, "init err (%08x %04x)\n",
 572                         ohci_readl (ohci, &ohci->regs->fminterval),
 573                         ohci_readl (ohci, &ohci->regs->periodicstart));
 574                 return -EOVERFLOW;
 575         }
 576
 577         /* use rhsc irqs after khubd is fully initialized */
 578         hcd->poll_rh = 1;
 579         hcd->uses_new_polling = 1;
 580
 581         /* start controller operations */
 582         ohci->hc_control &= OHCI_CTRL_RWC;
 583         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 584         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 585         hcd->state = HC_STATE_RUNNING;
 586
 587         /* wake on ConnectStatusChange, matching external hubs */
 588         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 589
 590         /* Choose the interrupts we care about now, others later on demand */
 591         mask = OHCI_INTR_INIT;
 592         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 593         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 594
 595         /* handle root hub init quirks ... */
 596         temp = roothub_a (ohci);
 597         temp &= ~(RH_A_PSM | RH_A_OCPM);
 598         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 599                 /* NSC 87560 and maybe others */
 600                 temp |= RH_A_NOCP;
 601                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 602                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 603         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
 604                 /* hub power always on; required for AMD-756 and some
 605                  * Mac platforms.  ganged overcurrent reporting, if any.
 606                  */
 607                 temp |= RH_A_NPS;
 608                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 609         }
 610         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 611         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 612                                                 &ohci->regs->roothub.b);
 613         // flush those writes
 614         (void) ohci_readl (ohci, &ohci->regs->control);
 615
 616         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 617         spin_unlock_irq (&ohci->lock);
 618
 619         // POTPGT delay is bits 24-31, in 2 ms units.
 620         mdelay ((temp >> 23) & 0x1fe);
 621         hcd->state = HC_STATE_RUNNING;
 622
 623         ohci_dump (ohci, 1);
 624
 625         return 0;
 626 }
 627
 628 /*-------------------------------------------------------------------------*/
 629
 630 /* an interrupt happens */
 631
 632 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 633 {
 634         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 635         struct ohci_regs __iomem *regs = ohci->regs;
 636         int                     ints;
 637
 638         /* we can eliminate a (slow) ohci_readl()
 639            if _only_ WDH caused this irq */
 640         if ((ohci->hcca->done_head != 0)
 641                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
 642                                 & 0x01)) {
 643                 ints =  OHCI_INTR_WDH;
 644
 645         /* cardbus/... hardware gone before remove() */
 646         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
 647                 disable (ohci);
 648                 ohci_dbg (ohci, "device removed!\n");
 649                 return IRQ_HANDLED;
 650
 651         /* interrupt for some other device? */
 652         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
 653                 return IRQ_NOTMINE;
 654         }
 655
 656         if (ints & OHCI_INTR_UE) {
 657                 // e.g. due to PCI Master/Target Abort
 658                 if (ohci->flags & OHCI_QUIRK_NEC) {
 659                         /* Workaround for a silicon bug in some NEC chips used
 660                          * in Apple's PowerBooks. Adapted from Darwin code.
 661                          */
 662                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 663
 664                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 665
 666                         schedule_work (&ohci->nec_work);
 667                 } else {
 668                         disable (ohci);
 669                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 670                 }
 671
 672                 ohci_dump (ohci, 1);
 673                 ohci_usb_reset (ohci);
 674         }
 675
 676         if (ints & OHCI_INTR_RHSC) {
 677                 ohci_vdbg(ohci, "rhsc\n");
 678                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 679                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 680                                 &regs->intrstatus);
 681
 682                 /* NOTE: Vendors didn't always make the same implementation
 683                  * choices for RHSC.  Many followed the spec; RHSC triggers
 684                  * on an edge, like setting and maybe clearing a port status
 685                  * change bit.  With others it's level-triggered, active
 686                  * until khubd clears all the port status change bits.  We'll
 687                  * always disable it here and rely on polling until khubd
 688                  * re-enables it.
 689                  */
 690                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 691                 usb_hcd_poll_rh_status(hcd);
 692         }
 693
 694         /* For connect and disconnect events, we expect the controller
 695          * to turn on RHSC along with RD.  But for remote wakeup events
 696          * this might not happen.
 697          */
 698         else if (ints & OHCI_INTR_RD) {
 699                 ohci_vdbg(ohci, "resume detect\n");
 700                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 701                 hcd->poll_rh = 1;
 702                 if (ohci->autostop) {
 703                         spin_lock (&ohci->lock);
 704                         ohci_rh_resume (ohci);
 705                         spin_unlock (&ohci->lock);
 706                 } else
 707                         usb_hcd_resume_root_hub(hcd);
 708         }
 709
 710         if (ints & OHCI_INTR_WDH) {
 711                 if (HC_IS_RUNNING(hcd->state))
 712                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
 713                 spin_lock (&ohci->lock);
 714                 dl_done_list (ohci);
 715                 spin_unlock (&ohci->lock);
 716                 if (HC_IS_RUNNING(hcd->state))
 717                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
 718         }
 719
 720         /* could track INTR_SO to reduce available PCI/... bandwidth */
 721
 722         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 723          * when there's still unlinking to be done (next frame).
 724          */
 725         spin_lock (&ohci->lock);
 726         if (ohci->ed_rm_list)
 727                 finish_unlinks (ohci, ohci_frame_no(ohci));
 728         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 729                         && HC_IS_RUNNING(hcd->state))
 730                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 731         spin_unlock (&ohci->lock);
 732
 733         if (HC_IS_RUNNING(hcd->state)) {
 734                 ohci_writel (ohci, ints, &regs->intrstatus);
 735                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 736                 // flush those writes
 737                 (void) ohci_readl (ohci, &ohci->regs->control);
 738         }
 739
 740         return IRQ_HANDLED;
 741 }
 742
 743 /*-------------------------------------------------------------------------*/
 744
 745 static void ohci_stop (struct usb_hcd *hcd)
 746 {
 747         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 748
 749         ohci_dump (ohci, 1);
 750
 751         flush_scheduled_work();
 752
 753         ohci_usb_reset (ohci);
 754         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 755         free_irq(hcd->irq, hcd);
 756         hcd->irq = -1;
 757
 758         remove_debug_files (ohci);
 759         ohci_mem_cleanup (ohci);
 760         if (ohci->hcca) {
 761                 dma_free_coherent (hcd->self.controller,
 762                                 sizeof *ohci->hcca,
 763                                 ohci->hcca, ohci->hcca_dma);
 764                 ohci->hcca = NULL;
 765                 ohci->hcca_dma = 0;
 766         }
 767 }
 768
 769 /*-------------------------------------------------------------------------*/
 770
 771 /* must not be called from interrupt context */
 772 static int ohci_restart (struct ohci_hcd *ohci)
 773 {
 774         int temp;
 775         int i;
 776         struct urb_priv *priv;
 777
 778         spin_lock_irq(&ohci->lock);
 779         disable (ohci);
 780
 781         /* Recycle any "live" eds/tds (and urbs). */
 782         if (!list_empty (&ohci->pending))
 783                 ohci_dbg(ohci, "abort schedule...\n");
 784         list_for_each_entry (priv, &ohci->pending, pending) {
 785                 struct urb      *urb = priv->td[0]->urb;
 786                 struct ed       *ed = priv->ed;
 787
 788                 switch (ed->state) {
 789                 case ED_OPER:
 790                         ed->state = ED_UNLINK;
 791                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 792                         ed_deschedule (ohci, ed);
 793
 794                         ed->ed_next = ohci->ed_rm_list;
 795                         ed->ed_prev = NULL;
 796                         ohci->ed_rm_list = ed;
 797                         /* FALLTHROUGH */
 798                 case ED_UNLINK:
 799                         break;
 800                 default:
 801                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 802                                         ed, ed->state);
 803                 }
 804
 805                 spin_lock (&urb->lock);
 806                 urb->status = -ESHUTDOWN;
 807                 spin_unlock (&urb->lock);
 808         }
 809         finish_unlinks (ohci, 0);
 810         spin_unlock_irq(&ohci->lock);
 811
 812         /* paranoia, in case that didn't work: */
 813
 814         /* empty the interrupt branches */
 815         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 816         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 817
 818         /* no EDs to remove */
 819         ohci->ed_rm_list = NULL;
 820
 821         /* empty control and bulk lists */
 822         ohci->ed_controltail = NULL;
 823         ohci->ed_bulktail    = NULL;
 824
 825         if ((temp = ohci_run (ohci)) < 0) {
 826                 ohci_err (ohci, "can't restart, %d\n", temp);
 827                 return temp;
 828         }
 829         ohci_dbg(ohci, "restart complete\n");
 830         return 0;
 831 }
 832
 833 /*-------------------------------------------------------------------------*/
 834
 835 /* NEC workaround */
 836 static void ohci_quirk_nec_worker(struct work_struct *work)
 837 {
 838         struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
 839         int status;
 840
 841         status = ohci_init(ohci);
 842         if (status != 0) {
 843                 ohci_err(ohci, "Restarting NEC controller failed "
 844                          "in ohci_init, %d\n", status);
 845                 return;
 846         }
 847
 848         status = ohci_restart(ohci);
 849         if (status != 0)
 850                 ohci_err(ohci, "Restarting NEC controller failed "
 851                          "in ohci_restart, %d\n", status);
 852 }
 853
 854 /*-------------------------------------------------------------------------*/
 855
 856 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 857
 858 MODULE_AUTHOR (DRIVER_AUTHOR);
 859 MODULE_DESCRIPTION (DRIVER_INFO);
 860 MODULE_LICENSE ("GPL");
 861
 862 #ifdef CONFIG_PCI
 863 #include "ohci-pci.c"
 864 #define PCI_DRIVER              ohci_pci_driver
 865 #endif
 866
 867 #ifdef CONFIG_SA1111
 868 #include "ohci-sa1111.c"
 869 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
 870 #endif
 871
 872 #ifdef CONFIG_ARCH_S3C2410
 873 #include "ohci-s3c2410.c"
 874 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
 875 #endif
 876
 877 #ifdef CONFIG_ARCH_OMAP
 878 #include "ohci-omap.c"
 879 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
 880 #endif
 881
 882 #ifdef CONFIG_ARCH_LH7A404
 883 #include "ohci-lh7a404.c"
 884 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
 885 #endif
 886
 887 #ifdef CONFIG_PXA27x
 888 #include "ohci-pxa27x.c"
 889 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
 890 #endif
 891
 892 #ifdef CONFIG_ARCH_EP93XX
 893 #include "ohci-ep93xx.c"
 894 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
 895 #endif
 896
 897 #ifdef CONFIG_SOC_AU1X00
 898 #include "ohci-au1xxx.c"
 899 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
 900 #endif
 901
 902 #ifdef CONFIG_PNX8550
 903 #include "ohci-pnx8550.c"
 904 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
 905 #endif
 906
 907 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
 908 #include "ohci-ppc-soc.c"
 909 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
 910 #endif
 911
 912 #ifdef CONFIG_ARCH_AT91
 913 #include "ohci-at91.c"
 914 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
 915 #endif
 916
 917 #ifdef CONFIG_ARCH_PNX4008
 918 #include "ohci-pnx4008.c"
 919 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
 920 #endif
 921
 922
 923 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
 924 #include "ohci-ppc-of.c"
 925 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
 926 #endif
 927
 928 #ifdef CONFIG_PPC_PS3
 929 #include "ohci-ps3.c"
 930 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_sb_driver
 931 #endif
 932
 933 #if     !defined(PCI_DRIVER) &&         \
 934         !defined(PLATFORM_DRIVER) &&    \
 935         !defined(OF_PLATFORM_DRIVER) && \
 936         !defined(SA1111_DRIVER) &&      \
 937         !defined(PS3_SYSTEM_BUS_DRIVER)
 938 #error "missing bus glue for ohci-hcd"
 939 #endif
 940
 941 static int __init ohci_hcd_mod_init(void)
 942 {
 943         int retval = 0;
 944
 945         if (usb_disabled())
 946                 return -ENODEV;
 947
 948         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
 949         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 950                 sizeof (struct ed), sizeof (struct td));
 951
 952 #ifdef PS3_SYSTEM_BUS_DRIVER
 953         if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
 954                 retval = ps3_system_bus_driver_register(
 955                                 &PS3_SYSTEM_BUS_DRIVER);
 956                 if (retval < 0)
 957                         goto error_ps3;
 958         }
 959 #endif
 960
 961 #ifdef PLATFORM_DRIVER
 962         retval = platform_driver_register(&PLATFORM_DRIVER);
 963         if (retval < 0)
 964                 goto error_platform;
 965 #endif
 966
 967 #ifdef OF_PLATFORM_DRIVER
 968         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
 969         if (retval < 0)
 970                 goto error_of_platform;
 971 #endif
 972
 973 #ifdef SA1111_DRIVER
 974         retval = sa1111_driver_register(&SA1111_DRIVER);
 975         if (retval < 0)
 976                 goto error_sa1111;
 977 #endif
 978
 979 #ifdef PCI_DRIVER
 980         retval = pci_register_driver(&PCI_DRIVER);
 981         if (retval < 0)
 982                 goto error_pci;
 983 #endif
 984
 985         return retval;
 986
 987         /* Error path */
 988 #ifdef PCI_DRIVER
 989  error_pci:
 990 #endif
 991 #ifdef SA1111_DRIVER
 992         sa1111_driver_unregister(&SA1111_DRIVER);
 993  error_sa1111:
 994 #endif
 995 #ifdef OF_PLATFORM_DRIVER
 996         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
 997  error_of_platform:
 998 #endif
 999 #ifdef PLATFORM_DRIVER
1000         platform_driver_unregister(&PLATFORM_DRIVER);
1001  error_platform:
1002 #endif
1003 #ifdef PS3_SYSTEM_BUS_DRIVER
1004         if (firmware_has_feature(FW_FEATURE_PS3_LV1))
1005                 ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1006  error_ps3:
1007 #endif
1008         return retval;
1009 }
1010 module_init(ohci_hcd_mod_init);
1011
1012 static void __exit ohci_hcd_mod_exit(void)
1013 {
1014 #ifdef PCI_DRIVER
1015         pci_unregister_driver(&PCI_DRIVER);
1016 #endif
1017 #ifdef SA1111_DRIVER
1018         sa1111_driver_unregister(&SA1111_DRIVER);
1019 #endif
1020 #ifdef OF_PLATFORM_DRIVER
1021         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1022 #endif
1023 #ifdef PLATFORM_DRIVER
1024         platform_driver_unregister(&PLATFORM_DRIVER);
1025 #endif
1026 #ifdef PS3_SYSTEM_BUS_DRIVER
1027         if (firmware_has_feature(FW_FEATURE_PS3_LV1))
1028                 ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1029 #endif
1030 }
1031 module_exit(ohci_hcd_mod_exit);
1032