2 * MPC8540 ADS Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "MPC8540ADS", "MPC85xxADS";
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>; // 33 MHz, from uboot
31 bus-frequency = <0>; // 166 MHz
32 clock-frequency = <0>; // 825 MHz, from uboot
38 device_type = "memory";
39 reg = <00000000 08000000>; // 128M at 0x0
45 #interrupt-cells = <2>;
47 ranges = <0 e0000000 00100000>;
48 reg = <e0000000 00100000>; // CCSRBAR 1M
53 compatible = "fsl-i2c";
56 interrupt-parent = <&mpic>;
64 compatible = "gianfar";
66 phy0: ethernet-phy@0 {
67 interrupt-parent = <&mpic>;
70 device_type = "ethernet-phy";
72 phy1: ethernet-phy@1 {
73 interrupt-parent = <&mpic>;
76 device_type = "ethernet-phy";
78 phy3: ethernet-phy@3 {
79 interrupt-parent = <&mpic>;
82 device_type = "ethernet-phy";
89 device_type = "network";
91 compatible = "gianfar";
93 address = [ 00 E0 0C 00 73 00 ];
94 local-mac-address = [ 00 E0 0C 00 73 00 ];
95 interrupts = <d 2 e 2 12 2>;
96 interrupt-parent = <&mpic>;
101 #address-cells = <1>;
103 device_type = "network";
105 compatible = "gianfar";
107 address = [ 00 E0 0C 00 73 01 ];
108 local-mac-address = [ 00 E0 0C 00 73 01 ];
109 interrupts = <13 2 14 2 18 2>;
110 interrupt-parent = <&mpic>;
111 phy-handle = <&phy1>;
115 #address-cells = <1>;
117 device_type = "network";
119 compatible = "gianfar";
121 address = [ 00 E0 0C 00 73 02 ];
122 local-mac-address = [ 00 E0 0C 00 73 02 ];
124 interrupt-parent = <&mpic>;
125 phy-handle = <&phy3>;
129 device_type = "serial";
130 compatible = "ns16550";
131 reg = <4500 100>; // reg base, size
132 clock-frequency = <0>; // should we fill in in uboot?
134 interrupt-parent = <&mpic>;
138 device_type = "serial";
139 compatible = "ns16550";
140 reg = <4600 100>; // reg base, size
141 clock-frequency = <0>; // should we fill in in uboot?
143 interrupt-parent = <&mpic>;
146 interrupt-map-mask = <f800 0 0 7>;
150 1000 0 0 1 &mpic 31 1
151 1000 0 0 2 &mpic 32 1
152 1000 0 0 3 &mpic 33 1
153 1000 0 0 4 &mpic 34 1
156 1800 0 0 1 &mpic 34 1
157 1800 0 0 2 &mpic 31 1
158 1800 0 0 3 &mpic 32 1
159 1800 0 0 4 &mpic 33 1
162 2000 0 0 1 &mpic 33 1
163 2000 0 0 2 &mpic 34 1
164 2000 0 0 3 &mpic 31 1
165 2000 0 0 4 &mpic 32 1
168 2800 0 0 1 &mpic 32 1
169 2800 0 0 2 &mpic 33 1
170 2800 0 0 3 &mpic 34 1
171 2800 0 0 4 &mpic 31 1
174 6000 0 0 1 &mpic 31 1
175 6000 0 0 2 &mpic 32 1
176 6000 0 0 3 &mpic 33 1
177 6000 0 0 4 &mpic 34 1
180 6800 0 0 1 &mpic 34 1
181 6800 0 0 2 &mpic 31 1
182 6800 0 0 3 &mpic 32 1
183 6800 0 0 4 &mpic 33 1
186 7000 0 0 1 &mpic 33 1
187 7000 0 0 2 &mpic 34 1
188 7000 0 0 3 &mpic 31 1
189 7000 0 0 4 &mpic 32 1
192 7800 0 0 1 &mpic 32 1
193 7800 0 0 2 &mpic 33 1
194 7800 0 0 3 &mpic 34 1
195 7800 0 0 4 &mpic 31 1
198 9000 0 0 1 &mpic 31 1
199 9000 0 0 2 &mpic 32 1
200 9000 0 0 3 &mpic 33 1
201 9000 0 0 4 &mpic 34 1
204 9800 0 0 1 &mpic 34 1
205 9800 0 0 2 &mpic 31 1
206 9800 0 0 3 &mpic 32 1
207 9800 0 0 4 &mpic 33 1
210 a000 0 0 1 &mpic 33 1
211 a000 0 0 2 &mpic 34 1
212 a000 0 0 3 &mpic 31 1
213 a000 0 0 4 &mpic 32 1
216 a800 0 0 1 &mpic 32 1
217 a800 0 0 2 &mpic 33 1
218 a800 0 0 3 &mpic 34 1
219 a800 0 0 4 &mpic 31 1>;
220 interrupt-parent = <&mpic>;
223 ranges = <02000000 0 80000000 80000000 0 20000000
224 01000000 0 00000000 e2000000 0 00100000>;
225 clock-frequency = <3f940aa>;
226 #interrupt-cells = <1>;
228 #address-cells = <3>;
235 clock-frequency = <0>;
236 interrupt-controller;
237 #address-cells = <0>;
238 #interrupt-cells = <2>;
241 compatible = "chrp,open-pic";
242 device_type = "open-pic";