2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
30 #include <linux/skbuff.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
36 #include "pasemi_mac.h"
41 * - Get rid of pci_{read,write}_config(), map registers with ioremap
46 * - Other performance improvements
50 /* Must be a power of two */
51 #define RX_RING_SIZE 512
52 #define TX_RING_SIZE 512
54 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
55 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
56 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
57 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
58 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
60 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
62 /* XXXOJN these should come out of the device tree some day */
63 #define PAS_DMA_CAP_BASE 0xe00d0040
64 #define PAS_DMA_CAP_SIZE 0x100
65 #define PAS_DMA_COM_BASE 0xe00d0100
66 #define PAS_DMA_COM_SIZE 0x100
68 static struct pasdma_status *dma_status;
70 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
72 struct pci_dev *pdev = mac->pdev;
73 struct device_node *dn = pci_device_to_OF_node(pdev);
79 "No device node for mac, not configuring\n");
83 maddr = get_property(dn, "mac-address", NULL);
86 "no mac address in device tree, not configuring\n");
90 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
91 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
93 "can't parse mac address, not configuring\n");
97 memcpy(mac->mac_addr, addr, sizeof(addr));
101 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
103 struct pasemi_mac_rxring *ring;
104 struct pasemi_mac *mac = netdev_priv(dev);
105 int chan_id = mac->dma_rxch;
107 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
112 spin_lock_init(&ring->lock);
114 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
115 RX_RING_SIZE, GFP_KERNEL);
117 if (!ring->desc_info)
120 /* Allocate descriptors */
121 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
123 sizeof(struct pas_dma_xct_descr),
124 &ring->dma, GFP_KERNEL);
129 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
131 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
132 RX_RING_SIZE * sizeof(u64),
133 &ring->buf_dma, GFP_KERNEL);
137 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
139 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
140 PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
142 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
143 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
144 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
146 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
147 PAS_DMA_RXCHAN_CFG_HBU(1));
149 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
150 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
152 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
153 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
154 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
156 ring->next_to_fill = 0;
157 ring->next_to_clean = 0;
159 snprintf(ring->irq_name, sizeof(ring->irq_name),
166 dma_free_coherent(&mac->dma_pdev->dev,
167 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
168 mac->rx->desc, mac->rx->dma);
170 kfree(ring->desc_info);
178 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
180 struct pasemi_mac *mac = netdev_priv(dev);
182 int chan_id = mac->dma_txch;
183 struct pasemi_mac_txring *ring;
185 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
189 spin_lock_init(&ring->lock);
191 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
192 TX_RING_SIZE, GFP_KERNEL);
193 if (!ring->desc_info)
196 /* Allocate descriptors */
197 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
199 sizeof(struct pas_dma_xct_descr),
200 &ring->dma, GFP_KERNEL);
204 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
206 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
207 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
208 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
209 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
211 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
213 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
214 PAS_DMA_TXCHAN_CFG_TY_IFACE |
215 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
216 PAS_DMA_TXCHAN_CFG_UP |
217 PAS_DMA_TXCHAN_CFG_WT(2));
219 ring->next_to_use = 0;
220 ring->next_to_clean = 0;
222 snprintf(ring->irq_name, sizeof(ring->irq_name),
229 kfree(ring->desc_info);
236 static void pasemi_mac_free_tx_resources(struct net_device *dev)
238 struct pasemi_mac *mac = netdev_priv(dev);
240 struct pasemi_mac_buffer *info;
241 struct pas_dma_xct_descr *dp;
243 for (i = 0; i < TX_RING_SIZE; i++) {
244 info = &TX_DESC_INFO(mac, i);
245 dp = &TX_DESC(mac, i);
248 pci_unmap_single(mac->dma_pdev,
252 dev_kfree_skb_any(info->skb);
261 dma_free_coherent(&mac->dma_pdev->dev,
262 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
263 mac->tx->desc, mac->tx->dma);
265 kfree(mac->tx->desc_info);
270 static void pasemi_mac_free_rx_resources(struct net_device *dev)
272 struct pasemi_mac *mac = netdev_priv(dev);
274 struct pasemi_mac_buffer *info;
275 struct pas_dma_xct_descr *dp;
277 for (i = 0; i < RX_RING_SIZE; i++) {
278 info = &RX_DESC_INFO(mac, i);
279 dp = &RX_DESC(mac, i);
282 pci_unmap_single(mac->dma_pdev,
286 dev_kfree_skb_any(info->skb);
295 dma_free_coherent(&mac->dma_pdev->dev,
296 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
297 mac->rx->desc, mac->rx->dma);
299 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
300 mac->rx->buffers, mac->rx->buf_dma);
302 kfree(mac->rx->desc_info);
307 static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
309 struct pasemi_mac *mac = netdev_priv(dev);
311 int start = mac->rx->next_to_fill;
314 count = (mac->rx->next_to_clean + RX_RING_SIZE -
315 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
317 /* Check to see if we're doing first-time setup */
318 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
319 count = RX_RING_SIZE;
324 for (i = start; i < start + count; i++) {
325 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
326 u64 *buff = &RX_BUFF(mac, i);
330 skb = dev_alloc_skb(BUF_SIZE);
337 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
340 if (dma_mapping_error(dma)) {
341 dev_kfree_skb_irq(info->skb);
348 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
353 pci_write_config_dword(mac->dma_pdev,
354 PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
356 pci_write_config_dword(mac->dma_pdev,
357 PAS_DMA_RXINT_INCR(mac->dma_if),
360 mac->rx->next_to_fill += count;
363 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
368 spin_lock(&mac->rx->lock);
370 start = mac->rx->next_to_clean;
373 for (i = start; i < (start + RX_RING_SIZE) && count < limit; i++) {
374 struct pas_dma_xct_descr *dp;
375 struct pasemi_mac_buffer *info;
382 dp = &RX_DESC(mac, i);
384 if (!(dp->macrx & XCT_MACRX_O))
391 /* We have to scan for our skb since there's no way
392 * to back-map them from the descriptor, and if we
393 * have several receive channels then they might not
394 * show up in the same order as they were put on the
398 dma = (dp->ptr & XCT_PTR_ADDR_M);
399 for (j = start; j < (start + RX_RING_SIZE); j++) {
400 info = &RX_DESC_INFO(mac, j);
401 if (info->dma == dma)
406 BUG_ON(info->dma != dma);
408 pci_unmap_single(mac->dma_pdev, info->dma, info->skb->len,
413 len = (dp->macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
417 skb->protocol = eth_type_trans(skb, mac->netdev);
419 if ((dp->macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
420 skb->ip_summed = CHECKSUM_COMPLETE;
421 skb->csum = (dp->macrx & XCT_MACRX_CSUM_M) >>
424 skb->ip_summed = CHECKSUM_NONE;
426 mac->stats.rx_bytes += len;
427 mac->stats.rx_packets++;
429 netif_receive_skb(skb);
437 mac->rx->next_to_clean += count;
438 pasemi_mac_replenish_rx_ring(mac->netdev);
440 spin_unlock(&mac->rx->lock);
445 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
448 struct pasemi_mac_buffer *info;
449 struct pas_dma_xct_descr *dp;
453 spin_lock_irqsave(&mac->tx->lock, flags);
455 start = mac->tx->next_to_clean;
458 for (i = start; i < mac->tx->next_to_use; i++) {
459 dp = &TX_DESC(mac, i);
460 if (!dp || (dp->mactx & XCT_MACTX_O))
465 info = &TX_DESC_INFO(mac, i);
467 pci_unmap_single(mac->dma_pdev, info->dma,
468 info->skb->len, PCI_DMA_TODEVICE);
469 dev_kfree_skb_irq(info->skb);
476 mac->tx->next_to_clean += count;
477 spin_unlock_irqrestore(&mac->tx->lock, flags);
483 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
485 struct net_device *dev = data;
486 struct pasemi_mac *mac = netdev_priv(dev);
489 if (!(*mac->rx_status & PAS_STATUS_INT))
492 netif_rx_schedule(dev);
493 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
494 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0));
496 reg = PAS_IOB_DMA_RXCH_RESET_PINTC | PAS_IOB_DMA_RXCH_RESET_SINTC |
497 PAS_IOB_DMA_RXCH_RESET_DINTC;
498 if (*mac->rx_status & PAS_STATUS_TIMER)
499 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
501 pci_write_config_dword(mac->iob_pdev,
502 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
508 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
510 struct net_device *dev = data;
511 struct pasemi_mac *mac = netdev_priv(dev);
515 was_full = mac->tx->next_to_clean - mac->tx->next_to_use == TX_RING_SIZE;
517 if (!(*mac->tx_status & PAS_STATUS_INT))
520 pasemi_mac_clean_tx(mac);
522 reg = PAS_IOB_DMA_TXCH_RESET_PINTC | PAS_IOB_DMA_TXCH_RESET_SINTC;
523 if (*mac->tx_status & PAS_STATUS_TIMER)
524 reg |= PAS_IOB_DMA_TXCH_RESET_TINTC;
526 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
530 netif_wake_queue(dev);
535 static int pasemi_mac_open(struct net_device *dev)
537 struct pasemi_mac *mac = netdev_priv(dev);
541 /* enable rx section */
542 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
543 PAS_DMA_COM_RXCMD_EN);
545 /* enable tx section */
546 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
547 PAS_DMA_COM_TXCMD_EN);
549 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
550 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
551 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
553 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
555 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
556 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
558 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
560 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
561 PAS_IOB_DMA_RXCH_CFG_CNTTH(30));
563 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
564 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
566 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
568 ret = pasemi_mac_setup_rx_resources(dev);
570 goto out_rx_resources;
572 ret = pasemi_mac_setup_tx_resources(dev);
574 goto out_tx_resources;
576 pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
577 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
578 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
581 pci_write_config_dword(mac->dma_pdev,
582 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
583 PAS_DMA_RXINT_RCMDSTA_EN);
585 /* enable rx channel */
586 pci_write_config_dword(mac->dma_pdev,
587 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
588 PAS_DMA_RXCHAN_CCMDSTA_EN |
589 PAS_DMA_RXCHAN_CCMDSTA_DU);
591 /* enable tx channel */
592 pci_write_config_dword(mac->dma_pdev,
593 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
594 PAS_DMA_TXCHAN_TCMDSTA_EN);
596 pasemi_mac_replenish_rx_ring(dev);
598 netif_start_queue(dev);
599 netif_poll_enable(dev);
601 ret = request_irq(mac->dma_pdev->irq + mac->dma_txch,
602 &pasemi_mac_tx_intr, IRQF_DISABLED,
603 mac->tx->irq_name, dev);
605 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
606 mac->dma_pdev->irq + mac->dma_txch, ret);
610 ret = request_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch,
611 &pasemi_mac_rx_intr, IRQF_DISABLED,
612 mac->rx->irq_name, dev);
614 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
615 mac->dma_pdev->irq + 20 + mac->dma_rxch, ret);
622 free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
624 netif_poll_disable(dev);
625 netif_stop_queue(dev);
626 pasemi_mac_free_tx_resources(dev);
628 pasemi_mac_free_rx_resources(dev);
634 #define MAX_RETRIES 5000
636 static int pasemi_mac_close(struct net_device *dev)
638 struct pasemi_mac *mac = netdev_priv(dev);
642 netif_stop_queue(dev);
644 /* Clean out any pending buffers */
645 pasemi_mac_clean_tx(mac);
646 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
648 /* Disable interface */
649 pci_write_config_dword(mac->dma_pdev,
650 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
651 PAS_DMA_TXCHAN_TCMDSTA_ST);
652 pci_write_config_dword(mac->dma_pdev,
653 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
654 PAS_DMA_RXINT_RCMDSTA_ST);
655 pci_write_config_dword(mac->dma_pdev,
656 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
657 PAS_DMA_RXCHAN_CCMDSTA_ST);
659 for (retries = 0; retries < MAX_RETRIES; retries++) {
660 pci_read_config_dword(mac->dma_pdev,
661 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
663 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
668 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)) {
669 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
672 for (retries = 0; retries < MAX_RETRIES; retries++) {
673 pci_read_config_dword(mac->dma_pdev,
674 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
676 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
681 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)) {
682 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
685 for (retries = 0; retries < MAX_RETRIES; retries++) {
686 pci_read_config_dword(mac->dma_pdev,
687 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
689 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
694 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT)) {
695 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
698 /* Then, disable the channel. This must be done separately from
699 * stopping, since you can't disable when active.
702 pci_write_config_dword(mac->dma_pdev,
703 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
704 pci_write_config_dword(mac->dma_pdev,
705 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
706 pci_write_config_dword(mac->dma_pdev,
707 PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
709 free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
710 free_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch, dev);
713 pasemi_mac_free_rx_resources(dev);
714 pasemi_mac_free_tx_resources(dev);
719 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
721 struct pasemi_mac *mac = netdev_priv(dev);
722 struct pasemi_mac_txring *txring;
723 struct pasemi_mac_buffer *info;
724 struct pas_dma_xct_descr *dp;
729 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
731 if (skb->ip_summed == CHECKSUM_PARTIAL) {
732 const unsigned char *nh = skb_network_header(skb);
734 switch (ip_hdr(skb)->protocol) {
736 dflags |= XCT_MACTX_CSUM_TCP;
737 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
738 dflags |= XCT_MACTX_IPO(nh - skb->data);
741 dflags |= XCT_MACTX_CSUM_UDP;
742 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
743 dflags |= XCT_MACTX_IPO(nh - skb->data);
748 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
750 if (dma_mapping_error(map))
751 return NETDEV_TX_BUSY;
755 spin_lock_irqsave(&txring->lock, flags);
757 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
758 spin_unlock_irqrestore(&txring->lock, flags);
759 pasemi_mac_clean_tx(mac);
760 spin_lock_irqsave(&txring->lock, flags);
762 if (txring->next_to_clean - txring->next_to_use ==
764 /* Still no room -- stop the queue and wait for tx
765 * intr when there's room.
767 netif_stop_queue(dev);
773 dp = &TX_DESC(mac, txring->next_to_use);
774 info = &TX_DESC_INFO(mac, txring->next_to_use);
776 dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
777 dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
781 txring->next_to_use++;
782 mac->stats.tx_packets++;
783 mac->stats.tx_bytes += skb->len;
785 spin_unlock_irqrestore(&txring->lock, flags);
787 pci_write_config_dword(mac->dma_pdev,
788 PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
793 spin_unlock_irqrestore(&txring->lock, flags);
794 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
795 return NETDEV_TX_BUSY;
798 static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
800 struct pasemi_mac *mac = netdev_priv(dev);
805 static void pasemi_mac_set_rx_mode(struct net_device *dev)
807 struct pasemi_mac *mac = netdev_priv(dev);
810 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
812 /* Set promiscuous */
813 if (dev->flags & IFF_PROMISC)
814 flags |= PAS_MAC_CFG_PCFG_PR;
816 flags &= ~PAS_MAC_CFG_PCFG_PR;
818 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
822 static int pasemi_mac_poll(struct net_device *dev, int *budget)
824 int pkts, limit = min(*budget, dev->quota);
825 struct pasemi_mac *mac = netdev_priv(dev);
827 pkts = pasemi_mac_clean_rx(mac, limit);
830 /* all done, no more packets present */
831 netif_rx_complete(dev);
833 /* re-enable receive interrupts */
834 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
835 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
838 /* used up our quantum, so reschedule */
846 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
848 static int index = 0;
849 struct net_device *dev;
850 struct pasemi_mac *mac;
853 err = pci_enable_device(pdev);
857 dev = alloc_etherdev(sizeof(struct pasemi_mac));
860 "pasemi_mac: Could not allocate ethernet device.\n");
862 goto out_disable_device;
865 SET_MODULE_OWNER(dev);
866 pci_set_drvdata(pdev, dev);
867 SET_NETDEV_DEV(dev, &pdev->dev);
869 mac = netdev_priv(dev);
873 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
875 if (!mac->dma_pdev) {
876 dev_err(&pdev->dev, "Can't find DMA Controller\n");
878 goto out_free_netdev;
881 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
883 if (!mac->iob_pdev) {
884 dev_err(&pdev->dev, "Can't find I/O Bridge\n");
886 goto out_put_dma_pdev;
889 /* These should come out of the device tree eventually */
890 mac->dma_txch = index;
891 mac->dma_rxch = index;
893 /* We probe GMAC before XAUI, but the DMA interfaces are
894 * in XAUI, GMAC order.
897 mac->dma_if = index + 2;
899 mac->dma_if = index - 4;
902 switch (pdev->device) {
904 mac->type = MAC_TYPE_GMAC;
907 mac->type = MAC_TYPE_XAUI;
914 /* get mac addr from device tree */
915 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
919 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
921 dev->open = pasemi_mac_open;
922 dev->stop = pasemi_mac_close;
923 dev->hard_start_xmit = pasemi_mac_start_tx;
924 dev->get_stats = pasemi_mac_get_stats;
925 dev->set_multicast_list = pasemi_mac_set_rx_mode;
927 dev->poll = pasemi_mac_poll;
928 dev->features = NETIF_F_HW_CSUM;
930 /* The dma status structure is located in the I/O bridge, and
934 /* XXXOJN This should come from the device tree */
935 dma_status = __ioremap(0xfd800000, 0x1000, 0);
937 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
938 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
940 err = register_netdev(dev);
943 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
947 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
948 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
949 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
950 mac->dma_if, mac->dma_txch, mac->dma_rxch,
951 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
952 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
957 pci_dev_put(mac->iob_pdev);
959 pci_dev_put(mac->dma_pdev);
963 pci_disable_device(pdev);
968 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
970 struct net_device *netdev = pci_get_drvdata(pdev);
971 struct pasemi_mac *mac;
976 mac = netdev_priv(netdev);
978 unregister_netdev(netdev);
980 pci_disable_device(pdev);
981 pci_dev_put(mac->dma_pdev);
982 pci_dev_put(mac->iob_pdev);
984 pci_set_drvdata(pdev, NULL);
988 static struct pci_device_id pasemi_mac_pci_tbl[] = {
989 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
990 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
993 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
995 static struct pci_driver pasemi_mac_driver = {
996 .name = "pasemi_mac",
997 .id_table = pasemi_mac_pci_tbl,
998 .probe = pasemi_mac_probe,
999 .remove = __devexit_p(pasemi_mac_remove),
1002 static void __exit pasemi_mac_cleanup_module(void)
1004 pci_unregister_driver(&pasemi_mac_driver);
1005 __iounmap(dma_status);
1009 int pasemi_mac_init_module(void)
1011 return pci_register_driver(&pasemi_mac_driver);
1014 MODULE_LICENSE("GPL");
1015 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
1016 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
1018 module_init(pasemi_mac_init_module);
1019 module_exit(pasemi_mac_cleanup_module);