2 * pata_atiixp.c - ATI PATA for new ATA layer
7 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
9 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
10 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/blkdev.h>
19 #include <linux/delay.h>
20 #include <scsi/scsi_host.h>
21 #include <linux/libata.h>
23 #define DRV_NAME "pata_atiixp"
24 #define DRV_VERSION "0.4.6"
27 ATIIXP_IDE_PIO_TIMING = 0x40,
28 ATIIXP_IDE_MWDMA_TIMING = 0x44,
29 ATIIXP_IDE_PIO_CONTROL = 0x48,
30 ATIIXP_IDE_PIO_MODE = 0x4a,
31 ATIIXP_IDE_UDMA_CONTROL = 0x54,
32 ATIIXP_IDE_UDMA_MODE = 0x56
35 static int atiixp_pre_reset(struct ata_link *link, unsigned long deadline)
37 struct ata_port *ap = link->ap;
38 static const struct pci_bits atiixp_enable_bits[] = {
39 { 0x48, 1, 0x01, 0x00 },
40 { 0x48, 1, 0x08, 0x00 }
42 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
44 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no]))
47 return ata_sff_prereset(link, deadline);
50 static int atiixp_cable_detect(struct ata_port *ap)
52 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
55 /* Hack from drivers/ide/pci. Really we want to know how to do the
56 raw detection not play follow the bios mode guess */
57 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
58 if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
59 return ATA_CBL_PATA80;
60 return ATA_CBL_PATA40;
64 * atiixp_set_pio_timing - set initial PIO mode data
68 * Called by both the pio and dma setup functions to set the controller
69 * timings for PIO transfers. We must load both the mode number and
70 * timing values into the controller.
73 static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
75 static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
77 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
78 int dn = 2 * ap->port_no + adev->devno;
80 /* Check this is correct - the order is odd in both drivers */
81 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
82 u16 pio_mode_data, pio_timing_data;
84 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
85 pio_mode_data &= ~(0x7 << (4 * dn));
86 pio_mode_data |= pio << (4 * dn);
87 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
89 pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
90 pio_timing_data &= ~(0xFF << timing_shift);
91 pio_timing_data |= (pio_timings[pio] << timing_shift);
92 pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
96 * atiixp_set_piomode - set initial PIO mode data
100 * Called to do the PIO mode setup. We use a shared helper for this
101 * as the DMA setup must also adjust the PIO timing information.
104 static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
106 atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
110 * atiixp_set_dmamode - set initial DMA mode data
114 * Called to do the DMA mode setup. We use timing tables for most
115 * modes but must tune an appropriate PIO mode to match.
118 static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
120 static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
122 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
123 int dma = adev->dma_mode;
124 int dn = 2 * ap->port_no + adev->devno;
127 if (adev->dma_mode >= XFER_UDMA_0) {
132 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
133 udma_mode_data &= ~(0x7 << (4 * dn));
134 udma_mode_data |= dma << (4 * dn);
135 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
137 u16 mwdma_timing_data;
138 /* Check this is correct - the order is odd in both drivers */
139 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
141 dma -= XFER_MW_DMA_0;
143 pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
144 mwdma_timing_data &= ~(0xFF << timing_shift);
145 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
146 pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
149 * We must now look at the PIO mode situation. We may need to
150 * adjust the PIO mode to keep the timings acceptable
152 if (adev->dma_mode >= XFER_MW_DMA_2)
154 else if (adev->dma_mode == XFER_MW_DMA_1)
156 else if (adev->dma_mode == XFER_MW_DMA_0)
160 if (adev->pio_mode != wanted_pio)
161 atiixp_set_pio_timing(ap, adev, wanted_pio);
165 * atiixp_bmdma_start - DMA start callback
166 * @qc: Command in progress
168 * When DMA begins we need to ensure that the UDMA control
169 * register for the channel is correctly set.
171 * Note: The host lock held by the libata layer protects
172 * us from two channels both trying to set DMA bits at once
175 static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
177 struct ata_port *ap = qc->ap;
178 struct ata_device *adev = qc->dev;
180 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
181 int dn = (2 * ap->port_no) + adev->devno;
184 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
185 if (ata_using_udma(adev))
189 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
194 * atiixp_dma_stop - DMA stop callback
195 * @qc: Command in progress
197 * DMA has completed. Clear the UDMA flag as the next operations will
198 * be PIO ones not UDMA data transfer.
200 * Note: The host lock held by the libata layer protects
201 * us from two channels both trying to set DMA bits at once
204 static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
206 struct ata_port *ap = qc->ap;
207 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
208 int dn = (2 * ap->port_no) + qc->dev->devno;
211 pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
213 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
217 static struct scsi_host_template atiixp_sht = {
218 ATA_BMDMA_SHT(DRV_NAME),
219 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
222 static struct ata_port_operations atiixp_port_ops = {
223 .inherits = &ata_bmdma_port_ops,
225 .qc_prep = ata_sff_dumb_qc_prep,
226 .bmdma_start = atiixp_bmdma_start,
227 .bmdma_stop = atiixp_bmdma_stop,
229 .cable_detect = atiixp_cable_detect,
230 .set_piomode = atiixp_set_piomode,
231 .set_dmamode = atiixp_set_dmamode,
232 .prereset = atiixp_pre_reset,
235 static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
237 static const struct ata_port_info info = {
238 .flags = ATA_FLAG_SLAVE_POSS,
240 .mwdma_mask = 0x06, /* No MWDMA0 support */
242 .port_ops = &atiixp_port_ops
244 const struct ata_port_info *ppi[] = { &info, NULL };
245 return ata_pci_sff_init_one(dev, ppi, &atiixp_sht, NULL);
248 static const struct pci_device_id atiixp[] = {
249 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
250 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
251 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
252 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
253 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), },
258 static struct pci_driver atiixp_pci_driver = {
261 .probe = atiixp_init_one,
262 .remove = ata_pci_remove_one,
264 .resume = ata_pci_device_resume,
265 .suspend = ata_pci_device_suspend,
269 static int __init atiixp_init(void)
271 return pci_register_driver(&atiixp_pci_driver);
275 static void __exit atiixp_exit(void)
277 pci_unregister_driver(&atiixp_pci_driver);
280 MODULE_AUTHOR("Alan Cox");
281 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
282 MODULE_LICENSE("GPL");
283 MODULE_DEVICE_TABLE(pci, atiixp);
284 MODULE_VERSION(DRV_VERSION);
286 module_init(atiixp_init);
287 module_exit(atiixp_exit);