2 * arch/arm/mach-orion5x/mpp.c
4 * MPP functions for Marvell Orion 5x SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/mbus.h>
14 #include <mach/hardware.h>
19 static int is_5181l(void)
24 orion5x_pcie_id(&dev, &rev);
26 return !!(dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0);
29 static int is_5182(void)
34 orion5x_pcie_id(&dev, &rev);
36 return !!(dev == MV88F5182_DEV_ID);
39 static int is_5281(void)
44 orion5x_pcie_id(&dev, &rev);
46 return !!(dev == MV88F5281_DEV_ID);
49 static int __init determine_type_encoding(int mpp, enum orion5x_mpp_type type)
56 if (mpp >= 1 && mpp <= 15)
58 if (mpp >= 16 && mpp <= 19) {
61 if (type == MPP_UNUSED)
66 case MPP_PCIE_RST_OUTn:
72 if (mpp >= 0 && mpp <= 7)
82 if (mpp >= 8 && mpp <= 19)
87 if (is_5182() || is_5281()) {
88 if (mpp >= 4 && mpp <= 7)
90 if (mpp >= 12 && mpp <= 17)
96 if (is_5181l() && mpp >= 6 && mpp <= 7)
102 if (mpp >= 4 && mpp <= 7)
104 if (mpp >= 12 && mpp <= 15)
110 if (mpp >= 16 && mpp <= 19)
115 printk(KERN_INFO "unknown MPP type %d\n", type);
120 void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
122 u32 mpp_0_7_ctrl = readl(MPP_0_7_CTRL);
123 u32 mpp_8_15_ctrl = readl(MPP_8_15_CTRL);
124 u32 mpp_16_19_ctrl = readl(MPP_16_19_CTRL);
126 while (mode->mpp >= 0) {
131 if (mode->mpp >= 0 && mode->mpp <= 7)
133 else if (mode->mpp >= 8 && mode->mpp <= 15)
134 reg = &mpp_8_15_ctrl;
135 else if (mode->mpp >= 16 && mode->mpp <= 19)
136 reg = &mpp_16_19_ctrl;
138 printk(KERN_ERR "orion5x_mpp_conf: invalid MPP "
139 "(%d)\n", mode->mpp);
143 num_type = determine_type_encoding(mode->mpp, mode->type);
145 printk(KERN_ERR "orion5x_mpp_conf: invalid MPP "
146 "combination (%d, %d)\n", mode->mpp,
151 shift = (mode->mpp & 7) << 2;
152 *reg &= ~(0xf << shift);
153 *reg |= (num_type & 0xf) << shift;
155 orion5x_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
160 writel(mpp_0_7_ctrl, MPP_0_7_CTRL);
161 writel(mpp_8_15_ctrl, MPP_8_15_CTRL);
162 writel(mpp_16_19_ctrl, MPP_16_19_CTRL);