2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
43 #include <linux/mmzone.h>
44 #include <linux/kexec.h>
45 #include <linux/cpufreq.h>
48 #include <asm/uaccess.h>
49 #include <asm/system.h>
54 #include <video/edid.h>
57 #include <asm/mpspec.h>
58 #include <asm/mmu_context.h>
59 #include <asm/bootsetup.h>
60 #include <asm/proto.h>
61 #include <asm/setup.h>
62 #include <asm/mach_apic.h>
64 #include <asm/sections.h>
70 struct cpuinfo_x86 boot_cpu_data __read_mostly;
72 unsigned long mmu_cr4_features;
75 EXPORT_SYMBOL(acpi_disabled);
77 extern int __initdata acpi_ht;
78 extern acpi_interrupt_flags acpi_sci_flags;
79 int __initdata acpi_force = 0;
82 int acpi_numa __initdata;
84 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
87 unsigned long saved_video_mode;
91 EXPORT_SYMBOL(swiotlb);
97 struct drive_info_struct { char dummy[32]; } drive_info;
98 struct screen_info screen_info;
99 struct sys_desc_table_struct {
100 unsigned short length;
101 unsigned char table[0];
104 struct edid_info edid_info;
107 extern int root_mountflags;
109 char command_line[COMMAND_LINE_SIZE];
111 struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
132 #define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
135 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
137 struct resource data_resource = {
138 .name = "Kernel data",
141 .flags = IORESOURCE_RAM,
143 struct resource code_resource = {
144 .name = "Kernel code",
147 .flags = IORESOURCE_RAM,
150 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
152 static struct resource system_rom_resource = {
153 .name = "System ROM",
156 .flags = IORESOURCE_ROM,
159 static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
163 .flags = IORESOURCE_ROM,
166 static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
181 #define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
184 static struct resource video_rom_resource = {
188 .flags = IORESOURCE_ROM,
191 static struct resource video_ram_resource = {
192 .name = "Video RAM area",
195 .flags = IORESOURCE_RAM,
198 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
200 static int __init romchecksum(unsigned char *rom, unsigned long length)
202 unsigned char *p, sum = 0;
204 for (p = rom; p < rom + length; p++)
209 static void __init probe_roms(void)
211 unsigned long start, length, upper;
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
222 video_rom_resource.start = start;
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
231 request_resource(&iomem_resource, &video_rom_resource);
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
270 start = adapter_rom_resources[i++].end & ~2047UL;
274 static __init void parse_cmdline_early (char ** cmdline_p)
276 char c = ' ', *to = command_line, *from = COMMAND_LINE;
279 /* Save unparsed command line copy for /proc/cmdline */
280 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
281 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
289 * If the BIOS enumerates physical processors before logical,
290 * maxcpus=N at enumeration-time can be used to disable HT.
292 else if (!memcmp(from, "maxcpus=", 8)) {
293 extern unsigned int maxcpus;
295 maxcpus = simple_strtoul(from + 8, NULL, 0);
299 /* "acpi=off" disables both ACPI table parsing and interpreter init */
300 if (!memcmp(from, "acpi=off", 8))
303 if (!memcmp(from, "acpi=force", 10)) {
304 /* add later when we do DMI horrors: */
309 /* acpi=ht just means: do ACPI MADT parsing
310 at bootup, but don't enable the full ACPI interpreter */
311 if (!memcmp(from, "acpi=ht", 7)) {
316 else if (!memcmp(from, "pci=noacpi", 10))
318 else if (!memcmp(from, "acpi=noirq", 10))
321 else if (!memcmp(from, "acpi_sci=edge", 13))
322 acpi_sci_flags.trigger = 1;
323 else if (!memcmp(from, "acpi_sci=level", 14))
324 acpi_sci_flags.trigger = 3;
325 else if (!memcmp(from, "acpi_sci=high", 13))
326 acpi_sci_flags.polarity = 1;
327 else if (!memcmp(from, "acpi_sci=low", 12))
328 acpi_sci_flags.polarity = 3;
330 /* acpi=strict disables out-of-spec workarounds */
331 else if (!memcmp(from, "acpi=strict", 11)) {
334 #ifdef CONFIG_X86_IO_APIC
335 else if (!memcmp(from, "acpi_skip_timer_override", 24))
336 acpi_skip_timer_override = 1;
340 if (!memcmp(from, "disable_timer_pin_1", 19))
341 disable_timer_pin_1 = 1;
342 if (!memcmp(from, "enable_timer_pin_1", 18))
343 disable_timer_pin_1 = -1;
345 if (!memcmp(from, "nolapic", 7) ||
346 !memcmp(from, "disableapic", 11))
349 if (!memcmp(from, "noapic", 6))
350 skip_ioapic_setup = 1;
352 if (!memcmp(from, "apic", 4)) {
353 skip_ioapic_setup = 0;
357 if (!memcmp(from, "mem=", 4))
358 parse_memopt(from+4, &from);
361 if (!memcmp(from, "numa=", 5))
365 #ifdef CONFIG_GART_IOMMU
366 if (!memcmp(from,"iommu=",6)) {
371 if (!memcmp(from,"oops=panic", 10))
374 if (!memcmp(from, "noexec=", 7))
375 nonx_setup(from + 7);
378 /* crashkernel=size@addr specifies the location to reserve for
379 * a crash kernel. By reserving this memory we guarantee
380 * that linux never set's it up as a DMA target.
381 * Useful for holding code to do something appropriate
382 * after a kernel panic.
384 else if (!memcmp(from, "crashkernel=", 12)) {
385 unsigned long size, base;
386 size = memparse(from+12, &from);
388 base = memparse(from+1, &from);
389 /* FIXME: Do I want a sanity check
390 * to validate the memory range?
392 crashk_res.start = base;
393 crashk_res.end = base + size - 1;
402 if (COMMAND_LINE_SIZE <= ++len)
407 *cmdline_p = command_line;
412 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
414 unsigned long bootmap_size, bootmap;
416 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
417 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
419 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
420 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
421 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
422 reserve_bootmem(bootmap, bootmap_size);
426 /* Use inline assembly to define this because the nops are defined
427 as inline assembly strings in the include files and we cannot
428 get them easily into strings. */
429 asm("\t.data\nk8nops: "
430 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
433 extern unsigned char k8nops[];
434 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
440 k8nops + 1 + 2 + 3 + 4,
441 k8nops + 1 + 2 + 3 + 4 + 5,
442 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
443 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
446 /* Replace instructions with better alternatives for this CPU type.
448 This runs before SMP is initialized to avoid SMP problems with
449 self modifying code. This implies that assymetric systems where
450 APs have less capabilities than the boot processor are not handled.
451 In this case boot with "noreplacement". */
452 void apply_alternatives(void *start, void *end)
456 for (a = start; (void *)a < end; a++) {
457 if (!boot_cpu_has(a->cpuid))
460 BUG_ON(a->replacementlen > a->instrlen);
461 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
462 diff = a->instrlen - a->replacementlen;
464 /* Pad the rest with nops */
465 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
469 __inline_memcpy(a->instr + i, k8_nops[k], k);
474 static int no_replacement __initdata = 0;
476 void __init alternative_instructions(void)
478 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
481 apply_alternatives(__alt_instructions, __alt_instructions_end);
484 static int __init noreplacement_setup(char *s)
490 __setup("noreplacement", noreplacement_setup);
492 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
494 #ifdef CONFIG_EDD_MODULE
498 * copy_edd() - Copy the BIOS EDD information
499 * from boot_params into a safe place.
502 static inline void copy_edd(void)
504 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
505 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
506 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
507 edd.edd_info_nr = EDD_NR;
510 static inline void copy_edd(void)
515 #define EBDA_ADDR_POINTER 0x40E
516 static void __init reserve_ebda_region(void)
520 * there is a real-mode segmented pointer pointing to the
521 * 4K EBDA area at 0x40E
523 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
526 reserve_bootmem_generic(addr, PAGE_SIZE);
529 void __init setup_arch(char **cmdline_p)
531 unsigned long kernel_end;
533 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
534 drive_info = DRIVE_INFO;
535 screen_info = SCREEN_INFO;
536 edid_info = EDID_INFO;
537 saved_video_mode = SAVED_VIDEO_MODE;
538 bootloader_type = LOADER_TYPE;
540 #ifdef CONFIG_BLK_DEV_RAM
541 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
542 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
543 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
545 setup_memory_region();
548 if (!MOUNT_ROOT_RDONLY)
549 root_mountflags &= ~MS_RDONLY;
550 init_mm.start_code = (unsigned long) &_text;
551 init_mm.end_code = (unsigned long) &_etext;
552 init_mm.end_data = (unsigned long) &_edata;
553 init_mm.brk = (unsigned long) &_end;
555 code_resource.start = virt_to_phys(&_text);
556 code_resource.end = virt_to_phys(&_etext)-1;
557 data_resource.start = virt_to_phys(&_etext);
558 data_resource.end = virt_to_phys(&_edata)-1;
560 parse_cmdline_early(cmdline_p);
562 early_identify_cpu(&boot_cpu_data);
565 * partially used pages are not usable - thus
566 * we are rounding upwards:
568 end_pfn = e820_end_of_ram();
572 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
578 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
579 * Call this early for SRAT node setup.
581 acpi_boot_table_init();
584 #ifdef CONFIG_ACPI_NUMA
586 * Parse SRAT to discover nodes.
592 numa_initmem_init(0, end_pfn);
594 contig_initmem_init(0, end_pfn);
597 /* Reserve direct mapping */
598 reserve_bootmem_generic(table_start << PAGE_SHIFT,
599 (table_end - table_start) << PAGE_SHIFT);
602 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
603 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
606 * reserve physical page 0 - it's a special BIOS page on many boxes,
607 * enabling clean reboots, SMP operation, laptop functions.
609 reserve_bootmem_generic(0, PAGE_SIZE);
611 /* reserve ebda region */
612 reserve_ebda_region();
616 * But first pinch a few for the stack/trampoline stuff
617 * FIXME: Don't need the extra page at 4K, but need to fix
618 * trampoline before removing it. (see the GDT stuff)
620 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
622 /* Reserve SMP trampoline */
623 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
626 #ifdef CONFIG_ACPI_SLEEP
628 * Reserve low memory region for sleep support.
630 acpi_reserve_bootmem();
632 #ifdef CONFIG_X86_LOCAL_APIC
634 * Find and reserve possible boot-time SMP configuration:
638 #ifdef CONFIG_BLK_DEV_INITRD
639 if (LOADER_TYPE && INITRD_START) {
640 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
641 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
643 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
644 initrd_end = initrd_start+INITRD_SIZE;
647 printk(KERN_ERR "initrd extends beyond end of memory "
648 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
649 (unsigned long)(INITRD_START + INITRD_SIZE),
650 (unsigned long)(end_pfn << PAGE_SHIFT));
656 if (crashk_res.start != crashk_res.end) {
657 reserve_bootmem(crashk_res.start,
658 crashk_res.end - crashk_res.start + 1);
668 * Read APIC and some other early information from ACPI tables.
673 #ifdef CONFIG_X86_LOCAL_APIC
675 * get boot-time SMP configuration:
677 if (smp_found_config)
679 init_apic_mappings();
683 * Request address space for all standard RAM and ROM resources
684 * and also for regions reported as reserved by the e820.
687 e820_reserve_resources();
689 request_resource(&iomem_resource, &video_ram_resource);
693 /* request I/O space for devices used on all i[345]86 PCs */
694 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
695 request_resource(&ioport_resource, &standard_io_resources[i]);
700 #ifdef CONFIG_GART_IOMMU
705 #if defined(CONFIG_VGA_CONSOLE)
706 conswitchp = &vga_con;
707 #elif defined(CONFIG_DUMMY_CONSOLE)
708 conswitchp = &dummy_con;
713 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
717 if (c->extended_cpuid_level < 0x80000004)
720 v = (unsigned int *) c->x86_model_id;
721 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
722 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
723 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
724 c->x86_model_id[48] = 0;
729 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
731 unsigned int n, dummy, eax, ebx, ecx, edx;
733 n = c->extended_cpuid_level;
735 if (n >= 0x80000005) {
736 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
737 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
738 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
739 c->x86_cache_size=(ecx>>24)+(edx>>24);
740 /* On K8 L1 TLB is inclusive, so don't count it */
744 if (n >= 0x80000006) {
745 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
746 ecx = cpuid_ecx(0x80000006);
747 c->x86_cache_size = ecx >> 16;
748 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
750 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
751 c->x86_cache_size, ecx & 0xFF);
755 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
756 if (n >= 0x80000008) {
757 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
758 c->x86_virt_bits = (eax >> 8) & 0xff;
759 c->x86_phys_bits = eax & 0xff;
764 static int nearby_node(int apicid)
767 for (i = apicid - 1; i >= 0; i--) {
768 int node = apicid_to_node[i];
769 if (node != NUMA_NO_NODE && node_online(node))
772 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
773 int node = apicid_to_node[i];
774 if (node != NUMA_NO_NODE && node_online(node))
777 return first_node(node_online_map); /* Shouldn't happen */
782 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
783 * Assumes number of cores is a power of two.
785 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
788 int cpu = smp_processor_id();
792 unsigned apicid = phys_proc_id[cpu];
796 while ((1 << bits) < c->x86_max_cores)
799 /* Low order bits define the core id (index of core in socket) */
800 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
801 /* Convert the APIC ID into the socket ID */
802 phys_proc_id[cpu] >>= bits;
805 node = phys_proc_id[cpu];
806 if (apicid_to_node[apicid] != NUMA_NO_NODE)
807 node = apicid_to_node[apicid];
808 if (!node_online(node)) {
809 /* Two possibilities here:
810 - The CPU is missing memory and no node was created.
811 In that case try picking one from a nearby CPU
812 - The APIC IDs differ from the HyperTransport node IDs
813 which the K8 northbridge parsing fills in.
814 Assume they are all increased by a constant offset,
815 but in the same order as the HT nodeids.
816 If that doesn't result in a usable node fall back to the
817 path for the previous case. */
818 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
819 if (ht_nodeid >= 0 &&
820 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
821 node = apicid_to_node[ht_nodeid];
822 /* Pick a nearby node */
823 if (!node_online(node))
824 node = nearby_node(apicid);
826 numa_set_node(cpu, node);
828 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
829 cpu, c->x86_max_cores, node, cpu_core_id[cpu]);
834 static int __init init_amd(struct cpuinfo_x86 *c)
843 * Disable TLB flush filter by setting HWCR.FFDIS on K8
844 * bit 6 of msr C001_0015
846 * Errata 63 for SH-B3 steppings
847 * Errata 122 for all steppings (F+ have it disabled by default)
850 rdmsrl(MSR_K8_HWCR, value);
852 wrmsrl(MSR_K8_HWCR, value);
856 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
857 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
858 clear_bit(0*32+31, &c->x86_capability);
861 level = cpuid_eax(1);
862 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
863 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
865 r = get_model_name(c);
869 /* Should distinguish Models here, but this is only
870 a fallback anyways. */
871 strcpy(c->x86_model_id, "Hammer");
875 display_cacheinfo(c);
877 if (c->extended_cpuid_level >= 0x80000008) {
878 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
879 if (c->x86_max_cores & (c->x86_max_cores - 1))
880 c->x86_max_cores = 1;
888 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
891 u32 eax, ebx, ecx, edx;
892 int index_msb, core_bits;
893 int cpu = smp_processor_id();
895 cpuid(1, &eax, &ebx, &ecx, &edx);
897 c->apicid = phys_pkg_id(0);
899 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
902 smp_num_siblings = (ebx & 0xff0000) >> 16;
904 if (smp_num_siblings == 1) {
905 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
906 } else if (smp_num_siblings > 1 ) {
908 if (smp_num_siblings > NR_CPUS) {
909 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
910 smp_num_siblings = 1;
914 index_msb = get_count_order(smp_num_siblings);
915 phys_proc_id[cpu] = phys_pkg_id(index_msb);
917 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
920 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
922 index_msb = get_count_order(smp_num_siblings) ;
924 core_bits = get_count_order(c->x86_max_cores);
926 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
927 ((1 << core_bits) - 1);
929 if (c->x86_max_cores > 1)
930 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
937 * find out the number of processor cores on the die
939 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
943 if (c->cpuid_level < 4)
952 return ((eax >> 26) + 1);
957 static void srat_detect_node(void)
961 int cpu = smp_processor_id();
963 /* Don't do the funky fallback heuristics the AMD version employs
965 node = apicid_to_node[hard_smp_processor_id()];
966 if (node == NUMA_NO_NODE)
968 numa_set_node(cpu, node);
971 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
975 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
980 init_intel_cacheinfo(c);
981 n = c->extended_cpuid_level;
982 if (n >= 0x80000008) {
983 unsigned eax = cpuid_eax(0x80000008);
984 c->x86_virt_bits = (eax >> 8) & 0xff;
985 c->x86_phys_bits = eax & 0xff;
986 /* CPUID workaround for Intel 0F34 CPU */
987 if (c->x86_vendor == X86_VENDOR_INTEL &&
988 c->x86 == 0xF && c->x86_model == 0x3 &&
990 c->x86_phys_bits = 36;
994 c->x86_cache_alignment = c->x86_clflush_size * 2;
996 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
997 c->x86_max_cores = intel_num_cpu_cores(c);
1002 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1004 char *v = c->x86_vendor_id;
1006 if (!strcmp(v, "AuthenticAMD"))
1007 c->x86_vendor = X86_VENDOR_AMD;
1008 else if (!strcmp(v, "GenuineIntel"))
1009 c->x86_vendor = X86_VENDOR_INTEL;
1011 c->x86_vendor = X86_VENDOR_UNKNOWN;
1014 struct cpu_model_info {
1017 char *model_names[16];
1020 /* Do some early cpuid on the boot CPU to get some parameter that are
1021 needed before check_bugs. Everything advanced is in identify_cpu
1023 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1027 c->loops_per_jiffy = loops_per_jiffy;
1028 c->x86_cache_size = -1;
1029 c->x86_vendor = X86_VENDOR_UNKNOWN;
1030 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1031 c->x86_vendor_id[0] = '\0'; /* Unset */
1032 c->x86_model_id[0] = '\0'; /* Unset */
1033 c->x86_clflush_size = 64;
1034 c->x86_cache_alignment = c->x86_clflush_size;
1035 c->x86_max_cores = 1;
1036 c->extended_cpuid_level = 0;
1037 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1039 /* Get vendor name */
1040 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1041 (unsigned int *)&c->x86_vendor_id[0],
1042 (unsigned int *)&c->x86_vendor_id[8],
1043 (unsigned int *)&c->x86_vendor_id[4]);
1047 /* Initialize the standard set of capabilities */
1048 /* Note that the vendor-specific code below might override */
1050 /* Intel-defined flags: level 0x00000001 */
1051 if (c->cpuid_level >= 0x00000001) {
1053 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1054 &c->x86_capability[0]);
1055 c->x86 = (tfms >> 8) & 0xf;
1056 c->x86_model = (tfms >> 4) & 0xf;
1057 c->x86_mask = tfms & 0xf;
1059 c->x86 += (tfms >> 20) & 0xff;
1061 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1062 if (c->x86_capability[0] & (1<<19))
1063 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1065 /* Have CPUID level 0 only - unheard of */
1070 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1075 * This does the hard work of actually picking apart the CPU stuff...
1077 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1082 early_identify_cpu(c);
1084 /* AMD-defined flags: level 0x80000001 */
1085 xlvl = cpuid_eax(0x80000000);
1086 c->extended_cpuid_level = xlvl;
1087 if ((xlvl & 0xffff0000) == 0x80000000) {
1088 if (xlvl >= 0x80000001) {
1089 c->x86_capability[1] = cpuid_edx(0x80000001);
1090 c->x86_capability[6] = cpuid_ecx(0x80000001);
1092 if (xlvl >= 0x80000004)
1093 get_model_name(c); /* Default name */
1096 /* Transmeta-defined flags: level 0x80860001 */
1097 xlvl = cpuid_eax(0x80860000);
1098 if ((xlvl & 0xffff0000) == 0x80860000) {
1099 /* Don't set x86_cpuid_level here for now to not confuse. */
1100 if (xlvl >= 0x80860001)
1101 c->x86_capability[2] = cpuid_edx(0x80860001);
1105 * Vendor-specific initialization. In this section we
1106 * canonicalize the feature flags, meaning if there are
1107 * features a certain CPU supports which CPUID doesn't
1108 * tell us, CPUID claiming incorrect flags, or other bugs,
1109 * we handle them here.
1111 * At the end of this section, c->x86_capability better
1112 * indicate the features this CPU genuinely supports!
1114 switch (c->x86_vendor) {
1115 case X86_VENDOR_AMD:
1119 case X86_VENDOR_INTEL:
1123 case X86_VENDOR_UNKNOWN:
1125 display_cacheinfo(c);
1129 select_idle_routine(c);
1133 * On SMP, boot_cpu_data holds the common feature set between
1134 * all CPUs; so make sure that we indicate which features are
1135 * common between the CPUs. The first time this routine gets
1136 * executed, c == &boot_cpu_data.
1138 if (c != &boot_cpu_data) {
1139 /* AND the already accumulated flags with these */
1140 for (i = 0 ; i < NCAPINTS ; i++)
1141 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1144 #ifdef CONFIG_X86_MCE
1147 if (c == &boot_cpu_data)
1152 numa_add_cpu(smp_processor_id());
1157 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1159 if (c->x86_model_id[0])
1160 printk("%s", c->x86_model_id);
1162 if (c->x86_mask || c->cpuid_level >= 0)
1163 printk(" stepping %02x\n", c->x86_mask);
1169 * Get CPU information for use by the procfs.
1172 static int show_cpuinfo(struct seq_file *m, void *v)
1174 struct cpuinfo_x86 *c = v;
1177 * These flag bits must match the definitions in <asm/cpufeature.h>.
1178 * NULL means this bit is undefined or reserved; either way it doesn't
1179 * have meaning as far as Linux is concerned. Note that it's important
1180 * to realize there is a difference between this table and CPUID -- if
1181 * applications want to get the raw CPUID data, they should access
1182 * /dev/cpu/<cpu_nr>/cpuid instead.
1184 static char *x86_cap_flags[] = {
1186 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1187 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1188 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1189 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1192 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1193 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1194 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1195 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1197 /* Transmeta-defined */
1198 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1199 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1200 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1201 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1203 /* Other (Linux-defined) */
1204 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1205 "constant_tsc", NULL, NULL,
1206 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1207 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1208 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1210 /* Intel-defined (#2) */
1211 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1212 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1216 /* VIA/Cyrix/Centaur-defined */
1217 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1218 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1219 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1220 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 /* AMD-defined (#2) */
1223 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1224 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1225 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1226 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228 static char *x86_power_flags[] = {
1229 "ts", /* temperature sensor */
1230 "fid", /* frequency id control */
1231 "vid", /* voltage id control */
1232 "ttp", /* thermal trip */
1239 if (!cpu_online(c-cpu_data))
1243 seq_printf(m,"processor\t: %u\n"
1245 "cpu family\t: %d\n"
1247 "model name\t: %s\n",
1248 (unsigned)(c-cpu_data),
1249 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1252 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1254 if (c->x86_mask || c->cpuid_level >= 0)
1255 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1257 seq_printf(m, "stepping\t: unknown\n");
1259 if (cpu_has(c,X86_FEATURE_TSC)) {
1260 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1263 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1264 freq / 1000, (freq % 1000));
1268 if (c->x86_cache_size >= 0)
1269 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1272 if (smp_num_siblings * c->x86_max_cores > 1) {
1273 int cpu = c - cpu_data;
1274 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1275 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1276 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1277 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1283 "fpu_exception\t: yes\n"
1284 "cpuid level\t: %d\n"
1291 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1292 if ( test_bit(i, &c->x86_capability) &&
1293 x86_cap_flags[i] != NULL )
1294 seq_printf(m, " %s", x86_cap_flags[i]);
1297 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1298 c->loops_per_jiffy/(500000/HZ),
1299 (c->loops_per_jiffy/(5000/HZ)) % 100);
1301 if (c->x86_tlbsize > 0)
1302 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1303 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1304 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1306 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1307 c->x86_phys_bits, c->x86_virt_bits);
1309 seq_printf(m, "power management:");
1312 for (i = 0; i < 32; i++)
1313 if (c->x86_power & (1 << i)) {
1314 if (i < ARRAY_SIZE(x86_power_flags))
1315 seq_printf(m, " %s", x86_power_flags[i]);
1317 seq_printf(m, " [%d]", i);
1321 seq_printf(m, "\n\n");
1326 static void *c_start(struct seq_file *m, loff_t *pos)
1328 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1331 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1334 return c_start(m, pos);
1337 static void c_stop(struct seq_file *m, void *v)
1341 struct seq_operations cpuinfo_op = {
1345 .show = show_cpuinfo,