2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
32 #include <asm/cmpxchg.h>
40 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
42 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
47 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
48 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
52 #define pgprintk(x...) do { } while (0)
53 #define rmap_printk(x...) do { } while (0)
57 #if defined(MMU_DEBUG) || defined(AUDIT)
62 #define ASSERT(x) do { } while (0)
66 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
67 __FILE__, __LINE__, #x); \
71 #define PT64_PT_BITS 9
72 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
73 #define PT32_PT_BITS 10
74 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
76 #define PT_WRITABLE_SHIFT 1
78 #define PT_PRESENT_MASK (1ULL << 0)
79 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
80 #define PT_USER_MASK (1ULL << 2)
81 #define PT_PWT_MASK (1ULL << 3)
82 #define PT_PCD_MASK (1ULL << 4)
83 #define PT_ACCESSED_MASK (1ULL << 5)
84 #define PT_DIRTY_MASK (1ULL << 6)
85 #define PT_PAGE_SIZE_MASK (1ULL << 7)
86 #define PT_PAT_MASK (1ULL << 7)
87 #define PT_GLOBAL_MASK (1ULL << 8)
88 #define PT64_NX_SHIFT 63
89 #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
91 #define PT_PAT_SHIFT 7
92 #define PT_DIR_PAT_SHIFT 12
93 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
95 #define PT32_DIR_PSE36_SIZE 4
96 #define PT32_DIR_PSE36_SHIFT 13
97 #define PT32_DIR_PSE36_MASK \
98 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
101 #define PT_FIRST_AVAIL_BITS_SHIFT 9
102 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
104 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
106 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
108 #define PT64_LEVEL_BITS 9
110 #define PT64_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
113 #define PT64_LEVEL_MASK(level) \
114 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
116 #define PT64_INDEX(address, level)\
117 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120 #define PT32_LEVEL_BITS 10
122 #define PT32_LEVEL_SHIFT(level) \
123 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
125 #define PT32_LEVEL_MASK(level) \
126 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
128 #define PT32_INDEX(address, level)\
129 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
133 #define PT64_DIR_BASE_ADDR_MASK \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
136 #define PT32_BASE_ADDR_MASK PAGE_MASK
137 #define PT32_DIR_BASE_ADDR_MASK \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
140 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 #define ACC_EXEC_MASK 1
158 #define ACC_WRITE_MASK PT_WRITABLE_MASK
159 #define ACC_USER_MASK PT_USER_MASK
160 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
162 struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
167 static struct kmem_cache *pte_chain_cache;
168 static struct kmem_cache *rmap_desc_cache;
169 static struct kmem_cache *mmu_page_header_cache;
171 static u64 __read_mostly shadow_trap_nonpresent_pte;
172 static u64 __read_mostly shadow_notrap_nonpresent_pte;
174 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
176 shadow_trap_nonpresent_pte = trap_pte;
177 shadow_notrap_nonpresent_pte = notrap_pte;
179 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
181 static int is_write_protection(struct kvm_vcpu *vcpu)
183 return vcpu->arch.cr0 & X86_CR0_WP;
186 static int is_cpuid_PSE36(void)
191 static int is_nx(struct kvm_vcpu *vcpu)
193 return vcpu->arch.shadow_efer & EFER_NX;
196 static int is_present_pte(unsigned long pte)
198 return pte & PT_PRESENT_MASK;
201 static int is_shadow_present_pte(u64 pte)
203 pte &= ~PT_SHADOW_IO_MARK;
204 return pte != shadow_trap_nonpresent_pte
205 && pte != shadow_notrap_nonpresent_pte;
208 static int is_writeble_pte(unsigned long pte)
210 return pte & PT_WRITABLE_MASK;
213 static int is_dirty_pte(unsigned long pte)
215 return pte & PT_DIRTY_MASK;
218 static int is_io_pte(unsigned long pte)
220 return pte & PT_SHADOW_IO_MARK;
223 static int is_rmap_pte(u64 pte)
225 return pte != shadow_trap_nonpresent_pte
226 && pte != shadow_notrap_nonpresent_pte;
229 static gfn_t pse36_gfn_delta(u32 gpte)
231 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
233 return (gpte & PT32_DIR_PSE36_MASK) << shift;
236 static void set_shadow_pte(u64 *sptep, u64 spte)
239 set_64bit((unsigned long *)sptep, spte);
241 set_64bit((unsigned long long *)sptep, spte);
245 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
246 struct kmem_cache *base_cache, int min)
250 if (cache->nobjs >= min)
252 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
253 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
256 cache->objects[cache->nobjs++] = obj;
261 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
264 kfree(mc->objects[--mc->nobjs]);
267 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
272 if (cache->nobjs >= min)
274 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
275 page = alloc_page(GFP_KERNEL);
278 set_page_private(page, 0);
279 cache->objects[cache->nobjs++] = page_address(page);
284 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
287 free_page((unsigned long)mc->objects[--mc->nobjs]);
290 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
294 kvm_mmu_free_some_pages(vcpu);
295 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
299 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
303 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
306 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
307 mmu_page_header_cache, 4);
312 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
314 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
315 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
316 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
317 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
320 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
326 p = mc->objects[--mc->nobjs];
331 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
333 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
334 sizeof(struct kvm_pte_chain));
337 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
342 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
344 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
345 sizeof(struct kvm_rmap_desc));
348 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
354 * Take gfn and return the reverse mapping to it.
355 * Note: gfn must be unaliased before this function get called
358 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
360 struct kvm_memory_slot *slot;
362 slot = gfn_to_memslot(kvm, gfn);
363 return &slot->rmap[gfn - slot->base_gfn];
367 * Reverse mapping data structures:
369 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
370 * that points to page_address(page).
372 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
373 * containing more mappings.
375 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
377 struct kvm_mmu_page *sp;
378 struct kvm_rmap_desc *desc;
379 unsigned long *rmapp;
382 if (!is_rmap_pte(*spte))
384 gfn = unalias_gfn(vcpu->kvm, gfn);
385 sp = page_header(__pa(spte));
386 sp->gfns[spte - sp->spt] = gfn;
387 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
389 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
390 *rmapp = (unsigned long)spte;
391 } else if (!(*rmapp & 1)) {
392 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
393 desc = mmu_alloc_rmap_desc(vcpu);
394 desc->shadow_ptes[0] = (u64 *)*rmapp;
395 desc->shadow_ptes[1] = spte;
396 *rmapp = (unsigned long)desc | 1;
398 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
399 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
400 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
402 if (desc->shadow_ptes[RMAP_EXT-1]) {
403 desc->more = mmu_alloc_rmap_desc(vcpu);
406 for (i = 0; desc->shadow_ptes[i]; ++i)
408 desc->shadow_ptes[i] = spte;
412 static void rmap_desc_remove_entry(unsigned long *rmapp,
413 struct kvm_rmap_desc *desc,
415 struct kvm_rmap_desc *prev_desc)
419 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
421 desc->shadow_ptes[i] = desc->shadow_ptes[j];
422 desc->shadow_ptes[j] = NULL;
425 if (!prev_desc && !desc->more)
426 *rmapp = (unsigned long)desc->shadow_ptes[0];
429 prev_desc->more = desc->more;
431 *rmapp = (unsigned long)desc->more | 1;
432 mmu_free_rmap_desc(desc);
435 static void rmap_remove(struct kvm *kvm, u64 *spte)
437 struct kvm_rmap_desc *desc;
438 struct kvm_rmap_desc *prev_desc;
439 struct kvm_mmu_page *sp;
441 unsigned long *rmapp;
444 if (!is_rmap_pte(*spte))
446 sp = page_header(__pa(spte));
447 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
448 mark_page_accessed(page);
449 if (is_writeble_pte(*spte))
450 kvm_release_page_dirty(page);
452 kvm_release_page_clean(page);
453 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
455 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
457 } else if (!(*rmapp & 1)) {
458 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
459 if ((u64 *)*rmapp != spte) {
460 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
466 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
467 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
470 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
471 if (desc->shadow_ptes[i] == spte) {
472 rmap_desc_remove_entry(rmapp,
484 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
486 struct kvm_rmap_desc *desc;
487 struct kvm_rmap_desc *prev_desc;
493 else if (!(*rmapp & 1)) {
495 return (u64 *)*rmapp;
498 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
502 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
503 if (prev_spte == spte)
504 return desc->shadow_ptes[i];
505 prev_spte = desc->shadow_ptes[i];
512 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
514 unsigned long *rmapp;
516 int write_protected = 0;
518 gfn = unalias_gfn(kvm, gfn);
519 rmapp = gfn_to_rmap(kvm, gfn);
521 spte = rmap_next(kvm, rmapp, NULL);
524 BUG_ON(!(*spte & PT_PRESENT_MASK));
525 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
526 if (is_writeble_pte(*spte)) {
527 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
530 spte = rmap_next(kvm, rmapp, spte);
533 kvm_flush_remote_tlbs(kvm);
537 static int is_empty_shadow_page(u64 *spt)
542 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
543 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
544 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
552 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
554 ASSERT(is_empty_shadow_page(sp->spt));
556 __free_page(virt_to_page(sp->spt));
557 __free_page(virt_to_page(sp->gfns));
559 ++kvm->arch.n_free_mmu_pages;
562 static unsigned kvm_page_table_hashfn(gfn_t gfn)
567 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
570 struct kvm_mmu_page *sp;
572 if (!vcpu->kvm->arch.n_free_mmu_pages)
575 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
576 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
577 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
578 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
579 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
580 ASSERT(is_empty_shadow_page(sp->spt));
583 sp->parent_pte = parent_pte;
584 --vcpu->kvm->arch.n_free_mmu_pages;
588 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
589 struct kvm_mmu_page *sp, u64 *parent_pte)
591 struct kvm_pte_chain *pte_chain;
592 struct hlist_node *node;
597 if (!sp->multimapped) {
598 u64 *old = sp->parent_pte;
601 sp->parent_pte = parent_pte;
605 pte_chain = mmu_alloc_pte_chain(vcpu);
606 INIT_HLIST_HEAD(&sp->parent_ptes);
607 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
608 pte_chain->parent_ptes[0] = old;
610 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
611 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
613 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
614 if (!pte_chain->parent_ptes[i]) {
615 pte_chain->parent_ptes[i] = parent_pte;
619 pte_chain = mmu_alloc_pte_chain(vcpu);
621 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
622 pte_chain->parent_ptes[0] = parent_pte;
625 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
628 struct kvm_pte_chain *pte_chain;
629 struct hlist_node *node;
632 if (!sp->multimapped) {
633 BUG_ON(sp->parent_pte != parent_pte);
634 sp->parent_pte = NULL;
637 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
638 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
639 if (!pte_chain->parent_ptes[i])
641 if (pte_chain->parent_ptes[i] != parent_pte)
643 while (i + 1 < NR_PTE_CHAIN_ENTRIES
644 && pte_chain->parent_ptes[i + 1]) {
645 pte_chain->parent_ptes[i]
646 = pte_chain->parent_ptes[i + 1];
649 pte_chain->parent_ptes[i] = NULL;
651 hlist_del(&pte_chain->link);
652 mmu_free_pte_chain(pte_chain);
653 if (hlist_empty(&sp->parent_ptes)) {
655 sp->parent_pte = NULL;
663 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
666 struct hlist_head *bucket;
667 struct kvm_mmu_page *sp;
668 struct hlist_node *node;
670 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
671 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
672 bucket = &kvm->arch.mmu_page_hash[index];
673 hlist_for_each_entry(sp, node, bucket, hash_link)
674 if (sp->gfn == gfn && !sp->role.metaphysical) {
675 pgprintk("%s: found role %x\n",
676 __FUNCTION__, sp->role.word);
682 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
691 union kvm_mmu_page_role role;
694 struct hlist_head *bucket;
695 struct kvm_mmu_page *sp;
696 struct hlist_node *node;
699 role.glevels = vcpu->arch.mmu.root_level;
701 role.metaphysical = metaphysical;
702 role.access = access;
703 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
704 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
705 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
706 role.quadrant = quadrant;
708 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
710 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
711 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
712 hlist_for_each_entry(sp, node, bucket, hash_link)
713 if (sp->gfn == gfn && sp->role.word == role.word) {
714 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
715 pgprintk("%s: found\n", __FUNCTION__);
718 ++vcpu->kvm->stat.mmu_cache_miss;
719 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
722 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
725 hlist_add_head(&sp->hash_link, bucket);
726 vcpu->arch.mmu.prefetch_page(vcpu, sp);
728 rmap_write_protect(vcpu->kvm, gfn);
734 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
735 struct kvm_mmu_page *sp)
743 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
744 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
745 if (is_shadow_present_pte(pt[i]))
746 rmap_remove(kvm, &pt[i]);
747 pt[i] = shadow_trap_nonpresent_pte;
749 kvm_flush_remote_tlbs(kvm);
753 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
756 pt[i] = shadow_trap_nonpresent_pte;
757 if (!is_shadow_present_pte(ent))
759 ent &= PT64_BASE_ADDR_MASK;
760 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
762 kvm_flush_remote_tlbs(kvm);
765 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
767 mmu_page_remove_parent_pte(sp, parent_pte);
770 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
774 for (i = 0; i < KVM_MAX_VCPUS; ++i)
776 kvm->vcpus[i]->arch.last_pte_updated = NULL;
779 static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
783 ++kvm->stat.mmu_shadow_zapped;
784 while (sp->multimapped || sp->parent_pte) {
785 if (!sp->multimapped)
786 parent_pte = sp->parent_pte;
788 struct kvm_pte_chain *chain;
790 chain = container_of(sp->parent_ptes.first,
791 struct kvm_pte_chain, link);
792 parent_pte = chain->parent_ptes[0];
795 kvm_mmu_put_page(sp, parent_pte);
796 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
798 kvm_mmu_page_unlink_children(kvm, sp);
799 if (!sp->root_count) {
800 hlist_del(&sp->hash_link);
801 kvm_mmu_free_page(kvm, sp);
803 list_move(&sp->link, &kvm->arch.active_mmu_pages);
804 kvm_mmu_reset_last_pte_updated(kvm);
808 * Changing the number of mmu pages allocated to the vm
809 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
811 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
814 * If we set the number of mmu pages to be smaller be than the
815 * number of actived pages , we must to free some mmu pages before we
819 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
821 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
822 - kvm->arch.n_free_mmu_pages;
824 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
825 struct kvm_mmu_page *page;
827 page = container_of(kvm->arch.active_mmu_pages.prev,
828 struct kvm_mmu_page, link);
829 kvm_mmu_zap_page(kvm, page);
832 kvm->arch.n_free_mmu_pages = 0;
835 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
836 - kvm->arch.n_alloc_mmu_pages;
838 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
841 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
844 struct hlist_head *bucket;
845 struct kvm_mmu_page *sp;
846 struct hlist_node *node, *n;
849 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
851 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
852 bucket = &kvm->arch.mmu_page_hash[index];
853 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
854 if (sp->gfn == gfn && !sp->role.metaphysical) {
855 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
857 kvm_mmu_zap_page(kvm, sp);
863 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
865 struct kvm_mmu_page *sp;
867 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
868 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
869 kvm_mmu_zap_page(kvm, sp);
873 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
875 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
876 struct kvm_mmu_page *sp = page_header(__pa(pte));
878 __set_bit(slot, &sp->slot_bitmap);
881 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
883 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
885 if (gpa == UNMAPPED_GVA)
887 return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
890 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
891 unsigned pt_access, unsigned pte_access,
892 int user_fault, int write_fault, int dirty,
893 int *ptwrite, gfn_t gfn, struct page *page)
896 int was_rmapped = is_rmap_pte(*shadow_pte);
898 pgprintk("%s: spte %llx access %x write_fault %d"
899 " user_fault %d gfn %lx\n",
900 __FUNCTION__, *shadow_pte, pt_access,
901 write_fault, user_fault, gfn);
904 * We don't set the accessed bit, since we sometimes want to see
905 * whether the guest actually used the pte (in order to detect
908 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
910 pte_access &= ~ACC_WRITE_MASK;
911 if (!(pte_access & ACC_EXEC_MASK))
912 spte |= PT64_NX_MASK;
914 spte |= PT_PRESENT_MASK;
915 if (pte_access & ACC_USER_MASK)
916 spte |= PT_USER_MASK;
918 if (is_error_page(page)) {
919 set_shadow_pte(shadow_pte,
920 shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
921 kvm_release_page_clean(page);
925 spte |= page_to_phys(page);
927 if ((pte_access & ACC_WRITE_MASK)
928 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
929 struct kvm_mmu_page *shadow;
931 spte |= PT_WRITABLE_MASK;
933 mmu_unshadow(vcpu->kvm, gfn);
937 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
939 pgprintk("%s: found shadow page for %lx, marking ro\n",
941 pte_access &= ~ACC_WRITE_MASK;
942 if (is_writeble_pte(spte)) {
943 spte &= ~PT_WRITABLE_MASK;
944 kvm_x86_ops->tlb_flush(vcpu);
953 if (pte_access & ACC_WRITE_MASK)
954 mark_page_dirty(vcpu->kvm, gfn);
956 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
957 set_shadow_pte(shadow_pte, spte);
958 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
960 rmap_add(vcpu, shadow_pte, gfn);
961 if (!is_rmap_pte(*shadow_pte))
962 kvm_release_page_clean(page);
965 kvm_release_page_clean(page);
966 if (!ptwrite || !*ptwrite)
967 vcpu->arch.last_pte_updated = shadow_pte;
970 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
974 static int __nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
976 int level = PT32E_ROOT_LEVEL;
977 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
981 down_read(¤t->mm->mmap_sem);
982 page = gfn_to_page(vcpu->kvm, gfn);
983 up_read(¤t->mm->mmap_sem);
986 u32 index = PT64_INDEX(v, level);
989 ASSERT(VALID_PAGE(table_addr));
990 table = __va(table_addr);
993 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
994 0, write, 1, &pt_write, gfn, page);
995 return pt_write || is_io_pte(table[index]);
998 if (table[index] == shadow_trap_nonpresent_pte) {
999 struct kvm_mmu_page *new_table;
1002 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1004 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1006 1, ACC_ALL, &table[index],
1009 pgprintk("nonpaging_map: ENOMEM\n");
1010 kvm_release_page_clean(page);
1014 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
1015 | PT_WRITABLE_MASK | PT_USER_MASK;
1017 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1021 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1025 mutex_lock(&vcpu->kvm->lock);
1026 r = __nonpaging_map(vcpu, v, write, gfn);
1027 mutex_unlock(&vcpu->kvm->lock);
1032 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1033 struct kvm_mmu_page *sp)
1037 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1038 sp->spt[i] = shadow_trap_nonpresent_pte;
1041 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1044 struct kvm_mmu_page *sp;
1046 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1048 mutex_lock(&vcpu->kvm->lock);
1049 #ifdef CONFIG_X86_64
1050 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1051 hpa_t root = vcpu->arch.mmu.root_hpa;
1053 sp = page_header(root);
1055 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1056 mutex_unlock(&vcpu->kvm->lock);
1060 for (i = 0; i < 4; ++i) {
1061 hpa_t root = vcpu->arch.mmu.pae_root[i];
1064 root &= PT64_BASE_ADDR_MASK;
1065 sp = page_header(root);
1068 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1070 mutex_unlock(&vcpu->kvm->lock);
1071 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1074 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1078 struct kvm_mmu_page *sp;
1080 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1082 #ifdef CONFIG_X86_64
1083 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1084 hpa_t root = vcpu->arch.mmu.root_hpa;
1086 ASSERT(!VALID_PAGE(root));
1087 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1088 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL, NULL);
1089 root = __pa(sp->spt);
1091 vcpu->arch.mmu.root_hpa = root;
1095 for (i = 0; i < 4; ++i) {
1096 hpa_t root = vcpu->arch.mmu.pae_root[i];
1098 ASSERT(!VALID_PAGE(root));
1099 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1100 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1101 vcpu->arch.mmu.pae_root[i] = 0;
1104 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1105 } else if (vcpu->arch.mmu.root_level == 0)
1107 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1108 PT32_ROOT_LEVEL, !is_paging(vcpu),
1109 ACC_ALL, NULL, NULL);
1110 root = __pa(sp->spt);
1112 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1114 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1117 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1122 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1128 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
1129 r = mmu_topup_memory_caches(vcpu);
1134 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1136 gfn = gva >> PAGE_SHIFT;
1138 return nonpaging_map(vcpu, gva & PAGE_MASK,
1139 error_code & PFERR_WRITE_MASK, gfn);
1142 static void nonpaging_free(struct kvm_vcpu *vcpu)
1144 mmu_free_roots(vcpu);
1147 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1149 struct kvm_mmu *context = &vcpu->arch.mmu;
1151 context->new_cr3 = nonpaging_new_cr3;
1152 context->page_fault = nonpaging_page_fault;
1153 context->gva_to_gpa = nonpaging_gva_to_gpa;
1154 context->free = nonpaging_free;
1155 context->prefetch_page = nonpaging_prefetch_page;
1156 context->root_level = 0;
1157 context->shadow_root_level = PT32E_ROOT_LEVEL;
1158 context->root_hpa = INVALID_PAGE;
1162 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
1164 ++vcpu->stat.tlb_flush;
1165 kvm_x86_ops->tlb_flush(vcpu);
1168 static void paging_new_cr3(struct kvm_vcpu *vcpu)
1170 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
1171 mmu_free_roots(vcpu);
1174 static void inject_page_fault(struct kvm_vcpu *vcpu,
1178 kvm_inject_page_fault(vcpu, addr, err_code);
1181 static void paging_free(struct kvm_vcpu *vcpu)
1183 nonpaging_free(vcpu);
1187 #include "paging_tmpl.h"
1191 #include "paging_tmpl.h"
1194 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1196 struct kvm_mmu *context = &vcpu->arch.mmu;
1198 ASSERT(is_pae(vcpu));
1199 context->new_cr3 = paging_new_cr3;
1200 context->page_fault = paging64_page_fault;
1201 context->gva_to_gpa = paging64_gva_to_gpa;
1202 context->prefetch_page = paging64_prefetch_page;
1203 context->free = paging_free;
1204 context->root_level = level;
1205 context->shadow_root_level = level;
1206 context->root_hpa = INVALID_PAGE;
1210 static int paging64_init_context(struct kvm_vcpu *vcpu)
1212 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1215 static int paging32_init_context(struct kvm_vcpu *vcpu)
1217 struct kvm_mmu *context = &vcpu->arch.mmu;
1219 context->new_cr3 = paging_new_cr3;
1220 context->page_fault = paging32_page_fault;
1221 context->gva_to_gpa = paging32_gva_to_gpa;
1222 context->free = paging_free;
1223 context->prefetch_page = paging32_prefetch_page;
1224 context->root_level = PT32_ROOT_LEVEL;
1225 context->shadow_root_level = PT32E_ROOT_LEVEL;
1226 context->root_hpa = INVALID_PAGE;
1230 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1232 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1235 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1238 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1240 if (!is_paging(vcpu))
1241 return nonpaging_init_context(vcpu);
1242 else if (is_long_mode(vcpu))
1243 return paging64_init_context(vcpu);
1244 else if (is_pae(vcpu))
1245 return paging32E_init_context(vcpu);
1247 return paging32_init_context(vcpu);
1250 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1253 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1254 vcpu->arch.mmu.free(vcpu);
1255 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1259 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1261 destroy_kvm_mmu(vcpu);
1262 return init_kvm_mmu(vcpu);
1264 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
1266 int kvm_mmu_load(struct kvm_vcpu *vcpu)
1270 r = mmu_topup_memory_caches(vcpu);
1273 mutex_lock(&vcpu->kvm->lock);
1274 mmu_alloc_roots(vcpu);
1275 mutex_unlock(&vcpu->kvm->lock);
1276 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
1277 kvm_mmu_flush_tlb(vcpu);
1281 EXPORT_SYMBOL_GPL(kvm_mmu_load);
1283 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1285 mmu_free_roots(vcpu);
1288 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1289 struct kvm_mmu_page *sp,
1293 struct kvm_mmu_page *child;
1296 if (is_shadow_present_pte(pte)) {
1297 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1298 rmap_remove(vcpu->kvm, spte);
1300 child = page_header(pte & PT64_BASE_ADDR_MASK);
1301 mmu_page_remove_parent_pte(child, spte);
1304 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
1307 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1308 struct kvm_mmu_page *sp,
1310 const void *new, int bytes,
1313 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1314 ++vcpu->kvm->stat.mmu_pde_zapped;
1318 ++vcpu->kvm->stat.mmu_pte_updated;
1319 if (sp->role.glevels == PT32_ROOT_LEVEL)
1320 paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
1322 paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
1325 static bool need_remote_flush(u64 old, u64 new)
1327 if (!is_shadow_present_pte(old))
1329 if (!is_shadow_present_pte(new))
1331 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1333 old ^= PT64_NX_MASK;
1334 new ^= PT64_NX_MASK;
1335 return (old & ~new & PT64_PERM_MASK) != 0;
1338 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1340 if (need_remote_flush(old, new))
1341 kvm_flush_remote_tlbs(vcpu->kvm);
1343 kvm_mmu_flush_tlb(vcpu);
1346 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1348 u64 *spte = vcpu->arch.last_pte_updated;
1350 return !!(spte && (*spte & PT_ACCESSED_MASK));
1353 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1354 const u8 *new, int bytes)
1360 if (bytes != 4 && bytes != 8)
1364 * Assume that the pte write on a page table of the same type
1365 * as the current vcpu paging mode. This is nearly always true
1366 * (might be false while changing modes). Note it is verified later
1370 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1371 if ((bytes == 4) && (gpa % 4 == 0)) {
1372 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1375 memcpy((void *)&gpte + (gpa % 8), new, 4);
1376 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1377 memcpy((void *)&gpte, new, 8);
1380 if ((bytes == 4) && (gpa % 4 == 0))
1381 memcpy((void *)&gpte, new, 4);
1383 if (!is_present_pte(gpte))
1385 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
1386 vcpu->arch.update_pte.gfn = gfn;
1387 vcpu->arch.update_pte.page = gfn_to_page(vcpu->kvm, gfn);
1390 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1391 const u8 *new, int bytes)
1393 gfn_t gfn = gpa >> PAGE_SHIFT;
1394 struct kvm_mmu_page *sp;
1395 struct hlist_node *node, *n;
1396 struct hlist_head *bucket;
1400 unsigned offset = offset_in_page(gpa);
1402 unsigned page_offset;
1403 unsigned misaligned;
1409 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1410 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
1411 mutex_lock(&vcpu->kvm->lock);
1412 ++vcpu->kvm->stat.mmu_pte_write;
1413 kvm_mmu_audit(vcpu, "pre pte write");
1414 if (gfn == vcpu->arch.last_pt_write_gfn
1415 && !last_updated_pte_accessed(vcpu)) {
1416 ++vcpu->arch.last_pt_write_count;
1417 if (vcpu->arch.last_pt_write_count >= 3)
1420 vcpu->arch.last_pt_write_gfn = gfn;
1421 vcpu->arch.last_pt_write_count = 1;
1422 vcpu->arch.last_pte_updated = NULL;
1424 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1425 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1426 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1427 if (sp->gfn != gfn || sp->role.metaphysical)
1429 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1430 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1431 misaligned |= bytes < 4;
1432 if (misaligned || flooded) {
1434 * Misaligned accesses are too much trouble to fix
1435 * up; also, they usually indicate a page is not used
1438 * If we're seeing too many writes to a page,
1439 * it may no longer be a page table, or we may be
1440 * forking, in which case it is better to unmap the
1443 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1444 gpa, bytes, sp->role.word);
1445 kvm_mmu_zap_page(vcpu->kvm, sp);
1446 ++vcpu->kvm->stat.mmu_flooded;
1449 page_offset = offset;
1450 level = sp->role.level;
1452 if (sp->role.glevels == PT32_ROOT_LEVEL) {
1453 page_offset <<= 1; /* 32->64 */
1455 * A 32-bit pde maps 4MB while the shadow pdes map
1456 * only 2MB. So we need to double the offset again
1457 * and zap two pdes instead of one.
1459 if (level == PT32_ROOT_LEVEL) {
1460 page_offset &= ~7; /* kill rounding error */
1464 quadrant = page_offset >> PAGE_SHIFT;
1465 page_offset &= ~PAGE_MASK;
1466 if (quadrant != sp->role.quadrant)
1469 spte = &sp->spt[page_offset / sizeof(*spte)];
1472 mmu_pte_write_zap_pte(vcpu, sp, spte);
1473 mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
1474 page_offset & (pte_size - 1));
1475 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
1479 kvm_mmu_audit(vcpu, "post pte write");
1480 mutex_unlock(&vcpu->kvm->lock);
1481 if (vcpu->arch.update_pte.page) {
1482 kvm_release_page_clean(vcpu->arch.update_pte.page);
1483 vcpu->arch.update_pte.page = NULL;
1487 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1492 down_read(¤t->mm->mmap_sem);
1493 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1494 up_read(¤t->mm->mmap_sem);
1496 mutex_lock(&vcpu->kvm->lock);
1497 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1498 mutex_unlock(&vcpu->kvm->lock);
1502 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1504 mutex_lock(&vcpu->kvm->lock);
1505 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
1506 struct kvm_mmu_page *sp;
1508 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
1509 struct kvm_mmu_page, link);
1510 kvm_mmu_zap_page(vcpu->kvm, sp);
1511 ++vcpu->kvm->stat.mmu_recycled;
1513 mutex_unlock(&vcpu->kvm->lock);
1516 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1519 enum emulation_result er;
1521 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
1530 r = mmu_topup_memory_caches(vcpu);
1534 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1539 case EMULATE_DO_MMIO:
1540 ++vcpu->stat.mmio_exits;
1543 kvm_report_emulation_failure(vcpu, "pagetable");
1551 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1553 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1555 struct kvm_mmu_page *sp;
1557 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
1558 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
1559 struct kvm_mmu_page, link);
1560 kvm_mmu_zap_page(vcpu->kvm, sp);
1562 free_page((unsigned long)vcpu->arch.mmu.pae_root);
1565 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1572 if (vcpu->kvm->arch.n_requested_mmu_pages)
1573 vcpu->kvm->arch.n_free_mmu_pages =
1574 vcpu->kvm->arch.n_requested_mmu_pages;
1576 vcpu->kvm->arch.n_free_mmu_pages =
1577 vcpu->kvm->arch.n_alloc_mmu_pages;
1579 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1580 * Therefore we need to allocate shadow page tables in the first
1581 * 4GB of memory, which happens to fit the DMA32 zone.
1583 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1586 vcpu->arch.mmu.pae_root = page_address(page);
1587 for (i = 0; i < 4; ++i)
1588 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1593 free_mmu_pages(vcpu);
1597 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1600 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1602 return alloc_mmu_pages(vcpu);
1605 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1608 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
1610 return init_kvm_mmu(vcpu);
1613 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1617 destroy_kvm_mmu(vcpu);
1618 free_mmu_pages(vcpu);
1619 mmu_free_memory_caches(vcpu);
1622 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1624 struct kvm_mmu_page *sp;
1626 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
1630 if (!test_bit(slot, &sp->slot_bitmap))
1634 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1636 if (pt[i] & PT_WRITABLE_MASK)
1637 pt[i] &= ~PT_WRITABLE_MASK;
1641 void kvm_mmu_zap_all(struct kvm *kvm)
1643 struct kvm_mmu_page *sp, *node;
1645 mutex_lock(&kvm->lock);
1646 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
1647 kvm_mmu_zap_page(kvm, sp);
1648 mutex_unlock(&kvm->lock);
1650 kvm_flush_remote_tlbs(kvm);
1653 void kvm_mmu_module_exit(void)
1655 if (pte_chain_cache)
1656 kmem_cache_destroy(pte_chain_cache);
1657 if (rmap_desc_cache)
1658 kmem_cache_destroy(rmap_desc_cache);
1659 if (mmu_page_header_cache)
1660 kmem_cache_destroy(mmu_page_header_cache);
1663 int kvm_mmu_module_init(void)
1665 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1666 sizeof(struct kvm_pte_chain),
1668 if (!pte_chain_cache)
1670 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1671 sizeof(struct kvm_rmap_desc),
1673 if (!rmap_desc_cache)
1676 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1677 sizeof(struct kvm_mmu_page),
1679 if (!mmu_page_header_cache)
1685 kvm_mmu_module_exit();
1690 * Caculate mmu pages needed for kvm.
1692 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1695 unsigned int nr_mmu_pages;
1696 unsigned int nr_pages = 0;
1698 for (i = 0; i < kvm->nmemslots; i++)
1699 nr_pages += kvm->memslots[i].npages;
1701 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1702 nr_mmu_pages = max(nr_mmu_pages,
1703 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1705 return nr_mmu_pages;
1710 static const char *audit_msg;
1712 static gva_t canonicalize(gva_t gva)
1714 #ifdef CONFIG_X86_64
1715 gva = (long long)(gva << 16) >> 16;
1720 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1721 gva_t va, int level)
1723 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1725 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1727 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1730 if (ent == shadow_trap_nonpresent_pte)
1733 va = canonicalize(va);
1735 if (ent == shadow_notrap_nonpresent_pte)
1736 printk(KERN_ERR "audit: (%s) nontrapping pte"
1737 " in nonleaf level: levels %d gva %lx"
1738 " level %d pte %llx\n", audit_msg,
1739 vcpu->arch.mmu.root_level, va, level, ent);
1741 audit_mappings_page(vcpu, ent, va, level - 1);
1743 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1744 struct page *page = gpa_to_page(vcpu, gpa);
1745 hpa_t hpa = page_to_phys(page);
1747 if (is_shadow_present_pte(ent)
1748 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1749 printk(KERN_ERR "xx audit error: (%s) levels %d"
1750 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
1751 audit_msg, vcpu->arch.mmu.root_level,
1753 is_shadow_present_pte(ent));
1754 else if (ent == shadow_notrap_nonpresent_pte
1755 && !is_error_hpa(hpa))
1756 printk(KERN_ERR "audit: (%s) notrap shadow,"
1757 " valid guest gva %lx\n", audit_msg, va);
1758 kvm_release_page_clean(page);
1764 static void audit_mappings(struct kvm_vcpu *vcpu)
1768 if (vcpu->arch.mmu.root_level == 4)
1769 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
1771 for (i = 0; i < 4; ++i)
1772 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
1773 audit_mappings_page(vcpu,
1774 vcpu->arch.mmu.pae_root[i],
1779 static int count_rmaps(struct kvm_vcpu *vcpu)
1784 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1785 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1786 struct kvm_rmap_desc *d;
1788 for (j = 0; j < m->npages; ++j) {
1789 unsigned long *rmapp = &m->rmap[j];
1793 if (!(*rmapp & 1)) {
1797 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
1799 for (k = 0; k < RMAP_EXT; ++k)
1800 if (d->shadow_ptes[k])
1811 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1814 struct kvm_mmu_page *sp;
1817 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1820 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
1823 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1826 if (!(ent & PT_PRESENT_MASK))
1828 if (!(ent & PT_WRITABLE_MASK))
1836 static void audit_rmap(struct kvm_vcpu *vcpu)
1838 int n_rmap = count_rmaps(vcpu);
1839 int n_actual = count_writable_mappings(vcpu);
1841 if (n_rmap != n_actual)
1842 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1843 __FUNCTION__, audit_msg, n_rmap, n_actual);
1846 static void audit_write_protection(struct kvm_vcpu *vcpu)
1848 struct kvm_mmu_page *sp;
1849 struct kvm_memory_slot *slot;
1850 unsigned long *rmapp;
1853 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
1854 if (sp->role.metaphysical)
1857 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1858 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
1859 rmapp = &slot->rmap[gfn - slot->base_gfn];
1861 printk(KERN_ERR "%s: (%s) shadow page has writable"
1862 " mappings: gfn %lx role %x\n",
1863 __FUNCTION__, audit_msg, sp->gfn,
1868 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1875 audit_write_protection(vcpu);
1876 audit_mappings(vcpu);