2 * Driver for NEC VR4100 series Real Time Clock unit.
4 * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/interrupt.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/rtc.h>
28 #include <linux/spinlock.h>
29 #include <linux/types.h>
30 #include <linux/log2.h>
32 #include <asm/div64.h>
34 #include <asm/uaccess.h>
36 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
37 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
38 MODULE_LICENSE("GPL v2");
41 #define ETIMELREG 0x00
42 #define ETIMEMREG 0x02
43 #define ETIMEHREG 0x04
49 #define RTCL1LREG 0x10
50 #define RTCL1HREG 0x12
51 #define RTCL1CNTLREG 0x14
52 #define RTCL1CNTHREG 0x16
53 #define RTCL2LREG 0x18
54 #define RTCL2HREG 0x1a
55 #define RTCL2CNTLREG 0x1c
56 #define RTCL2CNTHREG 0x1e
61 #define TCLKCNTLREG 0x04
62 #define TCLKCNTHREG 0x06
64 #define RTCINTREG 0x1e
65 #define TCLOCK_INT 0x08
66 #define RTCLONG2_INT 0x04
67 #define RTCLONG1_INT 0x02
68 #define ELAPSEDTIME_INT 0x01
70 #define RTC_FREQUENCY 32768
71 #define MAX_PERIODIC_RATE 6553
73 static void __iomem *rtc1_base;
74 static void __iomem *rtc2_base;
76 #define rtc1_read(offset) readw(rtc1_base + (offset))
77 #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
79 #define rtc2_read(offset) readw(rtc2_base + (offset))
80 #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
82 static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
84 static DEFINE_SPINLOCK(rtc_lock);
85 static char rtc_name[] = "RTC";
86 static unsigned long periodic_count;
87 static unsigned int alarm_enabled;
91 static inline unsigned long read_elapsed_second(void)
94 unsigned long first_low, first_mid, first_high;
96 unsigned long second_low, second_mid, second_high;
99 first_low = rtc1_read(ETIMELREG);
100 first_mid = rtc1_read(ETIMEMREG);
101 first_high = rtc1_read(ETIMEHREG);
102 second_low = rtc1_read(ETIMELREG);
103 second_mid = rtc1_read(ETIMEMREG);
104 second_high = rtc1_read(ETIMEHREG);
105 } while (first_low != second_low || first_mid != second_mid ||
106 first_high != second_high);
108 return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
111 static inline void write_elapsed_second(unsigned long sec)
113 spin_lock_irq(&rtc_lock);
115 rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
116 rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
117 rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
119 spin_unlock_irq(&rtc_lock);
122 static void vr41xx_rtc_release(struct device *dev)
125 spin_lock_irq(&rtc_lock);
127 rtc1_write(ECMPLREG, 0);
128 rtc1_write(ECMPMREG, 0);
129 rtc1_write(ECMPHREG, 0);
130 rtc1_write(RTCL1LREG, 0);
131 rtc1_write(RTCL1HREG, 0);
133 spin_unlock_irq(&rtc_lock);
135 disable_irq(aie_irq);
136 disable_irq(pie_irq);
139 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
141 unsigned long epoch_sec, elapsed_sec;
143 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
144 elapsed_sec = read_elapsed_second();
146 rtc_time_to_tm(epoch_sec + elapsed_sec, time);
151 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
153 unsigned long epoch_sec, current_sec;
155 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
156 current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
157 time->tm_hour, time->tm_min, time->tm_sec);
159 write_elapsed_second(current_sec - epoch_sec);
164 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
166 unsigned long low, mid, high;
167 struct rtc_time *time = &wkalrm->time;
169 spin_lock_irq(&rtc_lock);
171 low = rtc1_read(ECMPLREG);
172 mid = rtc1_read(ECMPMREG);
173 high = rtc1_read(ECMPHREG);
174 wkalrm->enabled = alarm_enabled;
176 spin_unlock_irq(&rtc_lock);
178 rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
183 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
185 unsigned long alarm_sec;
186 struct rtc_time *time = &wkalrm->time;
188 alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
189 time->tm_hour, time->tm_min, time->tm_sec);
191 spin_lock_irq(&rtc_lock);
194 disable_irq(aie_irq);
196 rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
197 rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
198 rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
203 alarm_enabled = wkalrm->enabled;
205 spin_unlock_irq(&rtc_lock);
210 static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
214 if (!is_power_of_2(freq))
216 count = RTC_FREQUENCY;
219 periodic_count = count;
221 spin_lock_irq(&rtc_lock);
223 rtc1_write(RTCL1LREG, count);
224 rtc1_write(RTCL1HREG, count >> 16);
226 spin_unlock_irq(&rtc_lock);
231 static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled)
236 disable_irq(pie_irq);
241 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
245 spin_lock_irq(&rtc_lock);
247 if (!alarm_enabled) {
252 spin_unlock_irq(&rtc_lock);
255 spin_lock_irq(&rtc_lock);
258 disable_irq(aie_irq);
262 spin_unlock_irq(&rtc_lock);
265 return put_user(epoch, (unsigned long __user *)arg);
267 /* Doesn't support before 1900 */
279 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
281 struct platform_device *pdev = (struct platform_device *)dev_id;
282 struct rtc_device *rtc = platform_get_drvdata(pdev);
284 rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
286 rtc_update_irq(rtc, 1, RTC_AF);
291 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
293 struct platform_device *pdev = (struct platform_device *)dev_id;
294 struct rtc_device *rtc = platform_get_drvdata(pdev);
295 unsigned long count = periodic_count;
297 rtc2_write(RTCINTREG, RTCLONG1_INT);
299 rtc1_write(RTCL1LREG, count);
300 rtc1_write(RTCL1HREG, count >> 16);
302 rtc_update_irq(rtc, 1, RTC_PF);
307 static const struct rtc_class_ops vr41xx_rtc_ops = {
308 .release = vr41xx_rtc_release,
309 .ioctl = vr41xx_rtc_ioctl,
310 .read_time = vr41xx_rtc_read_time,
311 .set_time = vr41xx_rtc_set_time,
312 .read_alarm = vr41xx_rtc_read_alarm,
313 .set_alarm = vr41xx_rtc_set_alarm,
314 .irq_set_freq = vr41xx_rtc_irq_set_freq,
315 .irq_set_state = vr41xx_rtc_irq_set_state,
318 static int __devinit rtc_probe(struct platform_device *pdev)
320 struct resource *res;
321 struct rtc_device *rtc;
324 if (pdev->num_resources != 4)
327 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
331 rtc1_base = ioremap(res->start, res->end - res->start + 1);
335 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
338 goto err_rtc1_iounmap;
341 rtc2_base = ioremap(res->start, res->end - res->start + 1);
344 goto err_rtc1_iounmap;
347 rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
349 retval = PTR_ERR(rtc);
350 goto err_iounmap_all;
353 rtc->max_user_freq = MAX_PERIODIC_RATE;
355 spin_lock_irq(&rtc_lock);
357 rtc1_write(ECMPLREG, 0);
358 rtc1_write(ECMPMREG, 0);
359 rtc1_write(ECMPHREG, 0);
360 rtc1_write(RTCL1LREG, 0);
361 rtc1_write(RTCL1HREG, 0);
363 spin_unlock_irq(&rtc_lock);
365 aie_irq = platform_get_irq(pdev, 0);
368 goto err_device_unregister;
371 retval = request_irq(aie_irq, elapsedtime_interrupt, IRQF_DISABLED,
372 "elapsed_time", pdev);
374 goto err_device_unregister;
376 pie_irq = platform_get_irq(pdev, 1);
380 retval = request_irq(pie_irq, rtclong1_interrupt, IRQF_DISABLED,
385 platform_set_drvdata(pdev, rtc);
387 disable_irq(aie_irq);
388 disable_irq(pie_irq);
390 printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
395 free_irq(aie_irq, pdev);
397 err_device_unregister:
398 rtc_device_unregister(rtc);
411 static int __devexit rtc_remove(struct platform_device *pdev)
413 struct rtc_device *rtc;
415 rtc = platform_get_drvdata(pdev);
417 rtc_device_unregister(rtc);
419 platform_set_drvdata(pdev, NULL);
421 free_irq(aie_irq, pdev);
422 free_irq(pie_irq, pdev);
431 /* work with hotplug and coldplug */
432 MODULE_ALIAS("platform:RTC");
434 static struct platform_driver rtc_platform_driver = {
436 .remove = __devexit_p(rtc_remove),
439 .owner = THIS_MODULE,
443 static int __init vr41xx_rtc_init(void)
445 return platform_driver_register(&rtc_platform_driver);
448 static void __exit vr41xx_rtc_exit(void)
450 platform_driver_unregister(&rtc_platform_driver);
453 module_init(vr41xx_rtc_init);
454 module_exit(vr41xx_rtc_exit);