2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3 * Routines for control of CS4235/4236B/4237B/4238B/4239 chips
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 * Indirect control registers (CS4236B+)
31 * D8: WSS reset (all chips)
33 * C1 (all chips except CS4236)
43 * D7-D4: 3D Space (CS4235,CS4237B,CS4238B,CS4239)
44 * D3-D0: 3D Center (CS4237B); 3D Volume (CS4238B)
47 * D7: 3D Enable (CS4237B)
48 * D6: 3D Mono Enable (CS4237B)
49 * D5: 3D Serial Output (CS4237B,CS4238B)
50 * D4: 3D Enable (CS4235,CS4238B,CS4239)
53 * D7: consumer serial port enable (CS4237B,CS4238B)
54 * D6: channels status block reset (CS4237B,CS4238B)
55 * D5: user bit in sub-frame of digital audio data (CS4237B,CS4238B)
56 * D4: validity bit bit in sub-frame of digital audio data (CS4237B,CS4238B)
58 * C5 lower channel status (digital serial data description) (CS4237B,CS4238B)
59 * D7-D6: first two bits of category code
61 * D4-D3: pre-emphasis (0 = none, 1 = 50/15us)
62 * D2: copy/copyright (0 = copy inhibited)
63 * D1: 0 = digital audio / 1 = non-digital audio
65 * C6 upper channel status (digital serial data description) (CS4237B,CS4238B)
66 * D7-D6: sample frequency (0 = 44.1kHz)
67 * D5: generation status (0 = no indication, 1 = original/commercially precaptureed data)
68 * D4-D0: category code (upper bits)
70 * C7 reserved (must write 0)
72 * C8 wavetable control
73 * D7: volume control interrupt enable (CS4235,CS4239)
74 * D6: hardware volume control format (CS4235,CS4239)
75 * D3: wavetable serial port enable (all chips)
76 * D2: DSP serial port switch (all chips)
77 * D1: disable MCLK (all chips)
78 * D0: force BRESET low (all chips)
83 #include <linux/delay.h>
84 #include <linux/init.h>
85 #include <linux/time.h>
86 #include <linux/wait.h>
87 #include <sound/core.h>
88 #include <sound/wss.h>
89 #include <sound/asoundef.h>
95 static unsigned char snd_cs4236_ext_map[18] = {
96 /* CS4236_LEFT_LINE */ 0xff,
97 /* CS4236_RIGHT_LINE */ 0xff,
98 /* CS4236_LEFT_MIC */ 0xdf,
99 /* CS4236_RIGHT_MIC */ 0xdf,
100 /* CS4236_LEFT_MIX_CTRL */ 0xe0 | 0x18,
101 /* CS4236_RIGHT_MIX_CTRL */ 0xe0,
102 /* CS4236_LEFT_FM */ 0xbf,
103 /* CS4236_RIGHT_FM */ 0xbf,
104 /* CS4236_LEFT_DSP */ 0xbf,
105 /* CS4236_RIGHT_DSP */ 0xbf,
106 /* CS4236_RIGHT_LOOPBACK */ 0xbf,
107 /* CS4236_DAC_MUTE */ 0xe0,
108 /* CS4236_ADC_RATE */ 0x01, /* 48kHz */
109 /* CS4236_DAC_RATE */ 0x01, /* 48kHz */
110 /* CS4236_LEFT_MASTER */ 0xbf,
111 /* CS4236_RIGHT_MASTER */ 0xbf,
112 /* CS4236_LEFT_WAVE */ 0xbf,
113 /* CS4236_RIGHT_WAVE */ 0xbf
120 static void snd_cs4236_ctrl_out(struct snd_wss *chip,
121 unsigned char reg, unsigned char val)
123 outb(reg, chip->cport + 3);
124 outb(chip->cimage[reg] = val, chip->cport + 4);
127 static unsigned char snd_cs4236_ctrl_in(struct snd_wss *chip, unsigned char reg)
129 outb(reg, chip->cport + 3);
130 return inb(chip->cport + 4);
139 static struct snd_ratnum clocks[CLOCKS] = {
140 { .num = 16934400, .den_min = 353, .den_max = 353, .den_step = 1 },
141 { .num = 16934400, .den_min = 529, .den_max = 529, .den_step = 1 },
142 { .num = 16934400, .den_min = 617, .den_max = 617, .den_step = 1 },
143 { .num = 16934400, .den_min = 1058, .den_max = 1058, .den_step = 1 },
144 { .num = 16934400, .den_min = 1764, .den_max = 1764, .den_step = 1 },
145 { .num = 16934400, .den_min = 2117, .den_max = 2117, .den_step = 1 },
146 { .num = 16934400, .den_min = 2558, .den_max = 2558, .den_step = 1 },
147 { .num = 16934400/16, .den_min = 21, .den_max = 192, .den_step = 1 }
150 static struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
155 static int snd_cs4236_xrate(struct snd_pcm_runtime *runtime)
157 return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
158 &hw_constraints_clocks);
161 static unsigned char divisor_to_rate_register(unsigned int divisor)
172 if (divisor < 21 || divisor > 192) {
180 static void snd_cs4236_playback_format(struct snd_wss *chip,
181 struct snd_pcm_hw_params *params,
185 unsigned char rate = divisor_to_rate_register(params->rate_den);
187 spin_lock_irqsave(&chip->reg_lock, flags);
188 /* set fast playback format change and clean playback FIFO */
189 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
190 chip->image[CS4231_ALT_FEATURE_1] | 0x10);
191 snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr & 0xf0);
192 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
193 chip->image[CS4231_ALT_FEATURE_1] & ~0x10);
194 snd_cs4236_ext_out(chip, CS4236_DAC_RATE, rate);
195 spin_unlock_irqrestore(&chip->reg_lock, flags);
198 static void snd_cs4236_capture_format(struct snd_wss *chip,
199 struct snd_pcm_hw_params *params,
203 unsigned char rate = divisor_to_rate_register(params->rate_den);
205 spin_lock_irqsave(&chip->reg_lock, flags);
206 /* set fast capture format change and clean capture FIFO */
207 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
208 chip->image[CS4231_ALT_FEATURE_1] | 0x20);
209 snd_wss_out(chip, CS4231_REC_FORMAT, cdfr & 0xf0);
210 snd_wss_out(chip, CS4231_ALT_FEATURE_1,
211 chip->image[CS4231_ALT_FEATURE_1] & ~0x20);
212 snd_cs4236_ext_out(chip, CS4236_ADC_RATE, rate);
213 spin_unlock_irqrestore(&chip->reg_lock, flags);
218 static void snd_cs4236_suspend(struct snd_wss *chip)
223 spin_lock_irqsave(&chip->reg_lock, flags);
224 for (reg = 0; reg < 32; reg++)
225 chip->image[reg] = snd_wss_in(chip, reg);
226 for (reg = 0; reg < 18; reg++)
227 chip->eimage[reg] = snd_cs4236_ext_in(chip, CS4236_I23VAL(reg));
228 for (reg = 2; reg < 9; reg++)
229 chip->cimage[reg] = snd_cs4236_ctrl_in(chip, reg);
230 spin_unlock_irqrestore(&chip->reg_lock, flags);
233 static void snd_cs4236_resume(struct snd_wss *chip)
238 snd_wss_mce_up(chip);
239 spin_lock_irqsave(&chip->reg_lock, flags);
240 for (reg = 0; reg < 32; reg++) {
244 case 27: /* why? CS4235 - master left */
245 case 29: /* why? CS4235 - master right */
248 snd_wss_out(chip, reg, chip->image[reg]);
252 for (reg = 0; reg < 18; reg++)
253 snd_cs4236_ext_out(chip, CS4236_I23VAL(reg), chip->eimage[reg]);
254 for (reg = 2; reg < 9; reg++) {
259 snd_cs4236_ctrl_out(chip, reg, chip->cimage[reg]);
262 spin_unlock_irqrestore(&chip->reg_lock, flags);
263 snd_wss_mce_down(chip);
266 #endif /* CONFIG_PM */
268 int snd_cs4236_create(struct snd_card *card,
271 int irq, int dma1, int dma2,
272 unsigned short hardware,
273 unsigned short hwshare,
274 struct snd_wss **rchip)
276 struct snd_wss *chip;
277 unsigned char ver1, ver2;
282 if (hardware == WSS_HW_DETECT)
283 hardware = WSS_HW_DETECT3;
285 snd_printk(KERN_ERR "please, specify control port "
286 "for CS4236+ chips\n");
289 err = snd_wss_create(card, port, cport,
290 irq, dma1, dma2, hardware, hwshare, &chip);
294 if (!(chip->hardware & WSS_HW_CS4236B_MASK)) {
295 snd_printk(KERN_ERR "CS4236+: MODE3 and extended registers "
296 "not available, hardware=0x%x\n", chip->hardware);
297 snd_device_free(card, chip);
303 for (idx = 0; idx < 8; idx++)
304 snd_printk(KERN_DEBUG "CD%i = 0x%x\n",
305 idx, inb(chip->cport + idx));
306 for (idx = 0; idx < 9; idx++)
307 snd_printk(KERN_DEBUG "C%i = 0x%x\n",
308 idx, snd_cs4236_ctrl_in(chip, idx));
311 ver1 = snd_cs4236_ctrl_in(chip, 1);
312 ver2 = snd_cs4236_ext_in(chip, CS4236_VERSION);
313 snd_printdd("CS4236: [0x%lx] C1 (version) = 0x%x, ext = 0x%x\n", cport, ver1, ver2);
315 snd_printk(KERN_ERR "CS4236+ chip detected, but "
316 "control port 0x%lx is not valid\n", cport);
317 snd_device_free(card, chip);
320 snd_cs4236_ctrl_out(chip, 0, 0x00);
321 snd_cs4236_ctrl_out(chip, 2, 0xff);
322 snd_cs4236_ctrl_out(chip, 3, 0x00);
323 snd_cs4236_ctrl_out(chip, 4, 0x80);
324 snd_cs4236_ctrl_out(chip, 5, ((IEC958_AES1_CON_PCM_CODER & 3) << 6) | IEC958_AES0_CON_EMPHASIS_NONE);
325 snd_cs4236_ctrl_out(chip, 6, IEC958_AES1_CON_PCM_CODER >> 2);
326 snd_cs4236_ctrl_out(chip, 7, 0x00);
327 /* 0x8c for C8 is valid for Turtle Beach Malibu - the IEC-958 output */
328 /* is working with this setup, other hardware should have */
329 /* different signal paths and this value should be selectable */
331 snd_cs4236_ctrl_out(chip, 8, 0x8c);
332 chip->rate_constraint = snd_cs4236_xrate;
333 chip->set_playback_format = snd_cs4236_playback_format;
334 chip->set_capture_format = snd_cs4236_capture_format;
336 chip->suspend = snd_cs4236_suspend;
337 chip->resume = snd_cs4236_resume;
340 /* initialize extended registers */
341 for (reg = 0; reg < sizeof(snd_cs4236_ext_map); reg++)
342 snd_cs4236_ext_out(chip, CS4236_I23VAL(reg), snd_cs4236_ext_map[reg]);
344 /* initialize compatible but more featured registers */
345 snd_wss_out(chip, CS4231_LEFT_INPUT, 0x40);
346 snd_wss_out(chip, CS4231_RIGHT_INPUT, 0x40);
347 snd_wss_out(chip, CS4231_AUX1_LEFT_INPUT, 0xff);
348 snd_wss_out(chip, CS4231_AUX1_RIGHT_INPUT, 0xff);
349 snd_wss_out(chip, CS4231_AUX2_LEFT_INPUT, 0xdf);
350 snd_wss_out(chip, CS4231_AUX2_RIGHT_INPUT, 0xdf);
351 snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff);
352 snd_wss_out(chip, CS4231_LEFT_LINE_IN, 0xff);
353 snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff);
354 switch (chip->hardware) {
357 snd_wss_out(chip, CS4235_LEFT_MASTER, 0xff);
358 snd_wss_out(chip, CS4235_RIGHT_MASTER, 0xff);
366 int snd_cs4236_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm)
371 err = snd_wss_pcm(chip, device, &pcm);
374 pcm->info_flags &= ~SNDRV_PCM_INFO_JOINT_DUPLEX;
384 #define CS4236_SINGLE(xname, xindex, reg, shift, mask, invert) \
385 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
386 .info = snd_cs4236_info_single, \
387 .get = snd_cs4236_get_single, .put = snd_cs4236_put_single, \
388 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
390 static int snd_cs4236_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
392 int mask = (kcontrol->private_value >> 16) & 0xff;
394 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
396 uinfo->value.integer.min = 0;
397 uinfo->value.integer.max = mask;
401 static int snd_cs4236_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
403 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
405 int reg = kcontrol->private_value & 0xff;
406 int shift = (kcontrol->private_value >> 8) & 0xff;
407 int mask = (kcontrol->private_value >> 16) & 0xff;
408 int invert = (kcontrol->private_value >> 24) & 0xff;
410 spin_lock_irqsave(&chip->reg_lock, flags);
411 ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask;
412 spin_unlock_irqrestore(&chip->reg_lock, flags);
414 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
418 static int snd_cs4236_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
420 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
422 int reg = kcontrol->private_value & 0xff;
423 int shift = (kcontrol->private_value >> 8) & 0xff;
424 int mask = (kcontrol->private_value >> 16) & 0xff;
425 int invert = (kcontrol->private_value >> 24) & 0xff;
429 val = (ucontrol->value.integer.value[0] & mask);
433 spin_lock_irqsave(&chip->reg_lock, flags);
434 val = (chip->eimage[CS4236_REG(reg)] & ~(mask << shift)) | val;
435 change = val != chip->eimage[CS4236_REG(reg)];
436 snd_cs4236_ext_out(chip, reg, val);
437 spin_unlock_irqrestore(&chip->reg_lock, flags);
441 #define CS4236_SINGLEC(xname, xindex, reg, shift, mask, invert) \
442 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
443 .info = snd_cs4236_info_single, \
444 .get = snd_cs4236_get_singlec, .put = snd_cs4236_put_singlec, \
445 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
447 static int snd_cs4236_get_singlec(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
449 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
451 int reg = kcontrol->private_value & 0xff;
452 int shift = (kcontrol->private_value >> 8) & 0xff;
453 int mask = (kcontrol->private_value >> 16) & 0xff;
454 int invert = (kcontrol->private_value >> 24) & 0xff;
456 spin_lock_irqsave(&chip->reg_lock, flags);
457 ucontrol->value.integer.value[0] = (chip->cimage[reg] >> shift) & mask;
458 spin_unlock_irqrestore(&chip->reg_lock, flags);
460 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
464 static int snd_cs4236_put_singlec(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
466 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
468 int reg = kcontrol->private_value & 0xff;
469 int shift = (kcontrol->private_value >> 8) & 0xff;
470 int mask = (kcontrol->private_value >> 16) & 0xff;
471 int invert = (kcontrol->private_value >> 24) & 0xff;
475 val = (ucontrol->value.integer.value[0] & mask);
479 spin_lock_irqsave(&chip->reg_lock, flags);
480 val = (chip->cimage[reg] & ~(mask << shift)) | val;
481 change = val != chip->cimage[reg];
482 snd_cs4236_ctrl_out(chip, reg, val);
483 spin_unlock_irqrestore(&chip->reg_lock, flags);
487 #define CS4236_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
488 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
489 .info = snd_cs4236_info_double, \
490 .get = snd_cs4236_get_double, .put = snd_cs4236_put_double, \
491 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
493 static int snd_cs4236_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
495 int mask = (kcontrol->private_value >> 24) & 0xff;
497 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
499 uinfo->value.integer.min = 0;
500 uinfo->value.integer.max = mask;
504 static int snd_cs4236_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
506 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
508 int left_reg = kcontrol->private_value & 0xff;
509 int right_reg = (kcontrol->private_value >> 8) & 0xff;
510 int shift_left = (kcontrol->private_value >> 16) & 0x07;
511 int shift_right = (kcontrol->private_value >> 19) & 0x07;
512 int mask = (kcontrol->private_value >> 24) & 0xff;
513 int invert = (kcontrol->private_value >> 22) & 1;
515 spin_lock_irqsave(&chip->reg_lock, flags);
516 ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(left_reg)] >> shift_left) & mask;
517 ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask;
518 spin_unlock_irqrestore(&chip->reg_lock, flags);
520 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
521 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
526 static int snd_cs4236_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
528 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
530 int left_reg = kcontrol->private_value & 0xff;
531 int right_reg = (kcontrol->private_value >> 8) & 0xff;
532 int shift_left = (kcontrol->private_value >> 16) & 0x07;
533 int shift_right = (kcontrol->private_value >> 19) & 0x07;
534 int mask = (kcontrol->private_value >> 24) & 0xff;
535 int invert = (kcontrol->private_value >> 22) & 1;
537 unsigned short val1, val2;
539 val1 = ucontrol->value.integer.value[0] & mask;
540 val2 = ucontrol->value.integer.value[1] & mask;
546 val2 <<= shift_right;
547 spin_lock_irqsave(&chip->reg_lock, flags);
548 if (left_reg != right_reg) {
549 val1 = (chip->eimage[CS4236_REG(left_reg)] & ~(mask << shift_left)) | val1;
550 val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2;
551 change = val1 != chip->eimage[CS4236_REG(left_reg)] || val2 != chip->eimage[CS4236_REG(right_reg)];
552 snd_cs4236_ext_out(chip, left_reg, val1);
553 snd_cs4236_ext_out(chip, right_reg, val2);
555 val1 = (chip->eimage[CS4236_REG(left_reg)] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
556 change = val1 != chip->eimage[CS4236_REG(left_reg)];
557 snd_cs4236_ext_out(chip, left_reg, val1);
559 spin_unlock_irqrestore(&chip->reg_lock, flags);
563 #define CS4236_DOUBLE1(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
564 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
565 .info = snd_cs4236_info_double, \
566 .get = snd_cs4236_get_double1, .put = snd_cs4236_put_double1, \
567 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
569 static int snd_cs4236_get_double1(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
571 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
573 int left_reg = kcontrol->private_value & 0xff;
574 int right_reg = (kcontrol->private_value >> 8) & 0xff;
575 int shift_left = (kcontrol->private_value >> 16) & 0x07;
576 int shift_right = (kcontrol->private_value >> 19) & 0x07;
577 int mask = (kcontrol->private_value >> 24) & 0xff;
578 int invert = (kcontrol->private_value >> 22) & 1;
580 spin_lock_irqsave(&chip->reg_lock, flags);
581 ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
582 ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask;
583 spin_unlock_irqrestore(&chip->reg_lock, flags);
585 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
586 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
591 static int snd_cs4236_put_double1(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
593 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
595 int left_reg = kcontrol->private_value & 0xff;
596 int right_reg = (kcontrol->private_value >> 8) & 0xff;
597 int shift_left = (kcontrol->private_value >> 16) & 0x07;
598 int shift_right = (kcontrol->private_value >> 19) & 0x07;
599 int mask = (kcontrol->private_value >> 24) & 0xff;
600 int invert = (kcontrol->private_value >> 22) & 1;
602 unsigned short val1, val2;
604 val1 = ucontrol->value.integer.value[0] & mask;
605 val2 = ucontrol->value.integer.value[1] & mask;
611 val2 <<= shift_right;
612 spin_lock_irqsave(&chip->reg_lock, flags);
613 val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
614 val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2;
615 change = val1 != chip->image[left_reg] || val2 != chip->eimage[CS4236_REG(right_reg)];
616 snd_wss_out(chip, left_reg, val1);
617 snd_cs4236_ext_out(chip, right_reg, val2);
618 spin_unlock_irqrestore(&chip->reg_lock, flags);
622 #define CS4236_MASTER_DIGITAL(xname, xindex) \
623 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
624 .info = snd_cs4236_info_double, \
625 .get = snd_cs4236_get_master_digital, .put = snd_cs4236_put_master_digital, \
626 .private_value = 71 << 24 }
628 static inline int snd_cs4236_mixer_master_digital_invert_volume(int vol)
630 return (vol < 64) ? 63 - vol : 64 + (71 - vol);
633 static int snd_cs4236_get_master_digital(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
635 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
638 spin_lock_irqsave(&chip->reg_lock, flags);
639 ucontrol->value.integer.value[0] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & 0x7f);
640 ucontrol->value.integer.value[1] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & 0x7f);
641 spin_unlock_irqrestore(&chip->reg_lock, flags);
645 static int snd_cs4236_put_master_digital(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
647 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
650 unsigned short val1, val2;
652 val1 = snd_cs4236_mixer_master_digital_invert_volume(ucontrol->value.integer.value[0] & 0x7f);
653 val2 = snd_cs4236_mixer_master_digital_invert_volume(ucontrol->value.integer.value[1] & 0x7f);
654 spin_lock_irqsave(&chip->reg_lock, flags);
655 val1 = (chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & ~0x7f) | val1;
656 val2 = (chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & ~0x7f) | val2;
657 change = val1 != chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] || val2 != chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)];
658 snd_cs4236_ext_out(chip, CS4236_LEFT_MASTER, val1);
659 snd_cs4236_ext_out(chip, CS4236_RIGHT_MASTER, val2);
660 spin_unlock_irqrestore(&chip->reg_lock, flags);
664 #define CS4235_OUTPUT_ACCU(xname, xindex) \
665 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
666 .info = snd_cs4236_info_double, \
667 .get = snd_cs4235_get_output_accu, .put = snd_cs4235_put_output_accu, \
668 .private_value = 3 << 24 }
670 static inline int snd_cs4235_mixer_output_accu_get_volume(int vol)
672 switch ((vol >> 5) & 3) {
681 static inline int snd_cs4235_mixer_output_accu_set_volume(int vol)
684 case 0: return 3 << 5;
685 case 1: return 0 << 5;
686 case 2: return 2 << 5;
687 case 3: return 1 << 5;
692 static int snd_cs4235_get_output_accu(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
694 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
697 spin_lock_irqsave(&chip->reg_lock, flags);
698 ucontrol->value.integer.value[0] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_LEFT_MASTER]);
699 ucontrol->value.integer.value[1] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_RIGHT_MASTER]);
700 spin_unlock_irqrestore(&chip->reg_lock, flags);
704 static int snd_cs4235_put_output_accu(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
706 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
709 unsigned short val1, val2;
711 val1 = snd_cs4235_mixer_output_accu_set_volume(ucontrol->value.integer.value[0]);
712 val2 = snd_cs4235_mixer_output_accu_set_volume(ucontrol->value.integer.value[1]);
713 spin_lock_irqsave(&chip->reg_lock, flags);
714 val1 = (chip->image[CS4235_LEFT_MASTER] & ~(3 << 5)) | val1;
715 val2 = (chip->image[CS4235_RIGHT_MASTER] & ~(3 << 5)) | val2;
716 change = val1 != chip->image[CS4235_LEFT_MASTER] || val2 != chip->image[CS4235_RIGHT_MASTER];
717 snd_wss_out(chip, CS4235_LEFT_MASTER, val1);
718 snd_wss_out(chip, CS4235_RIGHT_MASTER, val2);
719 spin_unlock_irqrestore(&chip->reg_lock, flags);
723 static struct snd_kcontrol_new snd_cs4236_controls[] = {
725 CS4236_DOUBLE("Master Digital Playback Switch", 0,
726 CS4236_LEFT_MASTER, CS4236_RIGHT_MASTER, 7, 7, 1, 1),
727 CS4236_DOUBLE("Master Digital Capture Switch", 0,
728 CS4236_DAC_MUTE, CS4236_DAC_MUTE, 7, 6, 1, 1),
729 CS4236_MASTER_DIGITAL("Master Digital Volume", 0),
731 CS4236_DOUBLE("Capture Boost Volume", 0,
732 CS4236_LEFT_MIX_CTRL, CS4236_RIGHT_MIX_CTRL, 5, 5, 3, 1),
734 WSS_DOUBLE("PCM Playback Switch", 0,
735 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
736 WSS_DOUBLE("PCM Playback Volume", 0,
737 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
739 CS4236_DOUBLE("DSP Playback Switch", 0,
740 CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 7, 7, 1, 1),
741 CS4236_DOUBLE("DSP Playback Volume", 0,
742 CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 0, 0, 63, 1),
744 CS4236_DOUBLE("FM Playback Switch", 0,
745 CS4236_LEFT_FM, CS4236_RIGHT_FM, 7, 7, 1, 1),
746 CS4236_DOUBLE("FM Playback Volume", 0,
747 CS4236_LEFT_FM, CS4236_RIGHT_FM, 0, 0, 63, 1),
749 CS4236_DOUBLE("Wavetable Playback Switch", 0,
750 CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 7, 7, 1, 1),
751 CS4236_DOUBLE("Wavetable Playback Volume", 0,
752 CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 0, 0, 63, 1),
754 WSS_DOUBLE("Synth Playback Switch", 0,
755 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
756 WSS_DOUBLE("Synth Volume", 0,
757 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
758 WSS_DOUBLE("Synth Capture Switch", 0,
759 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 6, 6, 1, 1),
760 WSS_DOUBLE("Synth Capture Bypass", 0,
761 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 5, 5, 1, 1),
763 CS4236_DOUBLE("Mic Playback Switch", 0,
764 CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 6, 6, 1, 1),
765 CS4236_DOUBLE("Mic Capture Switch", 0,
766 CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 7, 7, 1, 1),
767 CS4236_DOUBLE("Mic Volume", 0, CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 0, 0, 31, 1),
768 CS4236_DOUBLE("Mic Playback Boost", 0,
769 CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 5, 5, 1, 0),
771 WSS_DOUBLE("Line Playback Switch", 0,
772 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
773 WSS_DOUBLE("Line Volume", 0,
774 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
775 WSS_DOUBLE("Line Capture Switch", 0,
776 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 6, 6, 1, 1),
777 WSS_DOUBLE("Line Capture Bypass", 0,
778 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 5, 5, 1, 1),
780 WSS_DOUBLE("CD Playback Switch", 0,
781 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
782 WSS_DOUBLE("CD Volume", 0,
783 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
784 WSS_DOUBLE("CD Capture Switch", 0,
785 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 6, 6, 1, 1),
787 CS4236_DOUBLE1("Mono Output Playback Switch", 0,
788 CS4231_MONO_CTRL, CS4236_RIGHT_MIX_CTRL, 6, 7, 1, 1),
789 CS4236_DOUBLE1("Mono Playback Switch", 0,
790 CS4231_MONO_CTRL, CS4236_LEFT_MIX_CTRL, 7, 7, 1, 1),
791 WSS_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
792 WSS_SINGLE("Mono Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
794 WSS_DOUBLE("Capture Volume", 0,
795 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
796 WSS_DOUBLE("Analog Loopback Capture Switch", 0,
797 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 7, 7, 1, 0),
799 WSS_SINGLE("Digital Loopback Playback Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
800 CS4236_DOUBLE1("Digital Loopback Playback Volume", 0,
801 CS4231_LOOPBACK, CS4236_RIGHT_LOOPBACK, 2, 0, 63, 1)
804 static struct snd_kcontrol_new snd_cs4235_controls[] = {
806 WSS_DOUBLE("Master Switch", 0,
807 CS4235_LEFT_MASTER, CS4235_RIGHT_MASTER, 7, 7, 1, 1),
808 WSS_DOUBLE("Master Volume", 0,
809 CS4235_LEFT_MASTER, CS4235_RIGHT_MASTER, 0, 0, 31, 1),
811 CS4235_OUTPUT_ACCU("Playback Volume", 0),
813 CS4236_DOUBLE("Master Digital Playback Switch", 0,
814 CS4236_LEFT_MASTER, CS4236_RIGHT_MASTER, 7, 7, 1, 1),
815 CS4236_DOUBLE("Master Digital Capture Switch", 0,
816 CS4236_DAC_MUTE, CS4236_DAC_MUTE, 7, 6, 1, 1),
817 CS4236_MASTER_DIGITAL("Master Digital Volume", 0),
819 WSS_DOUBLE("Master Digital Playback Switch", 1,
820 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
821 WSS_DOUBLE("Master Digital Capture Switch", 1,
822 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 6, 6, 1, 1),
823 WSS_DOUBLE("Master Digital Volume", 1,
824 CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
826 CS4236_DOUBLE("Capture Volume", 0,
827 CS4236_LEFT_MIX_CTRL, CS4236_RIGHT_MIX_CTRL, 5, 5, 3, 1),
829 WSS_DOUBLE("PCM Switch", 0,
830 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
831 WSS_DOUBLE("PCM Volume", 0,
832 CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
834 CS4236_DOUBLE("DSP Switch", 0, CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 7, 7, 1, 1),
836 CS4236_DOUBLE("FM Switch", 0, CS4236_LEFT_FM, CS4236_RIGHT_FM, 7, 7, 1, 1),
838 CS4236_DOUBLE("Wavetable Switch", 0,
839 CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 7, 7, 1, 1),
841 CS4236_DOUBLE("Mic Capture Switch", 0,
842 CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 7, 7, 1, 1),
843 CS4236_DOUBLE("Mic Playback Switch", 0,
844 CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 6, 6, 1, 1),
845 CS4236_SINGLE("Mic Volume", 0, CS4236_LEFT_MIC, 0, 31, 1),
846 CS4236_SINGLE("Mic Playback Boost", 0, CS4236_LEFT_MIC, 5, 1, 0),
848 WSS_DOUBLE("Aux Playback Switch", 0,
849 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
850 WSS_DOUBLE("Aux Capture Switch", 0,
851 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 6, 6, 1, 1),
852 WSS_DOUBLE("Aux Volume", 0,
853 CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
855 WSS_DOUBLE("Aux Playback Switch", 1,
856 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
857 WSS_DOUBLE("Aux Capture Switch", 1,
858 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 6, 6, 1, 1),
859 WSS_DOUBLE("Aux Volume", 1,
860 CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
862 CS4236_DOUBLE1("Master Mono Switch", 0,
863 CS4231_MONO_CTRL, CS4236_RIGHT_MIX_CTRL, 6, 7, 1, 1),
865 CS4236_DOUBLE1("Mono Switch", 0,
866 CS4231_MONO_CTRL, CS4236_LEFT_MIX_CTRL, 7, 7, 1, 1),
867 WSS_SINGLE("Mono Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
869 WSS_DOUBLE("Analog Loopback Switch", 0,
870 CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 7, 7, 1, 0),
873 #define CS4236_IEC958_ENABLE(xname, xindex) \
874 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
875 .info = snd_cs4236_info_single, \
876 .get = snd_cs4236_get_iec958_switch, .put = snd_cs4236_put_iec958_switch, \
877 .private_value = 1 << 16 }
879 static int snd_cs4236_get_iec958_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
881 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
884 spin_lock_irqsave(&chip->reg_lock, flags);
885 ucontrol->value.integer.value[0] = chip->image[CS4231_ALT_FEATURE_1] & 0x02 ? 1 : 0;
887 printk(KERN_DEBUG "get valid: ALT = 0x%x, C3 = 0x%x, C4 = 0x%x, "
888 "C5 = 0x%x, C6 = 0x%x, C8 = 0x%x\n",
889 snd_wss_in(chip, CS4231_ALT_FEATURE_1),
890 snd_cs4236_ctrl_in(chip, 3),
891 snd_cs4236_ctrl_in(chip, 4),
892 snd_cs4236_ctrl_in(chip, 5),
893 snd_cs4236_ctrl_in(chip, 6),
894 snd_cs4236_ctrl_in(chip, 8));
896 spin_unlock_irqrestore(&chip->reg_lock, flags);
900 static int snd_cs4236_put_iec958_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
902 struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
905 unsigned short enable, val;
907 enable = ucontrol->value.integer.value[0] & 1;
909 mutex_lock(&chip->mce_mutex);
910 snd_wss_mce_up(chip);
911 spin_lock_irqsave(&chip->reg_lock, flags);
912 val = (chip->image[CS4231_ALT_FEATURE_1] & ~0x0e) | (0<<2) | (enable << 1);
913 change = val != chip->image[CS4231_ALT_FEATURE_1];
914 snd_wss_out(chip, CS4231_ALT_FEATURE_1, val);
915 val = snd_cs4236_ctrl_in(chip, 4) | 0xc0;
916 snd_cs4236_ctrl_out(chip, 4, val);
919 snd_cs4236_ctrl_out(chip, 4, val);
920 spin_unlock_irqrestore(&chip->reg_lock, flags);
921 snd_wss_mce_down(chip);
922 mutex_unlock(&chip->mce_mutex);
925 printk(KERN_DEBUG "set valid: ALT = 0x%x, C3 = 0x%x, C4 = 0x%x, "
926 "C5 = 0x%x, C6 = 0x%x, C8 = 0x%x\n",
927 snd_wss_in(chip, CS4231_ALT_FEATURE_1),
928 snd_cs4236_ctrl_in(chip, 3),
929 snd_cs4236_ctrl_in(chip, 4),
930 snd_cs4236_ctrl_in(chip, 5),
931 snd_cs4236_ctrl_in(chip, 6),
932 snd_cs4236_ctrl_in(chip, 8));
937 static struct snd_kcontrol_new snd_cs4236_iec958_controls[] = {
938 CS4236_IEC958_ENABLE("IEC958 Output Enable", 0),
939 CS4236_SINGLEC("IEC958 Output Validity", 0, 4, 4, 1, 0),
940 CS4236_SINGLEC("IEC958 Output User", 0, 4, 5, 1, 0),
941 CS4236_SINGLEC("IEC958 Output CSBR", 0, 4, 6, 1, 0),
942 CS4236_SINGLEC("IEC958 Output Channel Status Low", 0, 5, 1, 127, 0),
943 CS4236_SINGLEC("IEC958 Output Channel Status High", 0, 6, 0, 255, 0)
946 static struct snd_kcontrol_new snd_cs4236_3d_controls_cs4235[] = {
947 CS4236_SINGLEC("3D Control - Switch", 0, 3, 4, 1, 0),
948 CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1)
951 static struct snd_kcontrol_new snd_cs4236_3d_controls_cs4237[] = {
952 CS4236_SINGLEC("3D Control - Switch", 0, 3, 7, 1, 0),
953 CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1),
954 CS4236_SINGLEC("3D Control - Center", 0, 2, 0, 15, 1),
955 CS4236_SINGLEC("3D Control - Mono", 0, 3, 6, 1, 0),
956 CS4236_SINGLEC("3D Control - IEC958", 0, 3, 5, 1, 0)
959 static struct snd_kcontrol_new snd_cs4236_3d_controls_cs4238[] = {
960 CS4236_SINGLEC("3D Control - Switch", 0, 3, 4, 1, 0),
961 CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1),
962 CS4236_SINGLEC("3D Control - Volume", 0, 2, 0, 15, 1),
963 CS4236_SINGLEC("3D Control - IEC958", 0, 3, 5, 1, 0)
966 int snd_cs4236_mixer(struct snd_wss *chip)
968 struct snd_card *card;
969 unsigned int idx, count;
971 struct snd_kcontrol_new *kcontrol;
973 if (snd_BUG_ON(!chip || !chip->card))
976 strcpy(card->mixername, snd_wss_chip_id(chip));
978 if (chip->hardware == WSS_HW_CS4235 ||
979 chip->hardware == WSS_HW_CS4239) {
980 for (idx = 0; idx < ARRAY_SIZE(snd_cs4235_controls); idx++) {
981 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4235_controls[idx], chip))) < 0)
985 for (idx = 0; idx < ARRAY_SIZE(snd_cs4236_controls); idx++) {
986 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_controls[idx], chip))) < 0)
990 switch (chip->hardware) {
993 count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4235);
994 kcontrol = snd_cs4236_3d_controls_cs4235;
997 count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4237);
998 kcontrol = snd_cs4236_3d_controls_cs4237;
1000 case WSS_HW_CS4238B:
1001 count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4238);
1002 kcontrol = snd_cs4236_3d_controls_cs4238;
1008 for (idx = 0; idx < count; idx++, kcontrol++) {
1009 if ((err = snd_ctl_add(card, snd_ctl_new1(kcontrol, chip))) < 0)
1012 if (chip->hardware == WSS_HW_CS4237B ||
1013 chip->hardware == WSS_HW_CS4238B) {
1014 for (idx = 0; idx < ARRAY_SIZE(snd_cs4236_iec958_controls); idx++) {
1015 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_iec958_controls[idx], chip))) < 0)