4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
46 #include <asm/pgtable.h>
47 #include <asm/tlbflush.h>
48 #include <asm/fixmap.h>
49 #include <asm/mmu_context.h>
50 #include <asm/setup.h>
51 #include <asm/paravirt.h>
52 #include <asm/linkage.h>
54 #include <asm/xen/hypercall.h>
55 #include <asm/xen/hypervisor.h>
58 #include <xen/interface/xen.h>
59 #include <xen/interface/version.h>
60 #include <xen/hvc-console.h>
62 #include "multicalls.h"
66 #define MMU_UPDATE_HISTO 30
68 #ifdef CONFIG_XEN_DEBUG_FS
72 u32 pgd_update_pinned;
73 u32 pgd_update_batched;
76 u32 pud_update_pinned;
77 u32 pud_update_batched;
80 u32 pmd_update_pinned;
81 u32 pmd_update_batched;
84 u32 pte_update_pinned;
85 u32 pte_update_batched;
88 u32 mmu_update_extended;
89 u32 mmu_update_histo[MMU_UPDATE_HISTO];
92 u32 prot_commit_batched;
95 u32 set_pte_at_batched;
96 u32 set_pte_at_pinned;
97 u32 set_pte_at_current;
98 u32 set_pte_at_kernel;
101 static u8 zero_stats;
103 static inline void check_zero(void)
105 if (unlikely(zero_stats)) {
106 memset(&mmu_stats, 0, sizeof(mmu_stats));
111 #define ADD_STATS(elem, val) \
112 do { check_zero(); mmu_stats.elem += (val); } while(0)
114 #else /* !CONFIG_XEN_DEBUG_FS */
116 #define ADD_STATS(elem, val) do { (void)(val); } while(0)
118 #endif /* CONFIG_XEN_DEBUG_FS */
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
126 static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
129 /* l3 pud for userspace vsyscall mapping */
130 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131 #endif /* CONFIG_X86_64 */
134 * Note about cr3 (pagetable base) values:
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
147 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
153 * redzone above it, so round it up to a PGD boundary.
155 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
158 #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
159 #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
161 /* Placeholder for holes in the address space */
162 static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
163 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
165 /* Array of pointers to pages containing p2m entries */
166 static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
167 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
169 /* Arrays of p2m arrays expressed in mfns used for save/restore */
170 static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
172 static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
175 static inline unsigned p2m_top_index(unsigned long pfn)
177 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
178 return pfn / P2M_ENTRIES_PER_PAGE;
181 static inline unsigned p2m_index(unsigned long pfn)
183 return pfn % P2M_ENTRIES_PER_PAGE;
186 /* Build the parallel p2m_top_mfn structures */
187 void xen_setup_mfn_list_list(void)
191 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
192 unsigned topidx = p2m_top_index(pfn);
194 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
197 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
202 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
204 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
205 virt_to_mfn(p2m_top_mfn_list);
206 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
209 /* Set up p2m_top to point to the domain-builder provided p2m pages */
210 void __init xen_build_dynamic_phys_to_machine(void)
212 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
213 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
216 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
217 unsigned topidx = p2m_top_index(pfn);
219 p2m_top[topidx] = &mfn_list[pfn];
223 unsigned long get_phys_to_machine(unsigned long pfn)
225 unsigned topidx, idx;
227 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
228 return INVALID_P2M_ENTRY;
230 topidx = p2m_top_index(pfn);
231 idx = p2m_index(pfn);
232 return p2m_top[topidx][idx];
234 EXPORT_SYMBOL_GPL(get_phys_to_machine);
236 static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
241 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
244 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
245 p[i] = INVALID_P2M_ENTRY;
247 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
248 free_page((unsigned long)p);
250 *mfnp = virt_to_mfn(p);
253 void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
255 unsigned topidx, idx;
257 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
258 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
262 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
263 BUG_ON(mfn != INVALID_P2M_ENTRY);
267 topidx = p2m_top_index(pfn);
268 if (p2m_top[topidx] == p2m_missing) {
269 /* no need to allocate a page to store an invalid entry */
270 if (mfn == INVALID_P2M_ENTRY)
272 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
275 idx = p2m_index(pfn);
276 p2m_top[topidx][idx] = mfn;
279 unsigned long arbitrary_virt_to_mfn(void *vaddr)
281 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
283 return PFN_DOWN(maddr.maddr);
286 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
288 unsigned long address = (unsigned long)vaddr;
294 * if the PFN is in the linear mapped vaddr range, we can just use
295 * the (quick) virt_to_machine() p2m lookup
297 if (virt_addr_valid(vaddr))
298 return virt_to_machine(vaddr);
300 /* otherwise we have to do a (slower) full page-table walk */
302 pte = lookup_address(address, &level);
304 offset = address & ~PAGE_MASK;
305 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
308 void make_lowmem_page_readonly(void *vaddr)
311 unsigned long address = (unsigned long)vaddr;
314 pte = lookup_address(address, &level);
317 ptev = pte_wrprotect(*pte);
319 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
323 void make_lowmem_page_readwrite(void *vaddr)
326 unsigned long address = (unsigned long)vaddr;
329 pte = lookup_address(address, &level);
332 ptev = pte_mkwrite(*pte);
334 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
339 static bool xen_page_pinned(void *ptr)
341 struct page *page = virt_to_page(ptr);
343 return PagePinned(page);
346 static void xen_extend_mmu_update(const struct mmu_update *update)
348 struct multicall_space mcs;
349 struct mmu_update *u;
351 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
353 if (mcs.mc != NULL) {
354 ADD_STATS(mmu_update_extended, 1);
355 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
359 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
360 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
362 ADD_STATS(mmu_update_histo[0], 1);
364 ADD_STATS(mmu_update, 1);
365 mcs = __xen_mc_entry(sizeof(*u));
366 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
367 ADD_STATS(mmu_update_histo[1], 1);
374 void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
382 /* ptr may be ioremapped for 64-bit pagetable setup */
383 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
384 u.val = pmd_val_ma(val);
385 xen_extend_mmu_update(&u);
387 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
389 xen_mc_issue(PARAVIRT_LAZY_MMU);
394 void xen_set_pmd(pmd_t *ptr, pmd_t val)
396 ADD_STATS(pmd_update, 1);
398 /* If page is not pinned, we can just update the entry
400 if (!xen_page_pinned(ptr)) {
405 ADD_STATS(pmd_update_pinned, 1);
407 xen_set_pmd_hyper(ptr, val);
411 * Associate a virtual page frame with a given physical page frame
412 * and protection flags for that frame.
414 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
416 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
419 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
420 pte_t *ptep, pte_t pteval)
422 /* updates to init_mm may be done without lock */
426 ADD_STATS(set_pte_at, 1);
427 // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
428 ADD_STATS(set_pte_at_current, mm == current->mm);
429 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
431 if (mm == current->mm || mm == &init_mm) {
432 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
433 struct multicall_space mcs;
434 mcs = xen_mc_entry(0);
436 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
437 ADD_STATS(set_pte_at_batched, 1);
438 xen_mc_issue(PARAVIRT_LAZY_MMU);
441 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
444 xen_set_pte(ptep, pteval);
451 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
452 unsigned long addr, pte_t *ptep)
454 /* Just return the pte as-is. We preserve the bits on commit */
458 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
459 pte_t *ptep, pte_t pte)
465 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
466 u.val = pte_val_ma(pte);
467 xen_extend_mmu_update(&u);
469 ADD_STATS(prot_commit, 1);
470 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
472 xen_mc_issue(PARAVIRT_LAZY_MMU);
475 /* Assume pteval_t is equivalent to all the other *val_t types. */
476 static pteval_t pte_mfn_to_pfn(pteval_t val)
478 if (val & _PAGE_PRESENT) {
479 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
480 pteval_t flags = val & PTE_FLAGS_MASK;
481 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
487 static pteval_t pte_pfn_to_mfn(pteval_t val)
489 if (val & _PAGE_PRESENT) {
490 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
491 pteval_t flags = val & PTE_FLAGS_MASK;
492 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
498 pteval_t xen_pte_val(pte_t pte)
500 return pte_mfn_to_pfn(pte.pte);
502 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
504 pgdval_t xen_pgd_val(pgd_t pgd)
506 return pte_mfn_to_pfn(pgd.pgd);
508 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
510 pte_t xen_make_pte(pteval_t pte)
512 pte = pte_pfn_to_mfn(pte);
513 return native_make_pte(pte);
515 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
517 pgd_t xen_make_pgd(pgdval_t pgd)
519 pgd = pte_pfn_to_mfn(pgd);
520 return native_make_pgd(pgd);
522 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
524 pmdval_t xen_pmd_val(pmd_t pmd)
526 return pte_mfn_to_pfn(pmd.pmd);
528 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
530 void xen_set_pud_hyper(pud_t *ptr, pud_t val)
538 /* ptr may be ioremapped for 64-bit pagetable setup */
539 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
540 u.val = pud_val_ma(val);
541 xen_extend_mmu_update(&u);
543 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
545 xen_mc_issue(PARAVIRT_LAZY_MMU);
550 void xen_set_pud(pud_t *ptr, pud_t val)
552 ADD_STATS(pud_update, 1);
554 /* If page is not pinned, we can just update the entry
556 if (!xen_page_pinned(ptr)) {
561 ADD_STATS(pud_update_pinned, 1);
563 xen_set_pud_hyper(ptr, val);
566 void xen_set_pte(pte_t *ptep, pte_t pte)
568 ADD_STATS(pte_update, 1);
569 // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
570 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
572 #ifdef CONFIG_X86_PAE
573 ptep->pte_high = pte.pte_high;
575 ptep->pte_low = pte.pte_low;
581 #ifdef CONFIG_X86_PAE
582 void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
584 set_64bit((u64 *)ptep, native_pte_val(pte));
587 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
590 smp_wmb(); /* make sure low gets written first */
594 void xen_pmd_clear(pmd_t *pmdp)
596 set_pmd(pmdp, __pmd(0));
598 #endif /* CONFIG_X86_PAE */
600 pmd_t xen_make_pmd(pmdval_t pmd)
602 pmd = pte_pfn_to_mfn(pmd);
603 return native_make_pmd(pmd);
605 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
607 #if PAGETABLE_LEVELS == 4
608 pudval_t xen_pud_val(pud_t pud)
610 return pte_mfn_to_pfn(pud.pud);
612 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
614 pud_t xen_make_pud(pudval_t pud)
616 pud = pte_pfn_to_mfn(pud);
618 return native_make_pud(pud);
620 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
622 pgd_t *xen_get_user_pgd(pgd_t *pgd)
624 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
625 unsigned offset = pgd - pgd_page;
626 pgd_t *user_ptr = NULL;
628 if (offset < pgd_index(USER_LIMIT)) {
629 struct page *page = virt_to_page(pgd_page);
630 user_ptr = (pgd_t *)page->private;
638 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
642 u.ptr = virt_to_machine(ptr).maddr;
643 u.val = pgd_val_ma(val);
644 xen_extend_mmu_update(&u);
648 * Raw hypercall-based set_pgd, intended for in early boot before
649 * there's a page structure. This implies:
650 * 1. The only existing pagetable is the kernel's
651 * 2. It is always pinned
652 * 3. It has no user pagetable attached to it
654 void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
660 __xen_set_pgd_hyper(ptr, val);
662 xen_mc_issue(PARAVIRT_LAZY_MMU);
667 void xen_set_pgd(pgd_t *ptr, pgd_t val)
669 pgd_t *user_ptr = xen_get_user_pgd(ptr);
671 ADD_STATS(pgd_update, 1);
673 /* If page is not pinned, we can just update the entry
675 if (!xen_page_pinned(ptr)) {
678 WARN_ON(xen_page_pinned(user_ptr));
684 ADD_STATS(pgd_update_pinned, 1);
685 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
687 /* If it's pinned, then we can at least batch the kernel and
688 user updates together. */
691 __xen_set_pgd_hyper(ptr, val);
693 __xen_set_pgd_hyper(user_ptr, val);
695 xen_mc_issue(PARAVIRT_LAZY_MMU);
697 #endif /* PAGETABLE_LEVELS == 4 */
700 * (Yet another) pagetable walker. This one is intended for pinning a
701 * pagetable. This means that it walks a pagetable and calls the
702 * callback function on each page it finds making up the page table,
703 * at every level. It walks the entire pagetable, but it only bothers
704 * pinning pte pages which are below limit. In the normal case this
705 * will be STACK_TOP_MAX, but at boot we need to pin up to
708 * For 32-bit the important bit is that we don't pin beyond there,
709 * because then we start getting into Xen's ptes.
711 * For 64-bit, we must skip the Xen hole in the middle of the address
712 * space, just after the big x86-64 virtual hole.
714 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
715 int (*func)(struct mm_struct *mm, struct page *,
720 unsigned hole_low, hole_high;
721 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
722 unsigned pgdidx, pudidx, pmdidx;
724 /* The limit is the last byte to be touched */
726 BUG_ON(limit >= FIXADDR_TOP);
728 if (xen_feature(XENFEAT_auto_translated_physmap))
732 * 64-bit has a great big hole in the middle of the address
733 * space, which contains the Xen mappings. On 32-bit these
734 * will end up making a zero-sized hole and so is a no-op.
736 hole_low = pgd_index(USER_LIMIT);
737 hole_high = pgd_index(PAGE_OFFSET);
739 pgdidx_limit = pgd_index(limit);
741 pudidx_limit = pud_index(limit);
746 pmdidx_limit = pmd_index(limit);
751 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
754 if (pgdidx >= hole_low && pgdidx < hole_high)
757 if (!pgd_val(pgd[pgdidx]))
760 pud = pud_offset(&pgd[pgdidx], 0);
762 if (PTRS_PER_PUD > 1) /* not folded */
763 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
765 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
768 if (pgdidx == pgdidx_limit &&
769 pudidx > pudidx_limit)
772 if (pud_none(pud[pudidx]))
775 pmd = pmd_offset(&pud[pudidx], 0);
777 if (PTRS_PER_PMD > 1) /* not folded */
778 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
780 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
783 if (pgdidx == pgdidx_limit &&
784 pudidx == pudidx_limit &&
785 pmdidx > pmdidx_limit)
788 if (pmd_none(pmd[pmdidx]))
791 pte = pmd_page(pmd[pmdidx]);
792 flush |= (*func)(mm, pte, PT_PTE);
798 /* Do the top level last, so that the callbacks can use it as
799 a cue to do final things like tlb flushes. */
800 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
805 static int xen_pgd_walk(struct mm_struct *mm,
806 int (*func)(struct mm_struct *mm, struct page *,
810 return __xen_pgd_walk(mm, mm->pgd, func, limit);
813 /* If we're using split pte locks, then take the page's lock and
814 return a pointer to it. Otherwise return NULL. */
815 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
817 spinlock_t *ptl = NULL;
819 #if USE_SPLIT_PTLOCKS
820 ptl = __pte_lockptr(page);
821 spin_lock_nest_lock(ptl, &mm->page_table_lock);
827 static void xen_pte_unlock(void *v)
833 static void xen_do_pin(unsigned level, unsigned long pfn)
835 struct mmuext_op *op;
836 struct multicall_space mcs;
838 mcs = __xen_mc_entry(sizeof(*op));
841 op->arg1.mfn = pfn_to_mfn(pfn);
842 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
845 static int xen_pin_page(struct mm_struct *mm, struct page *page,
848 unsigned pgfl = TestSetPagePinned(page);
852 flush = 0; /* already pinned */
853 else if (PageHighMem(page))
854 /* kmaps need flushing if we found an unpinned
858 void *pt = lowmem_page_address(page);
859 unsigned long pfn = page_to_pfn(page);
860 struct multicall_space mcs = __xen_mc_entry(0);
866 * We need to hold the pagetable lock between the time
867 * we make the pagetable RO and when we actually pin
868 * it. If we don't, then other users may come in and
869 * attempt to update the pagetable by writing it,
870 * which will fail because the memory is RO but not
871 * pinned, so Xen won't do the trap'n'emulate.
873 * If we're using split pte locks, we can't hold the
874 * entire pagetable's worth of locks during the
875 * traverse, because we may wrap the preempt count (8
876 * bits). The solution is to mark RO and pin each PTE
877 * page while holding the lock. This means the number
878 * of locks we end up holding is never more than a
879 * batch size (~32 entries, at present).
881 * If we're not using split pte locks, we needn't pin
882 * the PTE pages independently, because we're
883 * protected by the overall pagetable lock.
887 ptl = xen_pte_lock(page, mm);
889 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
890 pfn_pte(pfn, PAGE_KERNEL_RO),
891 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
894 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
896 /* Queue a deferred unlock for when this batch
898 xen_mc_callback(xen_pte_unlock, ptl);
905 /* This is called just after a mm has been created, but it has not
906 been used yet. We need to make sure that its pagetable is all
907 read-only, and can be pinned. */
908 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
914 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
915 /* re-enable interrupts for flushing */
925 pgd_t *user_pgd = xen_get_user_pgd(pgd);
927 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
930 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
931 xen_do_pin(MMUEXT_PIN_L4_TABLE,
932 PFN_DOWN(__pa(user_pgd)));
935 #else /* CONFIG_X86_32 */
936 #ifdef CONFIG_X86_PAE
937 /* Need to make sure unshared kernel PMD is pinnable */
938 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
941 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
942 #endif /* CONFIG_X86_64 */
946 static void xen_pgd_pin(struct mm_struct *mm)
948 __xen_pgd_pin(mm, mm->pgd);
952 * On save, we need to pin all pagetables to make sure they get their
953 * mfns turned into pfns. Search the list for any unpinned pgds and pin
954 * them (unpinned pgds are not currently in use, probably because the
955 * process is under construction or destruction).
957 * Expected to be called in stop_machine() ("equivalent to taking
958 * every spinlock in the system"), so the locking doesn't really
959 * matter all that much.
961 void xen_mm_pin_all(void)
966 spin_lock_irqsave(&pgd_lock, flags);
968 list_for_each_entry(page, &pgd_list, lru) {
969 if (!PagePinned(page)) {
970 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
971 SetPageSavePinned(page);
975 spin_unlock_irqrestore(&pgd_lock, flags);
979 * The init_mm pagetable is really pinned as soon as its created, but
980 * that's before we have page structures to store the bits. So do all
981 * the book-keeping now.
983 static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
990 void __init xen_mark_init_mm_pinned(void)
992 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
995 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
998 unsigned pgfl = TestClearPagePinned(page);
1000 if (pgfl && !PageHighMem(page)) {
1001 void *pt = lowmem_page_address(page);
1002 unsigned long pfn = page_to_pfn(page);
1003 spinlock_t *ptl = NULL;
1004 struct multicall_space mcs;
1007 * Do the converse to pin_page. If we're using split
1008 * pte locks, we must be holding the lock for while
1009 * the pte page is unpinned but still RO to prevent
1010 * concurrent updates from seeing it in this
1011 * partially-pinned state.
1013 if (level == PT_PTE) {
1014 ptl = xen_pte_lock(page, mm);
1017 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
1020 mcs = __xen_mc_entry(0);
1022 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1023 pfn_pte(pfn, PAGE_KERNEL),
1024 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1027 /* unlock when batch completed */
1028 xen_mc_callback(xen_pte_unlock, ptl);
1032 return 0; /* never need to flush on unpin */
1035 /* Release a pagetables pages back as normal RW */
1036 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
1040 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1042 #ifdef CONFIG_X86_64
1044 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1047 xen_do_pin(MMUEXT_UNPIN_TABLE,
1048 PFN_DOWN(__pa(user_pgd)));
1049 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1054 #ifdef CONFIG_X86_PAE
1055 /* Need to make sure unshared kernel PMD is unpinned */
1056 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1060 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1065 static void xen_pgd_unpin(struct mm_struct *mm)
1067 __xen_pgd_unpin(mm, mm->pgd);
1071 * On resume, undo any pinning done at save, so that the rest of the
1072 * kernel doesn't see any unexpected pinned pagetables.
1074 void xen_mm_unpin_all(void)
1076 unsigned long flags;
1079 spin_lock_irqsave(&pgd_lock, flags);
1081 list_for_each_entry(page, &pgd_list, lru) {
1082 if (PageSavePinned(page)) {
1083 BUG_ON(!PagePinned(page));
1084 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1085 ClearPageSavePinned(page);
1089 spin_unlock_irqrestore(&pgd_lock, flags);
1092 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1094 spin_lock(&next->page_table_lock);
1096 spin_unlock(&next->page_table_lock);
1099 void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1101 spin_lock(&mm->page_table_lock);
1103 spin_unlock(&mm->page_table_lock);
1108 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1109 we need to repoint it somewhere else before we can unpin it. */
1110 static void drop_other_mm_ref(void *info)
1112 struct mm_struct *mm = info;
1113 struct mm_struct *active_mm;
1115 active_mm = percpu_read(cpu_tlbstate.active_mm);
1117 if (active_mm == mm)
1118 leave_mm(smp_processor_id());
1120 /* If this cpu still has a stale cr3 reference, then make sure
1121 it has been flushed. */
1122 if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
1123 load_cr3(swapper_pg_dir);
1124 arch_flush_lazy_cpu_mode();
1128 static void xen_drop_mm_ref(struct mm_struct *mm)
1133 if (current->active_mm == mm) {
1134 if (current->mm == mm)
1135 load_cr3(swapper_pg_dir);
1137 leave_mm(smp_processor_id());
1138 arch_flush_lazy_cpu_mode();
1141 /* Get the "official" set of cpus referring to our pagetable. */
1142 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1143 for_each_online_cpu(cpu) {
1144 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1145 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1147 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1151 cpumask_copy(mask, &mm->cpu_vm_mask);
1153 /* It's possible that a vcpu may have a stale reference to our
1154 cr3, because its in lazy mode, and it hasn't yet flushed
1155 its set of pending hypercalls yet. In this case, we can
1156 look at its actual current cr3 value, and force it to flush
1158 for_each_online_cpu(cpu) {
1159 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1160 cpumask_set_cpu(cpu, mask);
1163 if (!cpumask_empty(mask))
1164 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1165 free_cpumask_var(mask);
1168 static void xen_drop_mm_ref(struct mm_struct *mm)
1170 if (current->active_mm == mm)
1171 load_cr3(swapper_pg_dir);
1176 * While a process runs, Xen pins its pagetables, which means that the
1177 * hypervisor forces it to be read-only, and it controls all updates
1178 * to it. This means that all pagetable updates have to go via the
1179 * hypervisor, which is moderately expensive.
1181 * Since we're pulling the pagetable down, we switch to use init_mm,
1182 * unpin old process pagetable and mark it all read-write, which
1183 * allows further operations on it to be simple memory accesses.
1185 * The only subtle point is that another CPU may be still using the
1186 * pagetable because of lazy tlb flushing. This means we need need to
1187 * switch all CPUs off this pagetable before we can unpin it.
1189 void xen_exit_mmap(struct mm_struct *mm)
1191 get_cpu(); /* make sure we don't move around */
1192 xen_drop_mm_ref(mm);
1195 spin_lock(&mm->page_table_lock);
1197 /* pgd may not be pinned in the error exit path of execve */
1198 if (xen_page_pinned(mm->pgd))
1201 spin_unlock(&mm->page_table_lock);
1204 static __init void xen_pagetable_setup_start(pgd_t *base)
1208 static __init void xen_pagetable_setup_done(pgd_t *base)
1210 xen_setup_shared_info();
1213 static void xen_write_cr2(unsigned long cr2)
1215 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1218 static unsigned long xen_read_cr2(void)
1220 return percpu_read(xen_vcpu)->arch.cr2;
1223 unsigned long xen_read_cr2_direct(void)
1225 return percpu_read(xen_vcpu_info.arch.cr2);
1228 static void xen_flush_tlb(void)
1230 struct mmuext_op *op;
1231 struct multicall_space mcs;
1235 mcs = xen_mc_entry(sizeof(*op));
1238 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1239 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1241 xen_mc_issue(PARAVIRT_LAZY_MMU);
1246 static void xen_flush_tlb_single(unsigned long addr)
1248 struct mmuext_op *op;
1249 struct multicall_space mcs;
1253 mcs = xen_mc_entry(sizeof(*op));
1255 op->cmd = MMUEXT_INVLPG_LOCAL;
1256 op->arg1.linear_addr = addr & PAGE_MASK;
1257 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1259 xen_mc_issue(PARAVIRT_LAZY_MMU);
1264 static void xen_flush_tlb_others(const struct cpumask *cpus,
1265 struct mm_struct *mm, unsigned long va)
1268 struct mmuext_op op;
1269 DECLARE_BITMAP(mask, NR_CPUS);
1271 struct multicall_space mcs;
1273 BUG_ON(cpumask_empty(cpus));
1276 mcs = xen_mc_entry(sizeof(*args));
1278 args->op.arg2.vcpumask = to_cpumask(args->mask);
1280 /* Remove us, and any offline CPUS. */
1281 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1282 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1284 if (va == TLB_FLUSH_ALL) {
1285 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1287 args->op.cmd = MMUEXT_INVLPG_MULTI;
1288 args->op.arg1.linear_addr = va;
1291 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1293 xen_mc_issue(PARAVIRT_LAZY_MMU);
1296 static unsigned long xen_read_cr3(void)
1298 return percpu_read(xen_cr3);
1301 static void set_current_cr3(void *v)
1303 percpu_write(xen_current_cr3, (unsigned long)v);
1306 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1308 struct mmuext_op *op;
1309 struct multicall_space mcs;
1313 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1317 WARN_ON(mfn == 0 && kernel);
1319 mcs = __xen_mc_entry(sizeof(*op));
1322 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1325 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1328 percpu_write(xen_cr3, cr3);
1330 /* Update xen_current_cr3 once the batch has actually
1332 xen_mc_callback(set_current_cr3, (void *)cr3);
1336 static void xen_write_cr3(unsigned long cr3)
1338 BUG_ON(preemptible());
1340 xen_mc_batch(); /* disables interrupts */
1342 /* Update while interrupts are disabled, so its atomic with
1344 percpu_write(xen_cr3, cr3);
1346 __xen_write_cr3(true, cr3);
1348 #ifdef CONFIG_X86_64
1350 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1352 __xen_write_cr3(false, __pa(user_pgd));
1354 __xen_write_cr3(false, 0);
1358 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1361 static int xen_pgd_alloc(struct mm_struct *mm)
1363 pgd_t *pgd = mm->pgd;
1366 BUG_ON(PagePinned(virt_to_page(pgd)));
1368 #ifdef CONFIG_X86_64
1370 struct page *page = virt_to_page(pgd);
1373 BUG_ON(page->private != 0);
1377 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1378 page->private = (unsigned long)user_pgd;
1380 if (user_pgd != NULL) {
1381 user_pgd[pgd_index(VSYSCALL_START)] =
1382 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1386 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1393 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1395 #ifdef CONFIG_X86_64
1396 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1399 free_page((unsigned long)user_pgd);
1403 #ifdef CONFIG_HIGHPTE
1404 static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1406 pgprot_t prot = PAGE_KERNEL;
1408 if (PagePinned(page))
1409 prot = PAGE_KERNEL_RO;
1411 if (0 && PageHighMem(page))
1412 printk("mapping highpte %lx type %d prot %s\n",
1413 page_to_pfn(page), type,
1414 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1416 return kmap_atomic_prot(page, type, prot);
1420 #ifdef CONFIG_X86_32
1421 static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1423 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1424 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1425 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1431 /* Init-time set_pte while constructing initial pagetables, which
1432 doesn't allow RO pagetable pages to be remapped RW */
1433 static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1435 pte = mask_rw_pte(ptep, pte);
1437 xen_set_pte(ptep, pte);
1441 /* Early in boot, while setting up the initial pagetable, assume
1442 everything is pinned. */
1443 static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1445 #ifdef CONFIG_FLATMEM
1446 BUG_ON(mem_map); /* should only be used early */
1448 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1451 /* Early release_pte assumes that all pts are pinned, since there's
1452 only init_mm and anything attached to that is pinned. */
1453 static void xen_release_pte_init(unsigned long pfn)
1455 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1458 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1460 struct mmuext_op op;
1462 op.arg1.mfn = pfn_to_mfn(pfn);
1463 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1467 /* This needs to make sure the new pte page is pinned iff its being
1468 attached to a pinned pagetable. */
1469 static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1471 struct page *page = pfn_to_page(pfn);
1473 if (PagePinned(virt_to_page(mm->pgd))) {
1474 SetPagePinned(page);
1477 if (!PageHighMem(page)) {
1478 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1479 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1480 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1482 /* make sure there are no stray mappings of
1484 kmap_flush_unused();
1489 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1491 xen_alloc_ptpage(mm, pfn, PT_PTE);
1494 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1496 xen_alloc_ptpage(mm, pfn, PT_PMD);
1499 /* This should never happen until we're OK to use struct page */
1500 static void xen_release_ptpage(unsigned long pfn, unsigned level)
1502 struct page *page = pfn_to_page(pfn);
1504 if (PagePinned(page)) {
1505 if (!PageHighMem(page)) {
1506 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1507 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1508 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1510 ClearPagePinned(page);
1514 static void xen_release_pte(unsigned long pfn)
1516 xen_release_ptpage(pfn, PT_PTE);
1519 static void xen_release_pmd(unsigned long pfn)
1521 xen_release_ptpage(pfn, PT_PMD);
1524 #if PAGETABLE_LEVELS == 4
1525 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1527 xen_alloc_ptpage(mm, pfn, PT_PUD);
1530 static void xen_release_pud(unsigned long pfn)
1532 xen_release_ptpage(pfn, PT_PUD);
1536 void __init xen_reserve_top(void)
1538 #ifdef CONFIG_X86_32
1539 unsigned long top = HYPERVISOR_VIRT_START;
1540 struct xen_platform_parameters pp;
1542 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1543 top = pp.virt_start;
1545 reserve_top_address(-top);
1546 #endif /* CONFIG_X86_32 */
1550 * Like __va(), but returns address in the kernel mapping (which is
1551 * all we have until the physical memory mapping has been set up.
1553 static void *__ka(phys_addr_t paddr)
1555 #ifdef CONFIG_X86_64
1556 return (void *)(paddr + __START_KERNEL_map);
1562 /* Convert a machine address to physical address */
1563 static unsigned long m2p(phys_addr_t maddr)
1567 maddr &= PTE_PFN_MASK;
1568 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1573 /* Convert a machine address to kernel virtual */
1574 static void *m2v(phys_addr_t maddr)
1576 return __ka(m2p(maddr));
1579 static void set_page_prot(void *addr, pgprot_t prot)
1581 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1582 pte_t pte = pfn_pte(pfn, prot);
1584 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1588 static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1590 unsigned pmdidx, pteidx;
1596 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1599 /* Reuse or allocate a page of ptes */
1600 if (pmd_present(pmd[pmdidx]))
1601 pte_page = m2v(pmd[pmdidx].pmd);
1603 /* Check for free pte pages */
1604 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1607 pte_page = &level1_ident_pgt[ident_pte];
1608 ident_pte += PTRS_PER_PTE;
1610 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1613 /* Install mappings */
1614 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1617 if (pfn > max_pfn_mapped)
1618 max_pfn_mapped = pfn;
1620 if (!pte_none(pte_page[pteidx]))
1623 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1624 pte_page[pteidx] = pte;
1628 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1629 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1631 set_page_prot(pmd, PAGE_KERNEL_RO);
1634 #ifdef CONFIG_X86_64
1635 static void convert_pfn_mfn(void *v)
1640 /* All levels are converted the same way, so just treat them
1642 for (i = 0; i < PTRS_PER_PTE; i++)
1643 pte[i] = xen_make_pte(pte[i].pte);
1647 * Set up the inital kernel pagetable.
1649 * We can construct this by grafting the Xen provided pagetable into
1650 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1651 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1652 * means that only the kernel has a physical mapping to start with -
1653 * but that's enough to get __va working. We need to fill in the rest
1654 * of the physical mapping once some sort of allocator has been set
1657 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1658 unsigned long max_pfn)
1663 /* Zap identity mapping */
1664 init_level4_pgt[0] = __pgd(0);
1666 /* Pre-constructed entries are in pfn, so convert to mfn */
1667 convert_pfn_mfn(init_level4_pgt);
1668 convert_pfn_mfn(level3_ident_pgt);
1669 convert_pfn_mfn(level3_kernel_pgt);
1671 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1672 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1674 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1675 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1677 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1678 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1679 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1681 /* Set up identity map */
1682 xen_map_identity_early(level2_ident_pgt, max_pfn);
1684 /* Make pagetable pieces RO */
1685 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1686 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1687 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1688 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1689 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1690 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1692 /* Pin down new L4 */
1693 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1694 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1696 /* Unpin Xen-provided one */
1697 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1700 pgd = init_level4_pgt;
1703 * At this stage there can be no user pgd, and no page
1704 * structure to attach it to, so make sure we just set kernel
1708 __xen_write_cr3(true, __pa(pgd));
1709 xen_mc_issue(PARAVIRT_LAZY_CPU);
1711 reserve_early(__pa(xen_start_info->pt_base),
1712 __pa(xen_start_info->pt_base +
1713 xen_start_info->nr_pt_frames * PAGE_SIZE),
1718 #else /* !CONFIG_X86_64 */
1719 static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1721 __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1722 unsigned long max_pfn)
1726 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1727 xen_start_info->nr_pt_frames * PAGE_SIZE +
1730 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1731 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1733 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1735 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1736 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1737 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1739 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1740 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1741 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1743 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1745 xen_write_cr3(__pa(swapper_pg_dir));
1747 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1749 return swapper_pg_dir;
1751 #endif /* CONFIG_X86_64 */
1753 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1757 phys >>= PAGE_SHIFT;
1760 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1761 #ifdef CONFIG_X86_F00F_BUG
1764 #ifdef CONFIG_X86_32
1767 # ifdef CONFIG_HIGHMEM
1768 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1771 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1773 #ifdef CONFIG_X86_LOCAL_APIC
1774 case FIX_APIC_BASE: /* maps dummy local APIC */
1776 pte = pfn_pte(phys, prot);
1780 pte = mfn_pte(phys, prot);
1784 __native_set_fixmap(idx, pte);
1786 #ifdef CONFIG_X86_64
1787 /* Replicate changes to map the vsyscall page into the user
1788 pagetable vsyscall mapping. */
1789 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1790 unsigned long vaddr = __fix_to_virt(idx);
1791 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1796 __init void xen_post_allocator_init(void)
1798 pv_mmu_ops.set_pte = xen_set_pte;
1799 pv_mmu_ops.set_pmd = xen_set_pmd;
1800 pv_mmu_ops.set_pud = xen_set_pud;
1801 #if PAGETABLE_LEVELS == 4
1802 pv_mmu_ops.set_pgd = xen_set_pgd;
1805 /* This will work as long as patching hasn't happened yet
1806 (which it hasn't) */
1807 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1808 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1809 pv_mmu_ops.release_pte = xen_release_pte;
1810 pv_mmu_ops.release_pmd = xen_release_pmd;
1811 #if PAGETABLE_LEVELS == 4
1812 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1813 pv_mmu_ops.release_pud = xen_release_pud;
1816 #ifdef CONFIG_X86_64
1817 SetPagePinned(virt_to_page(level3_user_vsyscall));
1819 xen_mark_init_mm_pinned();
1823 const struct pv_mmu_ops xen_mmu_ops __initdata = {
1824 .pagetable_setup_start = xen_pagetable_setup_start,
1825 .pagetable_setup_done = xen_pagetable_setup_done,
1827 .read_cr2 = xen_read_cr2,
1828 .write_cr2 = xen_write_cr2,
1830 .read_cr3 = xen_read_cr3,
1831 .write_cr3 = xen_write_cr3,
1833 .flush_tlb_user = xen_flush_tlb,
1834 .flush_tlb_kernel = xen_flush_tlb,
1835 .flush_tlb_single = xen_flush_tlb_single,
1836 .flush_tlb_others = xen_flush_tlb_others,
1838 .pte_update = paravirt_nop,
1839 .pte_update_defer = paravirt_nop,
1841 .pgd_alloc = xen_pgd_alloc,
1842 .pgd_free = xen_pgd_free,
1844 .alloc_pte = xen_alloc_pte_init,
1845 .release_pte = xen_release_pte_init,
1846 .alloc_pmd = xen_alloc_pte_init,
1847 .alloc_pmd_clone = paravirt_nop,
1848 .release_pmd = xen_release_pte_init,
1850 #ifdef CONFIG_HIGHPTE
1851 .kmap_atomic_pte = xen_kmap_atomic_pte,
1854 #ifdef CONFIG_X86_64
1855 .set_pte = xen_set_pte,
1857 .set_pte = xen_set_pte_init,
1859 .set_pte_at = xen_set_pte_at,
1860 .set_pmd = xen_set_pmd_hyper,
1862 .ptep_modify_prot_start = __ptep_modify_prot_start,
1863 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1865 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1866 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
1868 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1869 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
1871 #ifdef CONFIG_X86_PAE
1872 .set_pte_atomic = xen_set_pte_atomic,
1873 .pte_clear = xen_pte_clear,
1874 .pmd_clear = xen_pmd_clear,
1875 #endif /* CONFIG_X86_PAE */
1876 .set_pud = xen_set_pud_hyper,
1878 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1879 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
1881 #if PAGETABLE_LEVELS == 4
1882 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1883 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1884 .set_pgd = xen_set_pgd_hyper,
1886 .alloc_pud = xen_alloc_pte_init,
1887 .release_pud = xen_release_pte_init,
1888 #endif /* PAGETABLE_LEVELS == 4 */
1890 .activate_mm = xen_activate_mm,
1891 .dup_mmap = xen_dup_mmap,
1892 .exit_mmap = xen_exit_mmap,
1895 .enter = paravirt_enter_lazy_mmu,
1896 .leave = xen_leave_lazy,
1899 .set_fixmap = xen_set_fixmap,
1903 #ifdef CONFIG_XEN_DEBUG_FS
1905 static struct dentry *d_mmu_debug;
1907 static int __init xen_mmu_debugfs(void)
1909 struct dentry *d_xen = xen_init_debugfs();
1914 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1916 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1918 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1919 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1920 &mmu_stats.pgd_update_pinned);
1921 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1922 &mmu_stats.pgd_update_pinned);
1924 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1925 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1926 &mmu_stats.pud_update_pinned);
1927 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1928 &mmu_stats.pud_update_pinned);
1930 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1931 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1932 &mmu_stats.pmd_update_pinned);
1933 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1934 &mmu_stats.pmd_update_pinned);
1936 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1937 // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1938 // &mmu_stats.pte_update_pinned);
1939 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1940 &mmu_stats.pte_update_pinned);
1942 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1943 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1944 &mmu_stats.mmu_update_extended);
1945 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
1946 mmu_stats.mmu_update_histo, 20);
1948 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
1949 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
1950 &mmu_stats.set_pte_at_batched);
1951 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
1952 &mmu_stats.set_pte_at_current);
1953 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
1954 &mmu_stats.set_pte_at_kernel);
1956 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
1957 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
1958 &mmu_stats.prot_commit_batched);
1962 fs_initcall(xen_mmu_debugfs);
1964 #endif /* CONFIG_XEN_DEBUG_FS */