Merge branches 'release' and 'hp-cid' into release
[linux-2.6] / arch / sh / drivers / pci / fixups-sdk7780.c
1 /*
2  * arch/sh/drivers/pci/fixups-sdk7780.c
3  *
4  * PCI fixups for the SDK7780SE03
5  *
6  * Copyright (C) 2003  Lineo uSolutions, Inc.
7  * Copyright (C) 2004 - 2006  Paul Mundt
8  *
9  * This file is subject to the terms and conditions of the GNU General Public
10  * License.  See the file "COPYING" in the main directory of this archive
11  * for more details.
12  */
13 #include <linux/pci.h>
14 #include "pci-sh4.h"
15 #include <asm/io.h>
16
17 int pci_fixup_pcic(void)
18 {
19         ctrl_outl(0x00000001, SH7780_PCI_VCR2);
20
21         /* Enable all interrupts, so we know what to fix */
22         pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
23         pci_write_reg(0x0000380F, SH7780_PCIAINTM);
24
25         /* Set up standard PCI config registers */
26         pci_write_reg(0xFB00, SH7780_PCISTATUS);
27         pci_write_reg(0x0047, SH7780_PCICMD);
28         pci_write_reg(0x00, SH7780_PCIPIF);
29         pci_write_reg(0x00, SH7780_PCISUB);
30         pci_write_reg(0x06, SH7780_PCIBCC);
31         pci_write_reg(0x1912, SH7780_PCISVID);
32         pci_write_reg(0x0001, SH7780_PCISID);
33
34         pci_write_reg(0x08000000, SH7780_PCIMBAR0);     /* PCI */
35         pci_write_reg(0x08000000, SH7780_PCILAR0);      /* SHwy */
36         pci_write_reg(0x07F00001, SH7780_PCILSR);       /* size 128M w/ MBAR */
37
38         pci_write_reg(0x00000000, SH7780_PCIMBAR1);
39         pci_write_reg(0x00000000, SH7780_PCILAR1);
40         pci_write_reg(0x00000000, SH7780_PCILSR1);
41
42         pci_write_reg(0xAB000801, SH7780_PCIIBAR);
43
44         /*
45          * Set the MBR so PCI address is one-to-one with window,
46          * meaning all calls go straight through... use ifdef to
47          * catch erroneous assumption.
48          */
49         pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
50         pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0);    /* 16M */
51
52         /* Set IOBR for window containing area specified in pci.h */
53         pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
54         pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
55
56         pci_write_reg(0xA5000C01, SH7780_PCICR);
57
58         return 0;
59 }