3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
38 #include <linux/config.h>
39 #include <linux/module.h>
40 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/string.h>
43 #include <linux/timer.h>
44 #include <linux/errno.h>
46 #include <linux/ioport.h>
47 #include <linux/bitops.h>
48 #include <linux/slab.h>
49 #include <linux/interrupt.h>
50 #include <linux/pci.h>
51 #include <linux/init.h>
52 #include <linux/netdevice.h>
53 #include <linux/etherdevice.h>
54 #include <linux/ethtool.h>
55 #include <linux/mii.h>
56 #include <linux/skbuff.h>
57 #include <linux/delay.h>
58 #include <linux/crc32.h>
59 #include <linux/phy.h>
60 #include <asm/mipsregs.h>
63 #include <asm/processor.h>
65 #include <asm/mach-au1x00/au1000.h>
67 #include "au1000_eth.h"
69 #ifdef AU1000_ETH_DEBUG
70 static int au1000_debug = 5;
72 static int au1000_debug = 3;
75 #define DRV_NAME "au1000_eth"
76 #define DRV_VERSION "1.5"
77 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
78 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
80 MODULE_AUTHOR(DRV_AUTHOR);
81 MODULE_DESCRIPTION(DRV_DESC);
82 MODULE_LICENSE("GPL");
85 static void hard_stop(struct net_device *);
86 static void enable_rx_tx(struct net_device *dev);
87 static struct net_device * au1000_probe(int port_num);
88 static int au1000_init(struct net_device *);
89 static int au1000_open(struct net_device *);
90 static int au1000_close(struct net_device *);
91 static int au1000_tx(struct sk_buff *, struct net_device *);
92 static int au1000_rx(struct net_device *);
93 static irqreturn_t au1000_interrupt(int, void *, struct pt_regs *);
94 static void au1000_tx_timeout(struct net_device *);
95 static void set_rx_mode(struct net_device *);
96 static struct net_device_stats *au1000_get_stats(struct net_device *);
97 static int au1000_ioctl(struct net_device *, struct ifreq *, int);
98 static int mdio_read(struct net_device *, int, int);
99 static void mdio_write(struct net_device *, int, int, u16);
100 static void au1000_adjust_link(struct net_device *);
101 static void enable_mac(struct net_device *, int);
104 extern int get_ethernet_addr(char *ethernet_addr);
105 extern void str2eaddr(unsigned char *ea, unsigned char *str);
106 extern char * __init prom_getcmdline(void);
109 * Theory of operation
111 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
112 * There are four receive and four transmit descriptors. These
113 * descriptors are not in memory; rather, they are just a set of
114 * hardware registers.
116 * Since the Au1000 has a coherent data cache, the receive and
117 * transmit buffers are allocated from the KSEG0 segment. The
118 * hardware registers, however, are still mapped at KSEG1 to
119 * make sure there's no out-of-order writes, and that all writes
120 * complete immediately.
123 /* These addresses are only used if yamon doesn't tell us what
124 * the mac address is, and the mac address is not passed on the
127 static unsigned char au1000_mac_addr[6] __devinitdata = {
128 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
131 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
134 * board-specific configurations
136 * PHY detection algorithm
138 * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
141 * mii_probe() first searches the current MAC's MII bus for a PHY,
142 * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
143 * defined) PHY address not already claimed by another netdev.
145 * If nothing was found that way when searching for the 2nd ethernet
146 * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
147 * the first MII bus is searched as well for an unclaimed PHY; this is
148 * needed in case of a dual-PHY accessible only through the MAC0's MII
151 * Finally, if no PHY is found, then the corresponding ethernet
152 * controller is not registered to the network subsystem.
155 /* autodetection defaults */
156 #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
157 #define AU1XXX_PHY1_SEARCH_ON_MAC0
161 * most boards PHY setup should be detectable properly with the
162 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
163 * you have a switch attached, or want to use the PHY's interrupt
164 * notification capabilities) you can provide a static PHY
167 * IRQs may only be set, if a PHY address was configured
168 * If a PHY address is given, also a bus id is required to be set
170 * ps: make sure the used irqs are configured properly in the board
174 #if defined(CONFIG_MIPS_BOSPORUS)
176 * Micrel/Kendin 5 port switch attached to MAC0,
177 * MAC0 is associated with PHY address 5 (== WAN port)
178 * MAC1 is not associated with any PHY, since it's connected directly
180 * no interrupts are used
182 # define AU1XXX_PHY_STATIC_CONFIG
184 # define AU1XXX_PHY0_ADDR 5
185 # define AU1XXX_PHY0_BUSID 0
186 # undef AU1XXX_PHY0_IRQ
188 # undef AU1XXX_PHY1_ADDR
189 # undef AU1XXX_PHY1_BUSID
190 # undef AU1XXX_PHY1_IRQ
193 #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
194 # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
200 static int mdio_read(struct net_device *dev, int phy_addr, int reg)
202 struct au1000_private *aup = (struct au1000_private *) dev->priv;
203 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
204 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
208 while (*mii_control_reg & MAC_MII_BUSY) {
210 if (--timedout == 0) {
211 printk(KERN_ERR "%s: read_MII busy timeout!!\n",
217 mii_control = MAC_SET_MII_SELECT_REG(reg) |
218 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
220 *mii_control_reg = mii_control;
223 while (*mii_control_reg & MAC_MII_BUSY) {
225 if (--timedout == 0) {
226 printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
231 return (int)*mii_data_reg;
234 static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
236 struct au1000_private *aup = (struct au1000_private *) dev->priv;
237 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
238 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
242 while (*mii_control_reg & MAC_MII_BUSY) {
244 if (--timedout == 0) {
245 printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
251 mii_control = MAC_SET_MII_SELECT_REG(reg) |
252 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
254 *mii_data_reg = value;
255 *mii_control_reg = mii_control;
258 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
260 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
261 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
262 struct net_device *const dev = bus->priv;
264 enable_mac(dev, 0); /* make sure the MAC associated with this
265 * mii_bus is enabled */
266 return mdio_read(dev, phy_addr, regnum);
269 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
272 struct net_device *const dev = bus->priv;
274 enable_mac(dev, 0); /* make sure the MAC associated with this
275 * mii_bus is enabled */
276 mdio_write(dev, phy_addr, regnum, value);
280 static int mdiobus_reset(struct mii_bus *bus)
282 struct net_device *const dev = bus->priv;
284 enable_mac(dev, 0); /* make sure the MAC associated with this
285 * mii_bus is enabled */
289 static int mii_probe (struct net_device *dev)
291 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
292 struct phy_device *phydev = NULL;
294 #if defined(AU1XXX_PHY_STATIC_CONFIG)
295 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
297 if(aup->mac_id == 0) { /* get PHY0 */
298 # if defined(AU1XXX_PHY0_ADDR)
299 phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
301 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
304 # endif /* defined(AU1XXX_PHY0_ADDR) */
305 } else if (aup->mac_id == 1) { /* get PHY1 */
306 # if defined(AU1XXX_PHY1_ADDR)
307 phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
309 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
312 # endif /* defined(AU1XXX_PHY1_ADDR) */
315 #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
318 /* find the first (lowest address) PHY on the current MAC's MII bus */
319 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
320 if (aup->mii_bus.phy_map[phy_addr]) {
321 phydev = aup->mii_bus.phy_map[phy_addr];
322 # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
323 break; /* break out with first one found */
327 # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
328 /* try harder to find a PHY */
329 if (!phydev && (aup->mac_id == 1)) {
330 /* no PHY found, maybe we have a dual PHY? */
331 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
332 "let's see if it's attached to MAC0...\n");
336 /* find the first (lowest address) non-attached PHY on
337 * the MAC0 MII bus */
338 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
339 struct phy_device *const tmp_phydev =
340 au_macs[0]->mii_bus.phy_map[phy_addr];
343 continue; /* no PHY here... */
345 if (tmp_phydev->attached_dev)
346 continue; /* already claimed by MAC0 */
349 break; /* found it */
352 # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
354 #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
356 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
360 /* now we are supposed to have a proper phydev, to attach to... */
362 BUG_ON(phydev->attached_dev);
364 phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0);
366 if (IS_ERR(phydev)) {
367 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
368 return PTR_ERR(phydev);
371 /* mask with MAC supported features */
372 phydev->supported &= (SUPPORTED_10baseT_Half
373 | SUPPORTED_10baseT_Full
374 | SUPPORTED_100baseT_Half
375 | SUPPORTED_100baseT_Full
377 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
381 phydev->advertising = phydev->supported;
385 aup->old_duplex = -1;
386 aup->phy_dev = phydev;
388 printk(KERN_INFO "%s: attached PHY driver [%s] "
389 "(mii_bus:phy_addr=%s, irq=%d)\n",
390 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
397 * Buffer allocation/deallocation routines. The buffer descriptor returned
398 * has the virtual and dma address of a buffer suitable for
399 * both, receive and transmit operations.
401 static db_dest_t *GetFreeDB(struct au1000_private *aup)
407 aup->pDBfree = pDB->pnext;
412 void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
414 db_dest_t *pDBfree = aup->pDBfree;
416 pDBfree->pnext = pDB;
420 static void enable_rx_tx(struct net_device *dev)
422 struct au1000_private *aup = (struct au1000_private *) dev->priv;
424 if (au1000_debug > 4)
425 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
427 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
431 static void hard_stop(struct net_device *dev)
433 struct au1000_private *aup = (struct au1000_private *) dev->priv;
435 if (au1000_debug > 4)
436 printk(KERN_INFO "%s: hard stop\n", dev->name);
438 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
442 static void enable_mac(struct net_device *dev, int force_reset)
445 struct au1000_private *aup = (struct au1000_private *) dev->priv;
447 spin_lock_irqsave(&aup->lock, flags);
449 if(force_reset || (!aup->mac_enabled)) {
450 *aup->enable = MAC_EN_CLOCK_ENABLE;
452 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
453 | MAC_EN_CLOCK_ENABLE);
456 aup->mac_enabled = 1;
459 spin_unlock_irqrestore(&aup->lock, flags);
462 static void reset_mac_unlocked(struct net_device *dev)
464 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
469 *aup->enable = MAC_EN_CLOCK_ENABLE;
475 for (i = 0; i < NUM_RX_DMA; i++) {
476 /* reset control bits */
477 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
479 for (i = 0; i < NUM_TX_DMA; i++) {
480 /* reset control bits */
481 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
484 aup->mac_enabled = 0;
488 static void reset_mac(struct net_device *dev)
490 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
493 if (au1000_debug > 4)
494 printk(KERN_INFO "%s: reset mac, aup %x\n",
495 dev->name, (unsigned)aup);
497 spin_lock_irqsave(&aup->lock, flags);
499 reset_mac_unlocked (dev);
501 spin_unlock_irqrestore(&aup->lock, flags);
505 * Setup the receive and transmit "rings". These pointers are the addresses
506 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
507 * these are not descriptors sitting in memory.
510 setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
514 for (i = 0; i < NUM_RX_DMA; i++) {
515 aup->rx_dma_ring[i] =
516 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
518 for (i = 0; i < NUM_TX_DMA; i++) {
519 aup->tx_dma_ring[i] =
520 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
528 struct net_device *dev;
530 #ifdef CONFIG_SOC_AU1000
531 {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
532 {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
534 #ifdef CONFIG_SOC_AU1100
535 {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
537 #ifdef CONFIG_SOC_AU1500
538 {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
539 {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
541 #ifdef CONFIG_SOC_AU1550
542 {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
543 {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
550 * Setup the base address and interupt of the Au1xxx ethernet macs
551 * based on cpu type and whether the interface is enabled in sys_pinfunc
552 * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
554 static int __init au1000_init_module(void)
556 int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
557 struct net_device *dev;
558 int i, found_one = 0;
560 num_ifs = NUM_ETH_INTERFACES - ni;
562 for(i = 0; i < num_ifs; i++) {
563 dev = au1000_probe(i);
577 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
579 struct au1000_private *aup = (struct au1000_private *)dev->priv;
582 return phy_ethtool_gset(aup->phy_dev, cmd);
587 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
589 struct au1000_private *aup = (struct au1000_private *)dev->priv;
591 if (!capable(CAP_NET_ADMIN))
595 return phy_ethtool_sset(aup->phy_dev, cmd);
601 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
603 struct au1000_private *aup = (struct au1000_private *)dev->priv;
605 strcpy(info->driver, DRV_NAME);
606 strcpy(info->version, DRV_VERSION);
607 info->fw_version[0] = '\0';
608 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
609 info->regdump_len = 0;
612 static struct ethtool_ops au1000_ethtool_ops = {
613 .get_settings = au1000_get_settings,
614 .set_settings = au1000_set_settings,
615 .get_drvinfo = au1000_get_drvinfo,
616 .get_link = ethtool_op_get_link,
619 static struct net_device * au1000_probe(int port_num)
621 static unsigned version_printed = 0;
622 struct au1000_private *aup = NULL;
623 struct net_device *dev = NULL;
624 db_dest_t *pDB, *pDBfree;
630 if (port_num >= NUM_ETH_INTERFACES)
633 base = CPHYSADDR(iflist[port_num].base_addr );
634 macen = CPHYSADDR(iflist[port_num].macen_addr);
635 irq = iflist[port_num].irq;
637 if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
638 !request_mem_region(macen, 4, "Au1x00 ENET"))
641 if (version_printed++ == 0)
642 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
644 dev = alloc_etherdev(sizeof(struct au1000_private));
646 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
650 if ((err = register_netdev(dev)) != 0) {
651 printk(KERN_ERR "%s: Cannot register net device, error %d\n",
657 printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
658 dev->name, base, irq);
662 /* Allocate the data buffers */
663 /* Snooping works fine with eth on all au1xxx */
664 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
665 (NUM_TX_BUFFS + NUM_RX_BUFFS),
669 release_mem_region( base, MAC_IOSIZE);
670 release_mem_region(macen, 4);
674 /* aup->mac is the base address of the MAC's registers */
675 aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
677 /* Setup some variables for quick register address access */
678 aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
679 aup->mac_id = port_num;
680 au_macs[port_num] = aup;
683 /* Check the environment variables first */
684 if (get_ethernet_addr(ethaddr) == 0)
685 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
687 /* Check command line */
688 argptr = prom_getcmdline();
689 if ((pmac = strstr(argptr, "ethaddr=")) == NULL)
690 printk(KERN_INFO "%s: No MAC address found\n",
692 /* Use the hard coded MAC addresses */
694 str2eaddr(ethaddr, pmac + strlen("ethaddr="));
695 memcpy(au1000_mac_addr, ethaddr,
696 sizeof(au1000_mac_addr));
700 setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
701 } else if (port_num == 1)
702 setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
705 * Assign to the Ethernet ports two consecutive MAC addresses
706 * to match those that are printed on their stickers
708 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
709 dev->dev_addr[5] += port_num;
712 aup->mac_enabled = 0;
714 aup->mii_bus.priv = dev;
715 aup->mii_bus.read = mdiobus_read;
716 aup->mii_bus.write = mdiobus_write;
717 aup->mii_bus.reset = mdiobus_reset;
718 aup->mii_bus.name = "au1000_eth_mii";
719 aup->mii_bus.id = aup->mac_id;
720 aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
721 for(i = 0; i < PHY_MAX_ADDR; ++i)
722 aup->mii_bus.irq[i] = PHY_POLL;
724 /* if known, set corresponding PHY IRQs */
725 #if defined(AU1XXX_PHY_STATIC_CONFIG)
726 # if defined(AU1XXX_PHY0_IRQ)
727 if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
728 aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
730 # if defined(AU1XXX_PHY1_IRQ)
731 if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
732 aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
735 mdiobus_register(&aup->mii_bus);
737 if (mii_probe(dev) != 0) {
742 /* setup the data buffer descriptors and attach a buffer to each one */
744 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
745 pDB->pnext = pDBfree;
747 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
748 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
751 aup->pDBfree = pDBfree;
753 for (i = 0; i < NUM_RX_DMA; i++) {
754 pDB = GetFreeDB(aup);
758 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
759 aup->rx_db_inuse[i] = pDB;
761 for (i = 0; i < NUM_TX_DMA; i++) {
762 pDB = GetFreeDB(aup);
766 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
767 aup->tx_dma_ring[i]->len = 0;
768 aup->tx_db_inuse[i] = pDB;
771 spin_lock_init(&aup->lock);
772 dev->base_addr = base;
774 dev->open = au1000_open;
775 dev->hard_start_xmit = au1000_tx;
776 dev->stop = au1000_close;
777 dev->get_stats = au1000_get_stats;
778 dev->set_multicast_list = &set_rx_mode;
779 dev->do_ioctl = &au1000_ioctl;
780 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
781 dev->tx_timeout = au1000_tx_timeout;
782 dev->watchdog_timeo = ETH_TX_TIMEOUT;
785 * The boot code uses the ethernet controller, so reset it to start
786 * fresh. au1000_init() expects that the device is in reset state.
793 /* here we should have a valid dev plus aup-> register addresses
794 * so we can reset the mac properly.*/
797 for (i = 0; i < NUM_RX_DMA; i++) {
798 if (aup->rx_db_inuse[i])
799 ReleaseDB(aup, aup->rx_db_inuse[i]);
801 for (i = 0; i < NUM_TX_DMA; i++) {
802 if (aup->tx_db_inuse[i])
803 ReleaseDB(aup, aup->tx_db_inuse[i]);
805 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
806 (void *)aup->vaddr, aup->dma_addr);
807 unregister_netdev(dev);
809 release_mem_region( base, MAC_IOSIZE);
810 release_mem_region(macen, 4);
815 * Initialize the interface.
817 * When the device powers up, the clocks are disabled and the
818 * mac is in reset state. When the interface is closed, we
819 * do the same -- reset the device and disable the clocks to
820 * conserve power. Thus, whenever au1000_init() is called,
821 * the device should already be in reset state.
823 static int au1000_init(struct net_device *dev)
825 struct au1000_private *aup = (struct au1000_private *) dev->priv;
830 if (au1000_debug > 4)
831 printk("%s: au1000_init\n", dev->name);
833 /* bring the device out of reset */
836 spin_lock_irqsave(&aup->lock, flags);
838 aup->mac->control = 0;
839 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
840 aup->tx_tail = aup->tx_head;
841 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
843 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
844 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
845 dev->dev_addr[1]<<8 | dev->dev_addr[0];
847 for (i = 0; i < NUM_RX_DMA; i++) {
848 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
852 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
853 #ifndef CONFIG_CPU_LITTLE_ENDIAN
854 control |= MAC_BIG_ENDIAN;
857 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
858 control |= MAC_FULL_DUPLEX;
860 control |= MAC_DISABLE_RX_OWN;
861 } else { /* PHY-less op, assume full-duplex */
862 control |= MAC_FULL_DUPLEX;
865 aup->mac->control = control;
866 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
869 spin_unlock_irqrestore(&aup->lock, flags);
874 au1000_adjust_link(struct net_device *dev)
876 struct au1000_private *aup = (struct au1000_private *) dev->priv;
877 struct phy_device *phydev = aup->phy_dev;
880 int status_change = 0;
882 BUG_ON(!aup->phy_dev);
884 spin_lock_irqsave(&aup->lock, flags);
886 if (phydev->link && (aup->old_speed != phydev->speed)) {
889 switch(phydev->speed) {
895 "%s: Speed (%d) is not 10/100 ???\n",
896 dev->name, phydev->speed);
900 aup->old_speed = phydev->speed;
905 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
906 // duplex mode changed
908 /* switching duplex mode requires to disable rx and tx! */
911 if (DUPLEX_FULL == phydev->duplex)
912 aup->mac->control = ((aup->mac->control
914 & ~MAC_DISABLE_RX_OWN);
916 aup->mac->control = ((aup->mac->control
918 | MAC_DISABLE_RX_OWN);
922 aup->old_duplex = phydev->duplex;
927 if(phydev->link != aup->old_link) {
928 // link state changed
930 if (phydev->link) // link went up
932 else { // link went down
934 aup->old_duplex = -1;
937 aup->old_link = phydev->link;
941 spin_unlock_irqrestore(&aup->lock, flags);
945 printk(KERN_INFO "%s: link up (%d/%s)\n",
946 dev->name, phydev->speed,
947 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
949 printk(KERN_INFO "%s: link down\n", dev->name);
953 static int au1000_open(struct net_device *dev)
956 struct au1000_private *aup = (struct au1000_private *) dev->priv;
958 if (au1000_debug > 4)
959 printk("%s: open: dev=%p\n", dev->name, dev);
961 if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
963 printk(KERN_ERR "%s: unable to get IRQ %d\n",
964 dev->name, dev->irq);
968 if ((retval = au1000_init(dev))) {
969 printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
970 free_irq(dev->irq, dev);
975 /* cause the PHY state machine to schedule a link state check */
976 aup->phy_dev->state = PHY_CHANGELINK;
977 phy_start(aup->phy_dev);
980 netif_start_queue(dev);
982 if (au1000_debug > 4)
983 printk("%s: open: Initialization done.\n", dev->name);
988 static int au1000_close(struct net_device *dev)
991 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
993 if (au1000_debug > 4)
994 printk("%s: close: dev=%p\n", dev->name, dev);
997 phy_stop(aup->phy_dev);
999 spin_lock_irqsave(&aup->lock, flags);
1001 reset_mac_unlocked (dev);
1003 /* stop the device */
1004 netif_stop_queue(dev);
1006 /* disable the interrupt */
1007 free_irq(dev->irq, dev);
1008 spin_unlock_irqrestore(&aup->lock, flags);
1013 static void __exit au1000_cleanup_module(void)
1016 struct net_device *dev;
1017 struct au1000_private *aup;
1019 for (i = 0; i < num_ifs; i++) {
1020 dev = iflist[i].dev;
1022 aup = (struct au1000_private *) dev->priv;
1023 unregister_netdev(dev);
1024 for (j = 0; j < NUM_RX_DMA; j++)
1025 if (aup->rx_db_inuse[j])
1026 ReleaseDB(aup, aup->rx_db_inuse[j]);
1027 for (j = 0; j < NUM_TX_DMA; j++)
1028 if (aup->tx_db_inuse[j])
1029 ReleaseDB(aup, aup->tx_db_inuse[j]);
1030 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1031 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1032 (void *)aup->vaddr, aup->dma_addr);
1033 release_mem_region(dev->base_addr, MAC_IOSIZE);
1034 release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
1040 static void update_tx_stats(struct net_device *dev, u32 status)
1042 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1043 struct net_device_stats *ps = &aup->stats;
1045 if (status & TX_FRAME_ABORTED) {
1046 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
1047 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
1048 /* any other tx errors are only valid
1049 * in half duplex mode */
1051 ps->tx_aborted_errors++;
1056 ps->tx_aborted_errors++;
1057 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
1058 ps->tx_carrier_errors++;
1065 * Called from the interrupt service routine to acknowledge
1066 * the TX DONE bits. This is a must if the irq is setup as
1069 static void au1000_tx_ack(struct net_device *dev)
1071 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1072 volatile tx_dma_t *ptxd;
1074 ptxd = aup->tx_dma_ring[aup->tx_tail];
1076 while (ptxd->buff_stat & TX_T_DONE) {
1077 update_tx_stats(dev, ptxd->status);
1078 ptxd->buff_stat &= ~TX_T_DONE;
1082 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
1083 ptxd = aup->tx_dma_ring[aup->tx_tail];
1087 netif_wake_queue(dev);
1094 * Au1000 transmit routine.
1096 static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
1098 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1099 struct net_device_stats *ps = &aup->stats;
1100 volatile tx_dma_t *ptxd;
1105 if (au1000_debug > 5)
1106 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
1107 dev->name, (unsigned)aup, skb->len,
1108 skb->data, aup->tx_head);
1110 ptxd = aup->tx_dma_ring[aup->tx_head];
1111 buff_stat = ptxd->buff_stat;
1112 if (buff_stat & TX_DMA_ENABLE) {
1113 /* We've wrapped around and the transmitter is still busy */
1114 netif_stop_queue(dev);
1118 else if (buff_stat & TX_T_DONE) {
1119 update_tx_stats(dev, ptxd->status);
1125 netif_wake_queue(dev);
1128 pDB = aup->tx_db_inuse[aup->tx_head];
1129 memcpy((void *)pDB->vaddr, skb->data, skb->len);
1130 if (skb->len < ETH_ZLEN) {
1131 for (i=skb->len; i<ETH_ZLEN; i++) {
1132 ((char *)pDB->vaddr)[i] = 0;
1134 ptxd->len = ETH_ZLEN;
1137 ptxd->len = skb->len;
1140 ps->tx_bytes += ptxd->len;
1142 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
1145 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
1146 dev->trans_start = jiffies;
1150 static inline void update_rx_stats(struct net_device *dev, u32 status)
1152 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1153 struct net_device_stats *ps = &aup->stats;
1156 if (status & RX_MCAST_FRAME)
1159 if (status & RX_ERROR) {
1161 if (status & RX_MISSED_FRAME)
1162 ps->rx_missed_errors++;
1163 if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
1164 ps->rx_length_errors++;
1165 if (status & RX_CRC_ERROR)
1166 ps->rx_crc_errors++;
1167 if (status & RX_COLL)
1171 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
1176 * Au1000 receive routine.
1178 static int au1000_rx(struct net_device *dev)
1180 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1181 struct sk_buff *skb;
1182 volatile rx_dma_t *prxd;
1183 u32 buff_stat, status;
1187 if (au1000_debug > 5)
1188 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
1190 prxd = aup->rx_dma_ring[aup->rx_head];
1191 buff_stat = prxd->buff_stat;
1192 while (buff_stat & RX_T_DONE) {
1193 status = prxd->status;
1194 pDB = aup->rx_db_inuse[aup->rx_head];
1195 update_rx_stats(dev, status);
1196 if (!(status & RX_ERROR)) {
1199 frmlen = (status & RX_FRAME_LEN_MASK);
1200 frmlen -= 4; /* Remove FCS */
1201 skb = dev_alloc_skb(frmlen + 2);
1204 "%s: Memory squeeze, dropping packet.\n",
1206 aup->stats.rx_dropped++;
1210 skb_reserve(skb, 2); /* 16 byte IP header align */
1211 eth_copy_and_sum(skb,
1212 (unsigned char *)pDB->vaddr, frmlen, 0);
1213 skb_put(skb, frmlen);
1214 skb->protocol = eth_type_trans(skb, dev);
1215 netif_rx(skb); /* pass the packet to upper layers */
1218 if (au1000_debug > 4) {
1219 if (status & RX_MISSED_FRAME)
1220 printk("rx miss\n");
1221 if (status & RX_WDOG_TIMER)
1222 printk("rx wdog\n");
1223 if (status & RX_RUNT)
1224 printk("rx runt\n");
1225 if (status & RX_OVERLEN)
1226 printk("rx overlen\n");
1227 if (status & RX_COLL)
1228 printk("rx coll\n");
1229 if (status & RX_MII_ERROR)
1230 printk("rx mii error\n");
1231 if (status & RX_CRC_ERROR)
1232 printk("rx crc error\n");
1233 if (status & RX_LEN_ERROR)
1234 printk("rx len error\n");
1235 if (status & RX_U_CNTRL_FRAME)
1236 printk("rx u control frame\n");
1237 if (status & RX_MISSED_FRAME)
1238 printk("rx miss\n");
1241 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
1242 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
1245 /* next descriptor */
1246 prxd = aup->rx_dma_ring[aup->rx_head];
1247 buff_stat = prxd->buff_stat;
1248 dev->last_rx = jiffies;
1255 * Au1000 interrupt service routine.
1257 static irqreturn_t au1000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1259 struct net_device *dev = (struct net_device *) dev_id;
1262 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
1263 return IRQ_RETVAL(1);
1266 /* Handle RX interrupts first to minimize chance of overrun */
1270 return IRQ_RETVAL(1);
1275 * The Tx ring has been full longer than the watchdog timeout
1276 * value. The transmitter must be hung?
1278 static void au1000_tx_timeout(struct net_device *dev)
1280 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
1283 dev->trans_start = jiffies;
1284 netif_wake_queue(dev);
1287 static void set_rx_mode(struct net_device *dev)
1289 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1291 if (au1000_debug > 4)
1292 printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
1294 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1295 aup->mac->control |= MAC_PROMISCUOUS;
1296 printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name);
1297 } else if ((dev->flags & IFF_ALLMULTI) ||
1298 dev->mc_count > MULTICAST_FILTER_LIMIT) {
1299 aup->mac->control |= MAC_PASS_ALL_MULTI;
1300 aup->mac->control &= ~MAC_PROMISCUOUS;
1301 printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
1304 struct dev_mc_list *mclist;
1305 u32 mc_filter[2]; /* Multicast hash filter */
1307 mc_filter[1] = mc_filter[0] = 0;
1308 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1309 i++, mclist = mclist->next) {
1310 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
1313 aup->mac->multi_hash_high = mc_filter[1];
1314 aup->mac->multi_hash_low = mc_filter[0];
1315 aup->mac->control &= ~MAC_PROMISCUOUS;
1316 aup->mac->control |= MAC_HASH_MODE;
1320 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1322 struct au1000_private *aup = (struct au1000_private *)dev->priv;
1324 if (!netif_running(dev)) return -EINVAL;
1326 if (!aup->phy_dev) return -EINVAL; // PHY not controllable
1328 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
1331 static struct net_device_stats *au1000_get_stats(struct net_device *dev)
1333 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1335 if (au1000_debug > 4)
1336 printk("%s: au1000_get_stats: dev=%p\n", dev->name, dev);
1338 if (netif_device_present(dev)) {
1344 module_init(au1000_init_module);
1345 module_exit(au1000_cleanup_module);