2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
17 #include <linux/module.h>
18 #include <linux/vmalloc.h>
19 #include <linux/highmem.h>
20 #include <linux/profile.h>
24 #include "x86_emulate.h"
26 MODULE_AUTHOR("Qumranet");
27 MODULE_LICENSE("GPL");
29 #define IOPM_ALLOC_ORDER 2
30 #define MSRPM_ALLOC_ORDER 1
36 #define DR7_GD_MASK (1 << 13)
37 #define DR6_BD_MASK (1 << 13)
38 #define CR4_DE_MASK (1UL << 3)
40 #define SEG_TYPE_LDT 2
41 #define SEG_TYPE_BUSY_TSS16 3
43 #define KVM_EFER_LMA (1 << 10)
44 #define KVM_EFER_LME (1 << 8)
46 unsigned long iopm_base;
47 unsigned long msrpm_base;
49 struct kvm_ldttss_desc {
52 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
53 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
56 } __attribute__((packed));
61 uint64_t asid_generation;
64 struct kvm_ldttss_desc *tss_desc;
66 struct page *save_area;
69 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
71 struct svm_init_data {
76 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
78 #define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
79 #define MSRS_RANGE_SIZE 2048
80 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
82 #define MAX_INST_SIZE 15
84 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
86 struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
89 if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
92 cs_attrib = sa->cs.attrib;
94 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
95 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
98 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
100 int word_index = __ffs(vcpu->irq_summary);
101 int bit_index = __ffs(vcpu->irq_pending[word_index]);
102 int irq = word_index * BITS_PER_LONG + bit_index;
104 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
105 if (!vcpu->irq_pending[word_index])
106 clear_bit(word_index, &vcpu->irq_summary);
110 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
112 set_bit(irq, vcpu->irq_pending);
113 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
116 static inline void clgi(void)
118 asm volatile (SVM_CLGI);
121 static inline void stgi(void)
123 asm volatile (SVM_STGI);
126 static inline void invlpga(unsigned long addr, u32 asid)
128 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
131 static inline unsigned long kvm_read_cr2(void)
135 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
139 static inline void kvm_write_cr2(unsigned long val)
141 asm volatile ("mov %0, %%cr2" :: "r" (val));
144 static inline unsigned long read_dr6(void)
148 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
152 static inline void write_dr6(unsigned long val)
154 asm volatile ("mov %0, %%dr6" :: "r" (val));
157 static inline unsigned long read_dr7(void)
161 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
165 static inline void write_dr7(unsigned long val)
167 asm volatile ("mov %0, %%dr7" :: "r" (val));
170 static inline void force_new_asid(struct kvm_vcpu *vcpu)
172 vcpu->svm->asid_generation--;
175 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
177 force_new_asid(vcpu);
180 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
182 if (!(efer & KVM_EFER_LMA))
183 efer &= ~KVM_EFER_LME;
185 vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
186 vcpu->shadow_efer = efer;
189 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
191 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
192 SVM_EVTINJ_VALID_ERR |
193 SVM_EVTINJ_TYPE_EXEPT |
195 vcpu->svm->vmcb->control.event_inj_err = error_code;
198 static void inject_ud(struct kvm_vcpu *vcpu)
200 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
201 SVM_EVTINJ_TYPE_EXEPT |
205 static void inject_db(struct kvm_vcpu *vcpu)
207 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
208 SVM_EVTINJ_TYPE_EXEPT |
212 static int is_page_fault(uint32_t info)
214 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
215 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
218 static int is_external_interrupt(u32 info)
220 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
221 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
224 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
226 if (!vcpu->svm->next_rip) {
227 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
230 if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
231 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
233 vcpu->svm->vmcb->save.rip,
234 vcpu->svm->next_rip);
237 vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
238 vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
240 vcpu->interrupt_window_open = 1;
243 static int has_svm(void)
245 uint32_t eax, ebx, ecx, edx;
247 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
248 printk(KERN_INFO "has_svm: not amd\n");
252 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
253 if (eax < SVM_CPUID_FUNC) {
254 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
258 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
259 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
260 printk(KERN_DEBUG "has_svm: svm not available\n");
266 static void svm_hardware_disable(void *garbage)
268 struct svm_cpu_data *svm_data
269 = per_cpu(svm_data, raw_smp_processor_id());
274 wrmsrl(MSR_VM_HSAVE_PA, 0);
275 rdmsrl(MSR_EFER, efer);
276 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
277 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
278 __free_page(svm_data->save_area);
283 static void svm_hardware_enable(void *garbage)
286 struct svm_cpu_data *svm_data;
289 struct desc_ptr gdt_descr;
291 struct Xgt_desc_struct gdt_descr;
293 struct desc_struct *gdt;
294 int me = raw_smp_processor_id();
297 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
300 svm_data = per_cpu(svm_data, me);
303 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
308 svm_data->asid_generation = 1;
309 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
310 svm_data->next_asid = svm_data->max_asid + 1;
312 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
313 gdt = (struct desc_struct *)gdt_descr.address;
314 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
316 rdmsrl(MSR_EFER, efer);
317 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
319 wrmsrl(MSR_VM_HSAVE_PA,
320 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
323 static int svm_cpu_init(int cpu)
325 struct svm_cpu_data *svm_data;
328 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
332 svm_data->save_area = alloc_page(GFP_KERNEL);
334 if (!svm_data->save_area)
337 per_cpu(svm_data, cpu) = svm_data;
347 static int set_msr_interception(u32 *msrpm, unsigned msr,
352 for (i = 0; i < NUM_MSR_MAPS; i++) {
353 if (msr >= msrpm_ranges[i] &&
354 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
355 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
356 msrpm_ranges[i]) * 2;
358 u32 *base = msrpm + (msr_offset / 32);
359 u32 msr_shift = msr_offset % 32;
360 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
361 *base = (*base & ~(0x3 << msr_shift)) |
366 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
370 static __init int svm_hardware_setup(void)
373 struct page *iopm_pages;
374 struct page *msrpm_pages;
378 kvm_emulator_want_group7_invlpg();
380 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
384 memset(page_address(iopm_pages), 0xff,
385 PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
386 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
389 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
395 msrpm_va = page_address(msrpm_pages);
396 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
397 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
400 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
401 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
402 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
403 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
404 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
405 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
407 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
408 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
409 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
410 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
412 for_each_online_cpu(cpu) {
413 r = svm_cpu_init(cpu);
420 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
423 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
428 static __exit void svm_hardware_unsetup(void)
430 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
431 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
432 iopm_base = msrpm_base = 0;
435 static void init_seg(struct vmcb_seg *seg)
438 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
439 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
444 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
447 seg->attrib = SVM_SELECTOR_P_MASK | type;
452 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
457 static void init_vmcb(struct vmcb *vmcb)
459 struct vmcb_control_area *control = &vmcb->control;
460 struct vmcb_save_area *save = &vmcb->save;
463 control->intercept_cr_read = INTERCEPT_CR0_MASK |
467 control->intercept_cr_write = INTERCEPT_CR0_MASK |
471 control->intercept_dr_read = INTERCEPT_DR0_MASK |
476 control->intercept_dr_write = INTERCEPT_DR0_MASK |
483 control->intercept_exceptions = 1 << PF_VECTOR;
486 control->intercept = (1ULL << INTERCEPT_INTR) |
487 (1ULL << INTERCEPT_NMI) |
489 * selective cr0 intercept bug?
490 * 0: 0f 22 d8 mov %eax,%cr3
491 * 3: 0f 20 c0 mov %cr0,%eax
492 * 6: 0d 00 00 00 80 or $0x80000000,%eax
493 * b: 0f 22 c0 mov %eax,%cr0
494 * set cr3 ->interception
495 * get cr0 ->interception
496 * set cr0 -> no interception
498 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
499 (1ULL << INTERCEPT_CPUID) |
500 (1ULL << INTERCEPT_HLT) |
501 (1ULL << INTERCEPT_INVLPGA) |
502 (1ULL << INTERCEPT_IOIO_PROT) |
503 (1ULL << INTERCEPT_MSR_PROT) |
504 (1ULL << INTERCEPT_TASK_SWITCH) |
505 (1ULL << INTERCEPT_SHUTDOWN) |
506 (1ULL << INTERCEPT_VMRUN) |
507 (1ULL << INTERCEPT_VMMCALL) |
508 (1ULL << INTERCEPT_VMLOAD) |
509 (1ULL << INTERCEPT_VMSAVE) |
510 (1ULL << INTERCEPT_STGI) |
511 (1ULL << INTERCEPT_CLGI) |
512 (1ULL << INTERCEPT_SKINIT);
514 control->iopm_base_pa = iopm_base;
515 control->msrpm_base_pa = msrpm_base;
517 control->tsc_offset = -tsc;
518 control->int_ctl = V_INTR_MASKING_MASK;
526 save->cs.selector = 0xf000;
527 /* Executable/Readable Code Segment */
528 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
529 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
530 save->cs.limit = 0xffff;
532 * cs.base should really be 0xffff0000, but vmx can't handle that, so
533 * be consistent with it.
535 * Replace when we have real mode working for vmx.
537 save->cs.base = 0xf0000;
539 save->gdtr.limit = 0xffff;
540 save->idtr.limit = 0xffff;
542 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
543 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
545 save->efer = MSR_EFER_SVME_MASK;
547 save->dr6 = 0xffff0ff0;
550 save->rip = 0x0000fff0;
553 * cr0 val on cpu init should be 0x60000010, we enable cpu
554 * cache by default. the orderly way is to enable cache in bios.
556 save->cr0 = 0x00000010 | CR0_PG_MASK;
557 save->cr4 = CR4_PAE_MASK;
561 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
567 vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
570 page = alloc_page(GFP_KERNEL);
574 vcpu->svm->vmcb = page_address(page);
575 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
576 vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
577 vcpu->svm->cr0 = 0x00000010;
578 vcpu->svm->asid_generation = 0;
579 memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
580 init_vmcb(vcpu->svm->vmcb);
592 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
597 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
601 static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
607 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
612 static void svm_cache_regs(struct kvm_vcpu *vcpu)
614 vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
615 vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
616 vcpu->rip = vcpu->svm->vmcb->save.rip;
619 static void svm_decache_regs(struct kvm_vcpu *vcpu)
621 vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
622 vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
623 vcpu->svm->vmcb->save.rip = vcpu->rip;
626 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
628 return vcpu->svm->vmcb->save.rflags;
631 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
633 vcpu->svm->vmcb->save.rflags = rflags;
636 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
638 struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
641 case VCPU_SREG_CS: return &save->cs;
642 case VCPU_SREG_DS: return &save->ds;
643 case VCPU_SREG_ES: return &save->es;
644 case VCPU_SREG_FS: return &save->fs;
645 case VCPU_SREG_GS: return &save->gs;
646 case VCPU_SREG_SS: return &save->ss;
647 case VCPU_SREG_TR: return &save->tr;
648 case VCPU_SREG_LDTR: return &save->ldtr;
654 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
656 struct vmcb_seg *s = svm_seg(vcpu, seg);
661 static void svm_get_segment(struct kvm_vcpu *vcpu,
662 struct kvm_segment *var, int seg)
664 struct vmcb_seg *s = svm_seg(vcpu, seg);
667 var->limit = s->limit;
668 var->selector = s->selector;
669 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
670 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
671 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
672 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
673 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
674 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
675 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
676 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
677 var->unusable = !var->present;
680 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
682 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
684 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
685 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
688 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
690 dt->limit = vcpu->svm->vmcb->save.idtr.limit;
691 dt->base = vcpu->svm->vmcb->save.idtr.base;
694 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
696 vcpu->svm->vmcb->save.idtr.limit = dt->limit;
697 vcpu->svm->vmcb->save.idtr.base = dt->base ;
700 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
702 dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
703 dt->base = vcpu->svm->vmcb->save.gdtr.base;
706 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
708 vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
709 vcpu->svm->vmcb->save.gdtr.base = dt->base ;
712 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
716 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
719 if (vcpu->shadow_efer & KVM_EFER_LME) {
720 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
721 vcpu->shadow_efer |= KVM_EFER_LMA;
722 vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
725 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
726 vcpu->shadow_efer &= ~KVM_EFER_LMA;
727 vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
731 vcpu->svm->cr0 = cr0;
732 vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK | CR0_WP_MASK;
736 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
739 vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
742 static void svm_set_segment(struct kvm_vcpu *vcpu,
743 struct kvm_segment *var, int seg)
745 struct vmcb_seg *s = svm_seg(vcpu, seg);
748 s->limit = var->limit;
749 s->selector = var->selector;
753 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
754 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
755 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
756 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
757 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
758 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
759 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
760 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
762 if (seg == VCPU_SREG_CS)
763 vcpu->svm->vmcb->save.cpl
764 = (vcpu->svm->vmcb->save.cs.attrib
765 >> SVM_SELECTOR_DPL_SHIFT) & 3;
771 vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
772 vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
776 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
781 static void load_host_msrs(struct kvm_vcpu *vcpu)
785 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
786 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
789 static void save_host_msrs(struct kvm_vcpu *vcpu)
793 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
794 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
797 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
799 if (svm_data->next_asid > svm_data->max_asid) {
800 ++svm_data->asid_generation;
801 svm_data->next_asid = 1;
802 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
805 vcpu->cpu = svm_data->cpu;
806 vcpu->svm->asid_generation = svm_data->asid_generation;
807 vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
810 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
812 invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
815 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
817 return vcpu->svm->db_regs[dr];
820 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
825 if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
826 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
827 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
828 *exception = DB_VECTOR;
834 vcpu->svm->db_regs[dr] = value;
837 if (vcpu->cr4 & CR4_DE_MASK) {
838 *exception = UD_VECTOR;
842 if (value & ~((1ULL << 32) - 1)) {
843 *exception = GP_VECTOR;
846 vcpu->svm->vmcb->save.dr7 = value;
850 printk(KERN_DEBUG "%s: unexpected dr %u\n",
852 *exception = UD_VECTOR;
857 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
859 u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
862 enum emulation_result er;
865 if (is_external_interrupt(exit_int_info))
866 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
868 spin_lock(&vcpu->kvm->lock);
870 fault_address = vcpu->svm->vmcb->control.exit_info_2;
871 error_code = vcpu->svm->vmcb->control.exit_info_1;
872 r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
874 spin_unlock(&vcpu->kvm->lock);
878 spin_unlock(&vcpu->kvm->lock);
881 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
882 spin_unlock(&vcpu->kvm->lock);
887 case EMULATE_DO_MMIO:
888 ++kvm_stat.mmio_exits;
889 kvm_run->exit_reason = KVM_EXIT_MMIO;
892 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
898 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
902 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
905 * VMCB is undefined after a SHUTDOWN intercept
906 * so reinitialize it.
908 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
909 init_vmcb(vcpu->svm->vmcb);
911 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
915 static int io_get_override(struct kvm_vcpu *vcpu,
916 struct vmcb_seg **seg,
919 u8 inst[MAX_INST_SIZE];
924 rip = vcpu->svm->vmcb->save.rip;
925 ins_length = vcpu->svm->next_rip - rip;
926 rip += vcpu->svm->vmcb->save.cs.base;
928 if (ins_length > MAX_INST_SIZE)
930 "%s: inst length err, cs base 0x%llx rip 0x%llx "
931 "next rip 0x%llx ins_length %u\n",
933 vcpu->svm->vmcb->save.cs.base,
934 vcpu->svm->vmcb->save.rip,
935 vcpu->svm->vmcb->control.exit_info_2,
938 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
944 for (i = 0; i < ins_length; i++)
955 *seg = &vcpu->svm->vmcb->save.cs;
958 *seg = &vcpu->svm->vmcb->save.ss;
961 *seg = &vcpu->svm->vmcb->save.ds;
964 *seg = &vcpu->svm->vmcb->save.es;
967 *seg = &vcpu->svm->vmcb->save.fs;
970 *seg = &vcpu->svm->vmcb->save.gs;
975 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
979 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
981 unsigned long addr_mask;
983 struct vmcb_seg *seg;
985 struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
986 u16 cs_attrib = save_area->cs.attrib;
987 unsigned addr_size = get_addr_size(vcpu);
989 if (!io_get_override(vcpu, &seg, &addr_override))
993 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
996 reg = &vcpu->regs[VCPU_REGS_RDI];
997 seg = &vcpu->svm->vmcb->save.es;
999 reg = &vcpu->regs[VCPU_REGS_RSI];
1000 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1003 addr_mask = ~0ULL >> (64 - (addr_size * 8));
1005 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1006 !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1007 *address = (*reg & addr_mask);
1011 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1012 svm_inject_gp(vcpu, 0);
1016 *address = (*reg & addr_mask) + seg->base;
1020 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1022 u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1023 int _in = io_info & SVM_IOIO_TYPE_MASK;
1025 ++kvm_stat.io_exits;
1027 vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1029 kvm_run->exit_reason = KVM_EXIT_IO;
1030 kvm_run->io.port = io_info >> 16;
1031 kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1032 kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1033 kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1034 kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1036 if (kvm_run->io.string) {
1039 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1041 printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1045 if (kvm_run->io.rep) {
1046 kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1047 kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1048 & X86_EFLAGS_DF) != 0;
1051 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1057 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1062 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1064 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1065 skip_emulated_instruction(vcpu);
1066 if (vcpu->irq_summary)
1069 kvm_run->exit_reason = KVM_EXIT_HLT;
1070 ++kvm_stat.halt_exits;
1074 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1080 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1082 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1083 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1087 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1089 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1090 kvm_run->exit_reason = KVM_EXIT_CPUID;
1094 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1096 if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1097 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1101 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1104 case MSR_IA32_TIME_STAMP_COUNTER: {
1108 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1112 *data = vcpu->svm->vmcb->save.star;
1114 #ifdef CONFIG_X86_64
1116 *data = vcpu->svm->vmcb->save.lstar;
1119 *data = vcpu->svm->vmcb->save.cstar;
1121 case MSR_KERNEL_GS_BASE:
1122 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1124 case MSR_SYSCALL_MASK:
1125 *data = vcpu->svm->vmcb->save.sfmask;
1128 case MSR_IA32_SYSENTER_CS:
1129 *data = vcpu->svm->vmcb->save.sysenter_cs;
1131 case MSR_IA32_SYSENTER_EIP:
1132 *data = vcpu->svm->vmcb->save.sysenter_eip;
1134 case MSR_IA32_SYSENTER_ESP:
1135 *data = vcpu->svm->vmcb->save.sysenter_esp;
1138 return kvm_get_msr_common(vcpu, ecx, data);
1143 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1145 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1148 if (svm_get_msr(vcpu, ecx, &data))
1149 svm_inject_gp(vcpu, 0);
1151 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1152 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1153 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1154 skip_emulated_instruction(vcpu);
1159 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1162 case MSR_IA32_TIME_STAMP_COUNTER: {
1166 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1170 vcpu->svm->vmcb->save.star = data;
1172 #ifdef CONFIG_X86_64
1174 vcpu->svm->vmcb->save.lstar = data;
1177 vcpu->svm->vmcb->save.cstar = data;
1179 case MSR_KERNEL_GS_BASE:
1180 vcpu->svm->vmcb->save.kernel_gs_base = data;
1182 case MSR_SYSCALL_MASK:
1183 vcpu->svm->vmcb->save.sfmask = data;
1186 case MSR_IA32_SYSENTER_CS:
1187 vcpu->svm->vmcb->save.sysenter_cs = data;
1189 case MSR_IA32_SYSENTER_EIP:
1190 vcpu->svm->vmcb->save.sysenter_eip = data;
1192 case MSR_IA32_SYSENTER_ESP:
1193 vcpu->svm->vmcb->save.sysenter_esp = data;
1196 return kvm_set_msr_common(vcpu, ecx, data);
1201 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1203 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1204 u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1205 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1206 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1207 if (svm_set_msr(vcpu, ecx, data))
1208 svm_inject_gp(vcpu, 0);
1210 skip_emulated_instruction(vcpu);
1214 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1216 if (vcpu->svm->vmcb->control.exit_info_1)
1217 return wrmsr_interception(vcpu, kvm_run);
1219 return rdmsr_interception(vcpu, kvm_run);
1222 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1223 struct kvm_run *kvm_run)
1226 * If the user space waits to inject interrupts, exit as soon as
1229 if (kvm_run->request_interrupt_window &&
1230 !vcpu->irq_summary) {
1231 ++kvm_stat.irq_window_exits;
1232 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1239 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1240 struct kvm_run *kvm_run) = {
1241 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1242 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1243 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1245 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1246 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1247 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1248 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1249 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1250 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1251 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1252 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1253 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1254 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1255 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1256 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1257 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1258 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1259 [SVM_EXIT_INTR] = nop_on_interception,
1260 [SVM_EXIT_NMI] = nop_on_interception,
1261 [SVM_EXIT_SMI] = nop_on_interception,
1262 [SVM_EXIT_INIT] = nop_on_interception,
1263 [SVM_EXIT_VINTR] = interrupt_window_interception,
1264 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1265 [SVM_EXIT_CPUID] = cpuid_interception,
1266 [SVM_EXIT_HLT] = halt_interception,
1267 [SVM_EXIT_INVLPG] = emulate_on_interception,
1268 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1269 [SVM_EXIT_IOIO] = io_interception,
1270 [SVM_EXIT_MSR] = msr_interception,
1271 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1272 [SVM_EXIT_SHUTDOWN] = shutdown_interception,
1273 [SVM_EXIT_VMRUN] = invalid_op_interception,
1274 [SVM_EXIT_VMMCALL] = invalid_op_interception,
1275 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1276 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1277 [SVM_EXIT_STGI] = invalid_op_interception,
1278 [SVM_EXIT_CLGI] = invalid_op_interception,
1279 [SVM_EXIT_SKINIT] = invalid_op_interception,
1283 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1285 u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1287 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1289 if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1290 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1291 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1293 __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1296 if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1297 || svm_exit_handlers[exit_code] == 0) {
1298 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1299 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1302 vcpu->svm->vmcb->save.rip,
1304 vcpu->svm->vmcb->save.rflags);
1308 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1311 static void reload_tss(struct kvm_vcpu *vcpu)
1313 int cpu = raw_smp_processor_id();
1315 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1316 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1320 static void pre_svm_run(struct kvm_vcpu *vcpu)
1322 int cpu = raw_smp_processor_id();
1324 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1326 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1327 if (vcpu->cpu != cpu ||
1328 vcpu->svm->asid_generation != svm_data->asid_generation)
1329 new_asid(vcpu, svm_data);
1333 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1335 struct vmcb_control_area *control;
1337 control = &vcpu->svm->vmcb->control;
1338 control->int_vector = pop_irq(vcpu);
1339 control->int_ctl &= ~V_INTR_PRIO_MASK;
1340 control->int_ctl |= V_IRQ_MASK |
1341 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1344 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1346 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1348 if (control->int_ctl & V_IRQ_MASK) {
1349 control->int_ctl &= ~V_IRQ_MASK;
1350 push_irq(vcpu, control->int_vector);
1353 vcpu->interrupt_window_open =
1354 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1357 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1358 struct kvm_run *kvm_run)
1360 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1362 vcpu->interrupt_window_open =
1363 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1364 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1366 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1368 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1370 kvm_do_inject_irq(vcpu);
1373 * Interrupts blocked. Wait for unblock.
1375 if (!vcpu->interrupt_window_open &&
1376 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1377 control->intercept |= 1ULL << INTERCEPT_VINTR;
1379 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1382 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1383 struct kvm_run *kvm_run)
1385 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1386 vcpu->irq_summary == 0);
1387 kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1388 kvm_run->cr8 = vcpu->cr8;
1389 kvm_run->apic_base = vcpu->apic_base;
1393 * Check if userspace requested an interrupt window, and that the
1394 * interrupt window is open.
1396 * No need to exit to userspace if we already have an interrupt queued.
1398 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1399 struct kvm_run *kvm_run)
1401 return (!vcpu->irq_summary &&
1402 kvm_run->request_interrupt_window &&
1403 vcpu->interrupt_window_open &&
1404 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1407 static void save_db_regs(unsigned long *db_regs)
1409 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1410 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1411 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1412 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1415 static void load_db_regs(unsigned long *db_regs)
1417 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1418 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1419 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1420 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1423 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1431 if (!vcpu->mmio_read_completed)
1432 do_interrupt_requests(vcpu, kvm_run);
1438 save_host_msrs(vcpu);
1439 fs_selector = read_fs();
1440 gs_selector = read_gs();
1441 ldt_selector = read_ldt();
1442 vcpu->svm->host_cr2 = kvm_read_cr2();
1443 vcpu->svm->host_dr6 = read_dr6();
1444 vcpu->svm->host_dr7 = read_dr7();
1445 vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1447 if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1449 save_db_regs(vcpu->svm->host_db_regs);
1450 load_db_regs(vcpu->svm->db_regs);
1453 fx_save(vcpu->host_fx_image);
1454 fx_restore(vcpu->guest_fx_image);
1457 #ifdef CONFIG_X86_64
1458 "push %%rbx; push %%rcx; push %%rdx;"
1459 "push %%rsi; push %%rdi; push %%rbp;"
1460 "push %%r8; push %%r9; push %%r10; push %%r11;"
1461 "push %%r12; push %%r13; push %%r14; push %%r15;"
1463 "push %%ebx; push %%ecx; push %%edx;"
1464 "push %%esi; push %%edi; push %%ebp;"
1467 #ifdef CONFIG_X86_64
1468 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1469 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1470 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1471 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1472 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1473 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1474 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1475 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1476 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1477 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1478 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1479 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1480 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1481 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1483 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1484 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1485 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1486 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1487 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1488 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1491 #ifdef CONFIG_X86_64
1492 /* Enter guest mode */
1494 "mov %c[svm](%[vcpu]), %%rax \n\t"
1495 "mov %c[vmcb](%%rax), %%rax \n\t"
1501 /* Enter guest mode */
1503 "mov %c[svm](%[vcpu]), %%eax \n\t"
1504 "mov %c[vmcb](%%eax), %%eax \n\t"
1511 /* Save guest registers, load host registers */
1512 #ifdef CONFIG_X86_64
1513 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1514 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1515 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1516 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1517 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1518 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1519 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1520 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1521 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1522 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1523 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1524 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1525 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1526 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1528 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1529 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1530 "pop %%rbp; pop %%rdi; pop %%rsi;"
1531 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1533 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1534 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1535 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1536 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1537 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1538 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1540 "pop %%ebp; pop %%edi; pop %%esi;"
1541 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1545 [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1546 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1547 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1548 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1549 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1550 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1551 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1552 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1553 #ifdef CONFIG_X86_64
1554 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1555 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1556 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1557 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1558 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1559 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1560 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1561 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1565 fx_save(vcpu->guest_fx_image);
1566 fx_restore(vcpu->host_fx_image);
1568 if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1569 load_db_regs(vcpu->svm->host_db_regs);
1571 vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1573 write_dr6(vcpu->svm->host_dr6);
1574 write_dr7(vcpu->svm->host_dr7);
1575 kvm_write_cr2(vcpu->svm->host_cr2);
1577 load_fs(fs_selector);
1578 load_gs(gs_selector);
1579 load_ldt(ldt_selector);
1580 load_host_msrs(vcpu);
1585 * Profile KVM exit RIPs:
1587 if (unlikely(prof_on == KVM_PROFILING))
1588 profile_hit(KVM_PROFILING,
1589 (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1593 kvm_reput_irq(vcpu);
1595 vcpu->svm->next_rip = 0;
1597 if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1598 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1599 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
1600 post_kvm_run_save(vcpu, kvm_run);
1604 r = handle_exit(vcpu, kvm_run);
1606 if (signal_pending(current)) {
1607 ++kvm_stat.signal_exits;
1608 post_kvm_run_save(vcpu, kvm_run);
1612 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1613 ++kvm_stat.request_irq_exits;
1614 post_kvm_run_save(vcpu, kvm_run);
1620 post_kvm_run_save(vcpu, kvm_run);
1624 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1626 force_new_asid(vcpu);
1629 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1631 vcpu->svm->vmcb->save.cr3 = root;
1632 force_new_asid(vcpu);
1635 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1639 uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1641 ++kvm_stat.pf_guest;
1643 if (is_page_fault(exit_int_info)) {
1645 vcpu->svm->vmcb->control.event_inj_err = 0;
1646 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1647 SVM_EVTINJ_VALID_ERR |
1648 SVM_EVTINJ_TYPE_EXEPT |
1653 vcpu->svm->vmcb->save.cr2 = addr;
1654 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1655 SVM_EVTINJ_VALID_ERR |
1656 SVM_EVTINJ_TYPE_EXEPT |
1658 vcpu->svm->vmcb->control.event_inj_err = err_code;
1662 static int is_disabled(void)
1667 static struct kvm_arch_ops svm_arch_ops = {
1668 .cpu_has_kvm_support = has_svm,
1669 .disabled_by_bios = is_disabled,
1670 .hardware_setup = svm_hardware_setup,
1671 .hardware_unsetup = svm_hardware_unsetup,
1672 .hardware_enable = svm_hardware_enable,
1673 .hardware_disable = svm_hardware_disable,
1675 .vcpu_create = svm_create_vcpu,
1676 .vcpu_free = svm_free_vcpu,
1678 .vcpu_load = svm_vcpu_load,
1679 .vcpu_put = svm_vcpu_put,
1681 .set_guest_debug = svm_guest_debug,
1682 .get_msr = svm_get_msr,
1683 .set_msr = svm_set_msr,
1684 .get_segment_base = svm_get_segment_base,
1685 .get_segment = svm_get_segment,
1686 .set_segment = svm_set_segment,
1687 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1688 .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1689 .set_cr0 = svm_set_cr0,
1690 .set_cr0_no_modeswitch = svm_set_cr0,
1691 .set_cr3 = svm_set_cr3,
1692 .set_cr4 = svm_set_cr4,
1693 .set_efer = svm_set_efer,
1694 .get_idt = svm_get_idt,
1695 .set_idt = svm_set_idt,
1696 .get_gdt = svm_get_gdt,
1697 .set_gdt = svm_set_gdt,
1698 .get_dr = svm_get_dr,
1699 .set_dr = svm_set_dr,
1700 .cache_regs = svm_cache_regs,
1701 .decache_regs = svm_decache_regs,
1702 .get_rflags = svm_get_rflags,
1703 .set_rflags = svm_set_rflags,
1705 .invlpg = svm_invlpg,
1706 .tlb_flush = svm_flush_tlb,
1707 .inject_page_fault = svm_inject_page_fault,
1709 .inject_gp = svm_inject_gp,
1711 .run = svm_vcpu_run,
1712 .skip_emulated_instruction = skip_emulated_instruction,
1713 .vcpu_setup = svm_vcpu_setup,
1716 static int __init svm_init(void)
1718 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1721 static void __exit svm_exit(void)
1726 module_init(svm_init)
1727 module_exit(svm_exit)