2 * CBE Pervasive Monitor and Debug
4 * (C) Copyright IBM Corporation 2005
6 * Authors: Maximino Aguilar (maguilar@us.ibm.com)
7 * Michael N. Day (mnday@us.ibm.com)
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2, or (at your option)
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/percpu.h>
29 #include <linux/types.h>
30 #include <linux/kallsyms.h>
33 #include <asm/machdep.h>
35 #include <asm/pgtable.h>
38 #include "pervasive.h"
41 static DEFINE_SPINLOCK(cbe_pervasive_lock);
43 static void __init cbe_enable_pause_zero(void)
45 unsigned long thread_switch_control;
46 unsigned long temp_register;
47 struct cbe_pmd_regs __iomem *pregs;
49 spin_lock_irq(&cbe_pervasive_lock);
50 pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
54 pr_debug("Power Management: CPU %d\n", smp_processor_id());
56 /* Enable Pause(0) control bit */
57 temp_register = in_be64(&pregs->pm_control);
59 out_be64(&pregs->pm_control,
60 temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
62 /* Enable DEC and EE interrupt request */
63 thread_switch_control = mfspr(SPRN_TSC_CELL);
64 thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
66 switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
68 thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
71 thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
74 printk(KERN_WARNING "%s: unknown configuration\n",
79 mtspr(SPRN_TSC_CELL, thread_switch_control);
82 spin_unlock_irq(&cbe_pervasive_lock);
85 static void cbe_idle(void)
89 /* Why do we do that on every idle ? Couldn't that be done once for
90 * all or do we lose the state some way ? Also, the pm_control
91 * register setting, that can't be set once at boot ? We really want
92 * to move that away in order to implement a simple powersave
94 cbe_enable_pause_zero();
97 if (!need_resched()) {
99 while (!need_resched()) {
100 /* go into low thread priority */
104 * atomically disable thread execution
106 * External and Decrementer exceptions
107 * are still handled when the thread
108 * is disabled but now enter in
109 * cbe_system_reset_exception()
111 ctrl = mfspr(SPRN_CTRLF);
112 ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
113 mtspr(SPRN_CTRLT, ctrl);
115 /* restore thread prio */
121 * turn runlatch on again before scheduling the
122 * process we just woke up
126 preempt_enable_no_resched();
132 static int cbe_system_reset_exception(struct pt_regs *regs)
134 switch (regs->msr & SRR1_WAKEMASK) {
139 timer_interrupt(regs);
143 #ifdef CONFIG_CBE_RAS
144 case SRR1_WAKESYSERR:
145 cbe_system_error_exception(regs);
148 cbe_thermal_exception(regs);
150 #endif /* CONFIG_CBE_RAS */
152 /* do system reset */
155 /* everything handled */
159 void __init cbe_pervasive_init(void)
161 if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
164 ppc_md.idle_loop = cbe_idle;
165 ppc_md.system_reset_exception = cbe_system_reset_exception;