2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
23 #include <linux/module.h>
24 #include <linux/errno.h>
25 #include <linux/timer.h>
26 #include <linux/interrupt.h>
27 #include <linux/tty.h>
28 #include <linux/tty_flip.h>
29 #include <linux/serial.h>
30 #include <linux/major.h>
31 #include <linux/string.h>
32 #include <linux/sysrq.h>
33 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/delay.h>
37 #include <linux/console.h>
38 #include <linux/platform_device.h>
40 #ifdef CONFIG_CPU_FREQ
41 #include <linux/notifier.h>
42 #include <linux/cpufreq.h>
45 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
46 #include <asm/clock.h>
47 #include <asm/sh_bios.h>
53 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
60 struct uart_port port;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs[SCIx_NR_IRQS];
68 /* Port pin configuration */
69 void (*init_pins)(struct uart_port *port,
72 /* Port enable callback */
73 void (*enable)(struct uart_port *port);
75 /* Port disable callback */
76 void (*disable)(struct uart_port *port);
79 struct timer_list break_timer;
84 static struct sci_port *kgdb_sci_port;
87 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
88 static struct sci_port *serial_console_port;
91 /* Function prototypes */
92 static void sci_stop_tx(struct uart_port *port);
94 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
96 static struct sci_port sci_ports[SCI_NPORTS];
97 static struct uart_driver sci_uart_driver;
99 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
100 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
101 static inline void handle_error(struct uart_port *port)
103 /* Clear error flags */
104 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
107 static int get_char(struct uart_port *port)
110 unsigned short status;
113 spin_lock_irqsave(&port->lock, flags);
115 status = sci_in(port, SCxSR);
116 if (status & SCxSR_ERRORS(port)) {
120 } while (!(status & SCxSR_RDxF(port)));
121 c = sci_in(port, SCxRDR);
122 sci_in(port, SCxSR); /* Dummy read */
123 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
124 spin_unlock_irqrestore(&port->lock, flags);
128 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
130 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
131 static void put_char(struct uart_port *port, char c)
134 unsigned short status;
136 spin_lock_irqsave(&port->lock, flags);
139 status = sci_in(port, SCxSR);
140 } while (!(status & SCxSR_TDxE(port)));
142 sci_out(port, SCxTDR, c);
143 sci_in(port, SCxSR); /* Dummy read */
144 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
146 spin_unlock_irqrestore(&port->lock, flags);
150 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
151 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
153 struct uart_port *port = &sci_port->port;
154 const unsigned char *p = buffer;
157 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
161 #ifdef CONFIG_SH_STANDARD_BIOS
162 /* This call only does a trap the first time it is
163 * called, and so is safe to do here unconditionally
165 usegdb |= sh_bios_in_gdb_mode();
167 #ifdef CONFIG_SH_KGDB
168 usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
172 /* $<packet info>#<checksum>. */
176 put_char(port, 'O'); /* 'O'utput to console */
179 for (i=0; i<count; i++) { /* Don't use run length encoding */
190 put_char(port, highhex(checksum));
191 put_char(port, lowhex(checksum));
192 } while (get_char(port) != '+');
194 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
195 for (i=0; i<count; i++) {
197 put_char(port, '\r');
198 put_char(port, *p++);
201 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
203 #ifdef CONFIG_SH_KGDB
204 static int kgdb_sci_getchar(void)
208 /* Keep trying to read a character, this could be neater */
209 while ((c = get_char(kgdb_sci_port)) < 0)
215 static inline void kgdb_sci_putchar(int c)
217 put_char(kgdb_sci_port, c);
219 #endif /* CONFIG_SH_KGDB */
221 #if defined(__H8300S__)
222 enum { sci_disable, sci_enable };
224 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
226 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
227 int ch = (port->mapbase - SMR0) >> 3;
228 unsigned char mask = 1 << (ch+1);
230 if (ctrl == sci_disable) {
237 static inline void h8300_sci_enable(struct uart_port *port)
239 h8300_sci_config(port, sci_enable);
242 static inline void h8300_sci_disable(struct uart_port *port)
244 h8300_sci_config(port, sci_disable);
248 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
249 defined(__H8300H__) || defined(__H8300S__)
250 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
252 int ch = (port->mapbase - SMR0) >> 3;
255 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
256 h8300_sci_pins[ch].rx,
258 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
259 h8300_sci_pins[ch].tx,
263 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
266 #define sci_init_pins_sci NULL
269 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
270 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
272 unsigned int fcr_val = 0;
275 fcr_val |= SCFCR_MCE;
277 sci_out(port, SCFCR, fcr_val);
280 #define sci_init_pins_irda NULL
284 #define sci_init_pins_scif NULL
287 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
288 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
289 /* SH7300 doesn't use RTS/CTS */
290 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
292 sci_out(port, SCFCR, 0);
294 #elif defined(CONFIG_CPU_SH3)
295 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
296 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
298 unsigned int fcr_val = 0;
301 /* We need to set SCPCR to enable RTS/CTS */
302 data = ctrl_inw(SCPCR);
303 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
304 ctrl_outw(data & 0x0fcf, SCPCR);
307 fcr_val |= SCFCR_MCE;
309 /* We need to set SCPCR to enable RTS/CTS */
310 data = ctrl_inw(SCPCR);
311 /* Clear out SCP7MD1,0, SCP4MD1,0,
312 Set SCP6MD1,0 = {01} (output) */
313 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
315 data = ctrl_inb(SCPDR);
316 /* Set /RTS2 (bit6) = 0 */
317 ctrl_outb(data & 0xbf, SCPDR);
320 sci_out(port, SCFCR, fcr_val);
322 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
323 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
325 unsigned int fcr_val = 0;
327 if (cflag & CRTSCTS) {
328 fcr_val |= SCFCR_MCE;
330 ctrl_outw(0x0000, PORT_PSCR);
334 data = ctrl_inw(PORT_PSCR);
337 ctrl_outw(data, PORT_PSCR);
339 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
342 sci_out(port, SCFCR, fcr_val);
346 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
348 unsigned int fcr_val = 0;
350 if (cflag & CRTSCTS) {
351 fcr_val |= SCFCR_MCE;
353 #ifdef CONFIG_CPU_SUBTYPE_SH7343
355 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
356 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
358 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
361 sci_out(port, SCFCR, fcr_val);
365 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
366 static inline int scif_txroom(struct uart_port *port)
368 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
371 static inline int scif_rxroom(struct uart_port *port)
373 return sci_in(port, SCRFDR) & 0x7f;
376 static inline int scif_txroom(struct uart_port *port)
378 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
381 static inline int scif_rxroom(struct uart_port *port)
383 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
386 #endif /* SCIF_ONLY || SCI_AND_SCIF */
388 static inline int sci_txroom(struct uart_port *port)
390 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
393 static inline int sci_rxroom(struct uart_port *port)
395 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
398 /* ********************************************************************** *
399 * the interrupt related routines *
400 * ********************************************************************** */
402 static void sci_transmit_chars(struct uart_port *port)
404 struct circ_buf *xmit = &port->info->xmit;
405 unsigned int stopped = uart_tx_stopped(port);
406 unsigned short status;
410 status = sci_in(port, SCxSR);
411 if (!(status & SCxSR_TDxE(port))) {
412 ctrl = sci_in(port, SCSCR);
413 if (uart_circ_empty(xmit)) {
414 ctrl &= ~SCI_CTRL_FLAGS_TIE;
416 ctrl |= SCI_CTRL_FLAGS_TIE;
418 sci_out(port, SCSCR, ctrl);
423 if (port->type == PORT_SCIF)
424 count = scif_txroom(port);
427 count = sci_txroom(port);
435 } else if (!uart_circ_empty(xmit) && !stopped) {
436 c = xmit->buf[xmit->tail];
437 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
442 sci_out(port, SCxTDR, c);
445 } while (--count > 0);
447 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
449 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
450 uart_write_wakeup(port);
451 if (uart_circ_empty(xmit)) {
454 ctrl = sci_in(port, SCSCR);
456 #if !defined(SCI_ONLY)
457 if (port->type == PORT_SCIF) {
458 sci_in(port, SCxSR); /* Dummy read */
459 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
463 ctrl |= SCI_CTRL_FLAGS_TIE;
464 sci_out(port, SCSCR, ctrl);
468 /* On SH3, SCIF may read end-of-break as a space->mark char */
469 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
471 static inline void sci_receive_chars(struct uart_port *port)
473 struct sci_port *sci_port = (struct sci_port *)port;
474 struct tty_struct *tty = port->info->tty;
475 int i, count, copied = 0;
476 unsigned short status;
479 status = sci_in(port, SCxSR);
480 if (!(status & SCxSR_RDxF(port)))
484 #if !defined(SCI_ONLY)
485 if (port->type == PORT_SCIF)
486 count = scif_rxroom(port);
489 count = sci_rxroom(port);
491 /* Don't copy more bytes than there is room for in the buffer */
492 count = tty_buffer_request_room(tty, count);
494 /* If for any reason we can't copy more data, we're done! */
498 if (port->type == PORT_SCI) {
499 char c = sci_in(port, SCxRDR);
500 if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
503 tty_insert_flip_char(tty, c, TTY_NORMAL);
506 for (i=0; i<count; i++) {
507 char c = sci_in(port, SCxRDR);
508 status = sci_in(port, SCxSR);
509 #if defined(CONFIG_CPU_SH3)
510 /* Skip "chars" during break */
511 if (sci_port->break_flag) {
513 (status & SCxSR_FER(port))) {
518 /* Nonzero => end-of-break */
519 pr_debug("scif: debounce<%02x>\n", c);
520 sci_port->break_flag = 0;
527 #endif /* CONFIG_CPU_SH3 */
528 if (uart_handle_sysrq_char(port, c)) {
533 /* Store data and status */
534 if (status&SCxSR_FER(port)) {
536 pr_debug("sci: frame error\n");
537 } else if (status&SCxSR_PER(port)) {
539 pr_debug("sci: parity error\n");
542 tty_insert_flip_char(tty, c, flag);
546 sci_in(port, SCxSR); /* dummy read */
547 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
550 port->icount.rx += count;
554 /* Tell the rest of the system the news. New characters! */
555 tty_flip_buffer_push(tty);
557 sci_in(port, SCxSR); /* dummy read */
558 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
562 #define SCI_BREAK_JIFFIES (HZ/20)
563 /* The sci generates interrupts during the break,
564 * 1 per millisecond or so during the break period, for 9600 baud.
565 * So dont bother disabling interrupts.
566 * But dont want more than 1 break event.
567 * Use a kernel timer to periodically poll the rx line until
568 * the break is finished.
570 static void sci_schedule_break_timer(struct sci_port *port)
572 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
573 add_timer(&port->break_timer);
575 /* Ensure that two consecutive samples find the break over. */
576 static void sci_break_timer(unsigned long data)
578 struct sci_port *port = (struct sci_port *)data;
580 if (sci_rxd_in(&port->port) == 0) {
581 port->break_flag = 1;
582 sci_schedule_break_timer(port);
583 } else if (port->break_flag == 1) {
585 port->break_flag = 2;
586 sci_schedule_break_timer(port);
588 port->break_flag = 0;
591 static inline int sci_handle_errors(struct uart_port *port)
594 unsigned short status = sci_in(port, SCxSR);
595 struct tty_struct *tty = port->info->tty;
597 if (status & SCxSR_ORER(port)) {
599 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
601 pr_debug("sci: overrun error\n");
604 if (status & SCxSR_FER(port)) {
605 if (sci_rxd_in(port) == 0) {
606 /* Notify of BREAK */
607 struct sci_port *sci_port = (struct sci_port *)port;
609 if (!sci_port->break_flag) {
610 sci_port->break_flag = 1;
611 sci_schedule_break_timer(sci_port);
613 /* Do sysrq handling. */
614 if (uart_handle_break(port))
616 pr_debug("sci: BREAK detected\n");
617 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
622 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
624 pr_debug("sci: frame error\n");
628 if (status & SCxSR_PER(port)) {
630 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
632 pr_debug("sci: parity error\n");
636 tty_flip_buffer_push(tty);
641 static inline int sci_handle_breaks(struct uart_port *port)
644 unsigned short status = sci_in(port, SCxSR);
645 struct tty_struct *tty = port->info->tty;
646 struct sci_port *s = &sci_ports[port->line];
648 if (!s->break_flag && status & SCxSR_BRK(port)) {
649 #if defined(CONFIG_CPU_SH3)
653 /* Notify of BREAK */
654 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
656 pr_debug("sci: BREAK detected\n");
659 #if defined(SCIF_ORER)
660 /* XXX: Handle SCIF overrun error */
661 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
662 sci_out(port, SCLSR, 0);
663 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
665 pr_debug("sci: overrun error\n");
671 tty_flip_buffer_push(tty);
676 static irqreturn_t sci_rx_interrupt(int irq, void *port)
678 /* I think sci_receive_chars has to be called irrespective
679 * of whether the I_IXOFF is set, otherwise, how is the interrupt
682 sci_receive_chars(port);
687 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
689 struct uart_port *port = ptr;
691 spin_lock_irq(&port->lock);
692 sci_transmit_chars(port);
693 spin_unlock_irq(&port->lock);
698 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
700 struct uart_port *port = ptr;
703 if (port->type == PORT_SCI) {
704 if (sci_handle_errors(port)) {
705 /* discard character in rx buffer */
707 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
710 #if defined(SCIF_ORER)
711 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
712 struct tty_struct *tty = port->info->tty;
714 sci_out(port, SCLSR, 0);
715 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
716 tty_flip_buffer_push(tty);
717 pr_debug("scif: overrun error\n");
720 sci_rx_interrupt(irq, ptr);
723 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
725 /* Kick the transmission */
726 sci_tx_interrupt(irq, ptr);
731 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
733 struct uart_port *port = ptr;
736 sci_handle_breaks(port);
738 #ifdef CONFIG_SH_KGDB
739 /* Break into the debugger if a break is detected */
743 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
748 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
750 unsigned short ssr_status, scr_status;
751 struct uart_port *port = ptr;
753 ssr_status = sci_in(port,SCxSR);
754 scr_status = sci_in(port,SCSCR);
757 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
758 sci_tx_interrupt(irq, ptr);
760 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
761 sci_rx_interrupt(irq, ptr);
762 /* Error Interrupt */
763 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
764 sci_er_interrupt(irq, ptr);
765 /* Break Interrupt */
766 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
767 sci_br_interrupt(irq, ptr);
772 #ifdef CONFIG_CPU_FREQ
774 * Here we define a transistion notifier so that we can update all of our
775 * ports' baud rate when the peripheral clock changes.
777 static int sci_notifier(struct notifier_block *self,
778 unsigned long phase, void *p)
780 struct cpufreq_freqs *freqs = p;
783 if ((phase == CPUFREQ_POSTCHANGE) ||
784 (phase == CPUFREQ_RESUMECHANGE)){
785 for (i = 0; i < SCI_NPORTS; i++) {
786 struct uart_port *port = &sci_ports[i].port;
790 * Update the uartclk per-port if frequency has
791 * changed, since it will no longer necessarily be
792 * consistent with the old frequency.
794 * Really we want to be able to do something like
795 * uart_change_speed() or something along those lines
796 * here to implicitly reset the per-port baud rate..
798 * Clean this up later..
800 clk = clk_get(NULL, "module_clk");
801 port->uartclk = clk_get_rate(clk) * 16;
805 printk(KERN_INFO "%s: got a postchange notification "
806 "for cpu %d (old %d, new %d)\n",
807 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
813 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
814 #endif /* CONFIG_CPU_FREQ */
816 static int sci_request_irq(struct sci_port *port)
819 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
820 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
823 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
824 "SCI Transmit Data Empty", "SCI Break" };
826 if (port->irqs[0] == port->irqs[1]) {
827 if (!port->irqs[0]) {
828 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
832 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
833 IRQF_DISABLED, "sci", port)) {
834 printk(KERN_ERR "sci: Cannot allocate irq.\n");
838 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
841 if (request_irq(port->irqs[i], handlers[i],
842 IRQF_DISABLED, desc[i], port)) {
843 printk(KERN_ERR "sci: Cannot allocate irq.\n");
852 static void sci_free_irq(struct sci_port *port)
856 if (port->irqs[0] == port->irqs[1]) {
858 printk("sci: sci_free_irq error\n");
860 free_irq(port->irqs[0], port);
862 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
866 free_irq(port->irqs[i], port);
871 static unsigned int sci_tx_empty(struct uart_port *port)
877 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
879 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
880 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
881 /* If you have signals for DTR and DCD, please implement here. */
884 static unsigned int sci_get_mctrl(struct uart_port *port)
886 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
889 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
892 static void sci_start_tx(struct uart_port *port)
896 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
897 ctrl = sci_in(port, SCSCR);
898 ctrl |= SCI_CTRL_FLAGS_TIE;
899 sci_out(port, SCSCR, ctrl);
902 static void sci_stop_tx(struct uart_port *port)
906 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
907 ctrl = sci_in(port, SCSCR);
908 ctrl &= ~SCI_CTRL_FLAGS_TIE;
909 sci_out(port, SCSCR, ctrl);
912 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
916 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
917 ctrl = sci_in(port, SCSCR);
918 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
919 sci_out(port, SCSCR, ctrl);
922 static void sci_stop_rx(struct uart_port *port)
926 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
927 ctrl = sci_in(port, SCSCR);
928 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
929 sci_out(port, SCSCR, ctrl);
932 static void sci_enable_ms(struct uart_port *port)
934 /* Nothing here yet .. */
937 static void sci_break_ctl(struct uart_port *port, int break_state)
939 /* Nothing here yet .. */
942 static int sci_startup(struct uart_port *port)
944 struct sci_port *s = &sci_ports[port->line];
951 sci_start_rx(port, 1);
956 static void sci_shutdown(struct uart_port *port)
958 struct sci_port *s = &sci_ports[port->line];
968 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
969 struct ktermios *old)
971 struct sci_port *s = &sci_ports[port->line];
972 unsigned int status, baud, smr_val;
976 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
984 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
985 struct clk *clk = clk_get(NULL, "module_clk");
986 t = SCBRR_VALUE(baud, clk_get_rate(clk));
989 t = SCBRR_VALUE(baud);
995 spin_lock_irqsave(&port->lock, flags);
998 status = sci_in(port, SCxSR);
999 } while (!(status & SCxSR_TEND(port)));
1001 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1003 #if !defined(SCI_ONLY)
1004 if (port->type == PORT_SCIF)
1005 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1008 smr_val = sci_in(port, SCSMR) & 3;
1009 if ((termios->c_cflag & CSIZE) == CS7)
1011 if (termios->c_cflag & PARENB)
1013 if (termios->c_cflag & PARODD)
1015 if (termios->c_cflag & CSTOPB)
1018 uart_update_timeout(port, termios->c_cflag, baud);
1020 sci_out(port, SCSMR, smr_val);
1024 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1027 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1029 sci_out(port, SCBRR, t);
1030 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1033 if (likely(s->init_pins))
1034 s->init_pins(port, termios->c_cflag);
1036 sci_out(port, SCSCR, SCSCR_INIT(port));
1038 if ((termios->c_cflag & CREAD) != 0)
1039 sci_start_rx(port,0);
1041 spin_unlock_irqrestore(&port->lock, flags);
1044 static const char *sci_type(struct uart_port *port)
1046 switch (port->type) {
1047 case PORT_SCI: return "sci";
1048 case PORT_SCIF: return "scif";
1049 case PORT_IRDA: return "irda";
1055 static void sci_release_port(struct uart_port *port)
1057 /* Nothing here yet .. */
1060 static int sci_request_port(struct uart_port *port)
1062 /* Nothing here yet .. */
1066 static void sci_config_port(struct uart_port *port, int flags)
1068 struct sci_port *s = &sci_ports[port->line];
1070 port->type = s->type;
1072 switch (port->type) {
1074 s->init_pins = sci_init_pins_sci;
1077 s->init_pins = sci_init_pins_scif;
1080 s->init_pins = sci_init_pins_irda;
1084 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1085 if (port->mapbase == 0)
1086 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1088 port->membase = (void __iomem *)port->mapbase;
1092 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1094 struct sci_port *s = &sci_ports[port->line];
1096 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1098 if (ser->baud_base < 2400)
1099 /* No paper tape reader for Mitch.. */
1105 static struct uart_ops sci_uart_ops = {
1106 .tx_empty = sci_tx_empty,
1107 .set_mctrl = sci_set_mctrl,
1108 .get_mctrl = sci_get_mctrl,
1109 .start_tx = sci_start_tx,
1110 .stop_tx = sci_stop_tx,
1111 .stop_rx = sci_stop_rx,
1112 .enable_ms = sci_enable_ms,
1113 .break_ctl = sci_break_ctl,
1114 .startup = sci_startup,
1115 .shutdown = sci_shutdown,
1116 .set_termios = sci_set_termios,
1118 .release_port = sci_release_port,
1119 .request_port = sci_request_port,
1120 .config_port = sci_config_port,
1121 .verify_port = sci_verify_port,
1124 static void __init sci_init_ports(void)
1126 static int first = 1;
1134 for (i = 0; i < SCI_NPORTS; i++) {
1135 sci_ports[i].port.ops = &sci_uart_ops;
1136 sci_ports[i].port.iotype = UPIO_MEM;
1137 sci_ports[i].port.line = i;
1138 sci_ports[i].port.fifosize = 1;
1140 #if defined(__H8300H__) || defined(__H8300S__)
1142 sci_ports[i].enable = h8300_sci_enable;
1143 sci_ports[i].disable = h8300_sci_disable;
1145 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1146 #elif defined(CONFIG_SUPERH64)
1147 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1150 * XXX: We should use a proper SCI/SCIF clock
1153 struct clk *clk = clk_get(NULL, "module_clk");
1154 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1159 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1160 sci_ports[i].break_timer.function = sci_break_timer;
1162 init_timer(&sci_ports[i].break_timer);
1166 int __init early_sci_setup(struct uart_port *port)
1168 if (unlikely(port->line > SCI_NPORTS))
1173 sci_ports[port->line].port.membase = port->membase;
1174 sci_ports[port->line].port.mapbase = port->mapbase;
1175 sci_ports[port->line].port.type = port->type;
1180 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1182 * Print a string to the serial port trying not to disturb
1183 * any possible real use of the port...
1185 static void serial_console_write(struct console *co, const char *s,
1188 put_string(serial_console_port, s, count);
1191 static int __init serial_console_setup(struct console *co, char *options)
1193 struct uart_port *port;
1201 * Check whether an invalid uart number has been specified, and
1202 * if so, search for the first available port that does have
1205 if (co->index >= SCI_NPORTS)
1208 serial_console_port = &sci_ports[co->index];
1209 port = &serial_console_port->port;
1212 * Also need to check port->type, we don't actually have any
1213 * UPIO_PORT ports, but uart_report_port() handily misreports
1214 * it anyways if we don't have a port available by the time this is
1219 if (!port->membase || !port->mapbase)
1222 spin_lock_init(&port->lock);
1224 port->type = serial_console_port->type;
1226 if (port->flags & UPF_IOREMAP)
1227 sci_config_port(port, 0);
1229 if (serial_console_port->enable)
1230 serial_console_port->enable(port);
1233 uart_parse_options(options, &baud, &parity, &bits, &flow);
1235 ret = uart_set_options(port, co, baud, parity, bits, flow);
1236 #if defined(__H8300H__) || defined(__H8300S__)
1237 /* disable rx interrupt */
1244 static struct console serial_console = {
1246 .device = uart_console_device,
1247 .write = serial_console_write,
1248 .setup = serial_console_setup,
1249 .flags = CON_PRINTBUFFER,
1251 .data = &sci_uart_driver,
1254 static int __init sci_console_init(void)
1257 register_console(&serial_console);
1260 console_initcall(sci_console_init);
1261 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1263 #ifdef CONFIG_SH_KGDB
1265 * FIXME: Most of this can go away.. at the moment, we rely on
1266 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1267 * most of that can easily be done here instead.
1269 * For the time being, just accept the values that were parsed earlier..
1271 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1272 int *parity, int *bits)
1275 *parity = tolower(kgdb_parity);
1276 *bits = kgdb_bits - '0';
1280 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1281 * care of the early-on initialization for kgdb, regardless of whether we
1282 * actually use kgdb as a console or not.
1284 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1286 int __init kgdb_console_setup(struct console *co, char *options)
1288 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1294 spin_lock_init(&port->lock);
1296 if (co->index != kgdb_portnum)
1297 co->index = kgdb_portnum;
1300 uart_parse_options(options, &baud, &parity, &bits, &flow);
1302 kgdb_console_get_options(port, &baud, &parity, &bits);
1304 kgdb_getchar = kgdb_sci_getchar;
1305 kgdb_putchar = kgdb_sci_putchar;
1307 return uart_set_options(port, co, baud, parity, bits, flow);
1309 #endif /* CONFIG_SH_KGDB */
1311 #ifdef CONFIG_SH_KGDB_CONSOLE
1312 static struct console kgdb_console = {
1314 .write = kgdb_console_write,
1315 .setup = kgdb_console_setup,
1316 .flags = CON_PRINTBUFFER | CON_ENABLED,
1318 .data = &sci_uart_driver,
1321 /* Register the KGDB console so we get messages (d'oh!) */
1322 static int __init kgdb_console_init(void)
1325 register_console(&kgdb_console);
1328 console_initcall(kgdb_console_init);
1329 #endif /* CONFIG_SH_KGDB_CONSOLE */
1331 #if defined(CONFIG_SH_KGDB_CONSOLE)
1332 #define SCI_CONSOLE &kgdb_console
1333 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1334 #define SCI_CONSOLE &serial_console
1336 #define SCI_CONSOLE 0
1339 static char banner[] __initdata =
1340 KERN_INFO "SuperH SCI(F) driver initialized\n";
1342 static struct uart_driver sci_uart_driver = {
1343 .owner = THIS_MODULE,
1344 .driver_name = "sci",
1345 .dev_name = "ttySC",
1347 .minor = SCI_MINOR_START,
1349 .cons = SCI_CONSOLE,
1353 * Register a set of serial devices attached to a platform device. The
1354 * list is terminated with a zero flags entry, which means we expect
1355 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1356 * remapping (such as sh64) should also set UPF_IOREMAP.
1358 static int __devinit sci_probe(struct platform_device *dev)
1360 struct plat_sci_port *p = dev->dev.platform_data;
1363 for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
1364 struct sci_port *sciport = &sci_ports[i];
1366 sciport->port.mapbase = p->mapbase;
1369 * For the simple (and majority of) cases where we don't need
1370 * to do any remapping, just cast the cookie directly.
1372 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1373 p->membase = (void __iomem *)p->mapbase;
1375 sciport->port.membase = p->membase;
1377 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1378 sciport->port.flags = p->flags;
1379 sciport->port.dev = &dev->dev;
1381 sciport->type = sciport->port.type = p->type;
1383 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1385 uart_add_one_port(&sci_uart_driver, &sciport->port);
1388 #ifdef CONFIG_CPU_FREQ
1389 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1390 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1393 #ifdef CONFIG_SH_STANDARD_BIOS
1394 sh_bios_gdb_detach();
1400 static int __devexit sci_remove(struct platform_device *dev)
1404 for (i = 0; i < SCI_NPORTS; i++)
1405 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1410 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1414 for (i = 0; i < SCI_NPORTS; i++) {
1415 struct sci_port *p = &sci_ports[i];
1417 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1418 uart_suspend_port(&sci_uart_driver, &p->port);
1424 static int sci_resume(struct platform_device *dev)
1428 for (i = 0; i < SCI_NPORTS; i++) {
1429 struct sci_port *p = &sci_ports[i];
1431 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1432 uart_resume_port(&sci_uart_driver, &p->port);
1438 static struct platform_driver sci_driver = {
1440 .remove = __devexit_p(sci_remove),
1441 .suspend = sci_suspend,
1442 .resume = sci_resume,
1445 .owner = THIS_MODULE,
1449 static int __init sci_init(void)
1457 ret = uart_register_driver(&sci_uart_driver);
1458 if (likely(ret == 0)) {
1459 ret = platform_driver_register(&sci_driver);
1461 uart_unregister_driver(&sci_uart_driver);
1467 static void __exit sci_exit(void)
1469 platform_driver_unregister(&sci_driver);
1470 uart_unregister_driver(&sci_uart_driver);
1473 module_init(sci_init);
1474 module_exit(sci_exit);
1476 MODULE_LICENSE("GPL");