2 * include/asm-sh/cpu-sh3/mmu_context.h
4 * Copyright (C) 1999 Niibe Yutaka
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #ifndef __ASM_CPU_SH3_MMU_CONTEXT_H
11 #define __ASM_CPU_SH3_MMU_CONTEXT_H
13 #define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */
14 #define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */
15 #define MMU_TTB 0xFFFFFFF8 /* Translation table base register */
16 #define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */
18 #define MMUCR 0xFFFFFFE0 /* MMU Control Register */
20 #define MMU_TLB_ADDRESS_ARRAY 0xF2000000
21 #define MMU_PAGE_ASSOC_BIT 0x80
23 #define MMU_NTLB_ENTRIES 128 /* for 7708 */
24 #define MMU_NTLB_WAYS 4
25 #define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */
27 #define TRA 0xffffffd0
28 #define EXPEVT 0xffffffd4
30 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7710)
36 #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
38 #define INTEVT 0xffffffd8
41 #endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */