git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8349EMDS";
  16         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26                 pci1 = &pci1;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8349@0 {
  34                         device_type = "cpu";
  35                         reg = <0x0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <32768>;
  39                         i-cache-size = <32768>;
  40                         timebase-frequency = <0>;       // from bootloader
  41                         bus-frequency = <0>;            // from bootloader
  42                         clock-frequency = <0>;          // from bootloader
  43                 };
  44         };
  45
  46         memory {
  47                 device_type = "memory";
  48                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  49         };
  50
  51         bcsr@e2400000 {
  52                 device_type = "board-control";
  53                 reg = <0xe2400000 0x8000>;
  54         };
  55
  56         soc8349@e0000000 {
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 device_type = "soc";
  60                 compatible = "simple-bus";
  61                 ranges = <0x0 0xe0000000 0x00100000>;
  62                 reg = <0xe0000000 0x00000200>;
  63                 bus-frequency = <0>;
  64
  65                 wdt@200 {
  66                         device_type = "watchdog";
  67                         compatible = "mpc83xx_wdt";
  68                         reg = <0x200 0x100>;
  69                 };
  70
  71                 i2c@3000 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <0>;
  75                         compatible = "fsl-i2c";
  76                         reg = <0x3000 0x100>;
  77                         interrupts = <14 0x8>;
  78                         interrupt-parent = <&ipic>;
  79                         dfsrr;
  80
  81                         rtc@68 {
  82                                 compatible = "dallas,ds1374";
  83                                 reg = <0x68>;
  84                         };
  85                 };
  86
  87                 i2c@3100 {
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         cell-index = <1>;
  91                         compatible = "fsl-i2c";
  92                         reg = <0x3100 0x100>;
  93                         interrupts = <15 0x8>;
  94                         interrupt-parent = <&ipic>;
  95                         dfsrr;
  96                 };
  97
  98                 spi@7000 {
  99                         cell-index = <0>;
 100                         compatible = "fsl,spi";
 101                         reg = <0x7000 0x1000>;
 102                         interrupts = <16 0x8>;
 103                         interrupt-parent = <&ipic>;
 104                         mode = "cpu";
 105                 };
 106
 107                 dma@82a8 {
 108                         #address-cells = <1>;
 109                         #size-cells = <1>;
 110                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
 111                         reg = <0x82a8 4>;
 112                         ranges = <0 0x8100 0x1a8>;
 113                         interrupt-parent = <&ipic>;
 114                         interrupts = <71 8>;
 115                         cell-index = <0>;
 116                         dma-channel@0 {
 117                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 118                                 reg = <0 0x80>;
 119                                 interrupt-parent = <&ipic>;
 120                                 interrupts = <71 8>;
 121                         };
 122                         dma-channel@80 {
 123                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 124                                 reg = <0x80 0x80>;
 125                                 interrupt-parent = <&ipic>;
 126                                 interrupts = <71 8>;
 127                         };
 128                         dma-channel@100 {
 129                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 130                                 reg = <0x100 0x80>;
 131                                 interrupt-parent = <&ipic>;
 132                                 interrupts = <71 8>;
 133                         };
 134                         dma-channel@180 {
 135                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 136                                 reg = <0x180 0x28>;
 137                                 interrupt-parent = <&ipic>;
 138                                 interrupts = <71 8>;
 139                         };
 140                 };
 141
 142                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
 143                 /* port = 0 or 1 */
 144                 usb@22000 {
 145                         compatible = "fsl-usb2-mph";
 146                         reg = <0x22000 0x1000>;
 147                         #address-cells = <1>;
 148                         #size-cells = <0>;
 149                         interrupt-parent = <&ipic>;
 150                         interrupts = <39 0x8>;
 151                         phy_type = "ulpi";
 152                         port1;
 153                 };
 154                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 155                 usb@23000 {
 156                         compatible = "fsl-usb2-dr";
 157                         reg = <0x23000 0x1000>;
 158                         #address-cells = <1>;
 159                         #size-cells = <0>;
 160                         interrupt-parent = <&ipic>;
 161                         interrupts = <38 0x8>;
 162                         dr_mode = "otg";
 163                         phy_type = "ulpi";
 164                 };
 165
 166                 mdio@24520 {
 167                         #address-cells = <1>;
 168                         #size-cells = <0>;
 169                         compatible = "fsl,gianfar-mdio";
 170                         reg = <0x24520 0x20>;
 171
 172                         phy0: ethernet-phy@0 {
 173                                 interrupt-parent = <&ipic>;
 174                                 interrupts = <17 0x8>;
 175                                 reg = <0x0>;
 176                                 device_type = "ethernet-phy";
 177                         };
 178                         phy1: ethernet-phy@1 {
 179                                 interrupt-parent = <&ipic>;
 180                                 interrupts = <18 0x8>;
 181                                 reg = <0x1>;
 182                                 device_type = "ethernet-phy";
 183                         };
 184                 };
 185
 186                 enet0: ethernet@24000 {
 187                         cell-index = <0>;
 188                         device_type = "network";
 189                         model = "TSEC";
 190                         compatible = "gianfar";
 191                         reg = <0x24000 0x1000>;
 192                         local-mac-address = [ 00 00 00 00 00 00 ];
 193                         interrupts = <32 0x8 33 0x8 34 0x8>;
 194                         interrupt-parent = <&ipic>;
 195                         phy-handle = <&phy0>;
 196                         linux,network-index = <0>;
 197                 };
 198
 199                 enet1: ethernet@25000 {
 200                         cell-index = <1>;
 201                         device_type = "network";
 202                         model = "TSEC";
 203                         compatible = "gianfar";
 204                         reg = <0x25000 0x1000>;
 205                         local-mac-address = [ 00 00 00 00 00 00 ];
 206                         interrupts = <35 0x8 36 0x8 37 0x8>;
 207                         interrupt-parent = <&ipic>;
 208                         phy-handle = <&phy1>;
 209                         linux,network-index = <1>;
 210                 };
 211
 212                 serial0: serial@4500 {
 213                         cell-index = <0>;
 214                         device_type = "serial";
 215                         compatible = "ns16550";
 216                         reg = <0x4500 0x100>;
 217                         clock-frequency = <0>;
 218                         interrupts = <9 0x8>;
 219                         interrupt-parent = <&ipic>;
 220                 };
 221
 222                 serial1: serial@4600 {
 223                         cell-index = <1>;
 224                         device_type = "serial";
 225                         compatible = "ns16550";
 226                         reg = <0x4600 0x100>;
 227                         clock-frequency = <0>;
 228                         interrupts = <10 0x8>;
 229                         interrupt-parent = <&ipic>;
 230                 };
 231
 232                 crypto@30000 {
 233                         compatible = "fsl,sec2.0";
 234                         reg = <0x30000 0x10000>;
 235                         interrupts = <11 0x8>;
 236                         interrupt-parent = <&ipic>;
 237                         fsl,num-channels = <4>;
 238                         fsl,channel-fifo-len = <24>;
 239                         fsl,exec-units-mask = <0x7e>;
 240                         fsl,descriptor-types-mask = <0x01010ebf>;
 241                 };
 242
 243                 /* IPIC
 244                  * interrupts cell = <intr #, sense>
 245                  * sense values match linux IORESOURCE_IRQ_* defines:
 246                  * sense == 8: Level, low assertion
 247                  * sense == 2: Edge, high-to-low change
 248                  */
 249                 ipic: pic@700 {
 250                         interrupt-controller;
 251                         #address-cells = <0>;
 252                         #interrupt-cells = <2>;
 253                         reg = <0x700 0x100>;
 254                         device_type = "ipic";
 255                 };
 256         };
 257
 258         pci0: pci@e0008500 {
 259                 cell-index = <1>;
 260                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 261                 interrupt-map = <
 262
 263                                 /* IDSEL 0x11 */
 264                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
 265                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
 266                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
 267                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
 268
 269                                 /* IDSEL 0x12 */
 270                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
 271                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
 272                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
 273                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
 274
 275                                 /* IDSEL 0x13 */
 276                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
 277                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
 278                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
 279                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
 280
 281                                 /* IDSEL 0x15 */
 282                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
 283                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
 284                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
 285                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
 286
 287                                 /* IDSEL 0x16 */
 288                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
 289                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
 290                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
 291                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
 292
 293                                 /* IDSEL 0x17 */
 294                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
 295                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
 296                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
 297                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
 298
 299                                 /* IDSEL 0x18 */
 300                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
 301                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
 302                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
 303                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
 304                 interrupt-parent = <&ipic>;
 305                 interrupts = <66 0x8>;
 306                 bus-range = <0 0>;
 307                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 308                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 309                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 310                 clock-frequency = <66666666>;
 311                 #interrupt-cells = <1>;
 312                 #size-cells = <2>;
 313                 #address-cells = <3>;
 314                 reg = <0xe0008500 0x100>;
 315                 compatible = "fsl,mpc8349-pci";
 316                 device_type = "pci";
 317         };
 318
 319         pci1: pci@e0008600 {
 320                 cell-index = <2>;
 321                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 322                 interrupt-map = <
 323
 324                                 /* IDSEL 0x11 */
 325                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
 326                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
 327                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
 328                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
 329
 330                                 /* IDSEL 0x12 */
 331                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
 332                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
 333                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
 334                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
 335
 336                                 /* IDSEL 0x13 */
 337                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
 338                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
 339                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
 340                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
 341
 342                                 /* IDSEL 0x15 */
 343                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
 344                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
 345                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
 346                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
 347
 348                                 /* IDSEL 0x16 */
 349                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
 350                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
 351                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
 352                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
 353
 354                                 /* IDSEL 0x17 */
 355                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
 356                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
 357                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
 358                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
 359
 360                                 /* IDSEL 0x18 */
 361                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
 362                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
 363                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
 364                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
 365                 interrupt-parent = <&ipic>;
 366                 interrupts = <67 0x8>;
 367                 bus-range = <0 0>;
 368                 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
 369                           0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
 370                           0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
 371                 clock-frequency = <66666666>;
 372                 #interrupt-cells = <1>;
 373                 #size-cells = <2>;
 374                 #address-cells = <3>;
 375                 reg = <0xe0008600 0x100>;
 376                 compatible = "fsl,mpc8349-pci";
 377                 device_type = "pci";
 378         };
 379 };