2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/tty.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/initrd.h>
30 #include <linux/highmem.h>
31 #include <linux/bootmem.h>
32 #include <linux/module.h>
33 #include <asm/processor.h>
34 #include <linux/console.h>
35 #include <linux/seq_file.h>
36 #include <linux/crash_dump.h>
37 #include <linux/root_dev.h>
38 #include <linux/pci.h>
39 #include <linux/acpi.h>
40 #include <linux/kallsyms.h>
41 #include <linux/edd.h>
42 #include <linux/mmzone.h>
43 #include <linux/kexec.h>
44 #include <linux/cpufreq.h>
45 #include <linux/dmi.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/ctype.h>
50 #include <asm/uaccess.h>
51 #include <asm/system.h>
56 #include <video/edid.h>
59 #include <asm/mpspec.h>
60 #include <asm/mmu_context.h>
61 #include <asm/bootsetup.h>
62 #include <asm/proto.h>
63 #include <asm/setup.h>
64 #include <asm/mach_apic.h>
66 #include <asm/sections.h>
73 struct cpuinfo_x86 boot_cpu_data __read_mostly;
74 EXPORT_SYMBOL(boot_cpu_data);
76 unsigned long mmu_cr4_features;
79 EXPORT_SYMBOL(acpi_disabled);
81 extern int __initdata acpi_ht;
82 extern acpi_interrupt_flags acpi_sci_flags;
83 int __initdata acpi_force = 0;
86 int acpi_numa __initdata;
88 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
91 unsigned long saved_video_mode;
97 char dmi_alloc_data[DMI_MAX_DATA];
102 struct screen_info screen_info;
103 EXPORT_SYMBOL(screen_info);
104 struct sys_desc_table_struct {
105 unsigned short length;
106 unsigned char table[0];
109 struct edid_info edid_info;
110 EXPORT_SYMBOL_GPL(edid_info);
113 extern int root_mountflags;
115 char command_line[COMMAND_LINE_SIZE];
117 struct resource standard_io_resources[] = {
118 { .name = "dma1", .start = 0x00, .end = 0x1f,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "pic1", .start = 0x20, .end = 0x21,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "timer0", .start = 0x40, .end = 0x43,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "timer1", .start = 0x50, .end = 0x53,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "keyboard", .start = 0x60, .end = 0x6f,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
130 { .name = "pic2", .start = 0xa0, .end = 0xa1,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
132 { .name = "dma2", .start = 0xc0, .end = 0xdf,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "fpu", .start = 0xf0, .end = 0xff,
135 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
138 #define STANDARD_IO_RESOURCES \
139 (sizeof standard_io_resources / sizeof standard_io_resources[0])
141 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
143 struct resource data_resource = {
144 .name = "Kernel data",
147 .flags = IORESOURCE_RAM,
149 struct resource code_resource = {
150 .name = "Kernel code",
153 .flags = IORESOURCE_RAM,
156 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
158 static struct resource system_rom_resource = {
159 .name = "System ROM",
162 .flags = IORESOURCE_ROM,
165 static struct resource extension_rom_resource = {
166 .name = "Extension ROM",
169 .flags = IORESOURCE_ROM,
172 static struct resource adapter_rom_resources[] = {
173 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM },
179 { .name = "Adapter ROM", .start = 0, .end = 0,
180 .flags = IORESOURCE_ROM },
181 { .name = "Adapter ROM", .start = 0, .end = 0,
182 .flags = IORESOURCE_ROM },
183 { .name = "Adapter ROM", .start = 0, .end = 0,
184 .flags = IORESOURCE_ROM }
187 #define ADAPTER_ROM_RESOURCES \
188 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
190 static struct resource video_rom_resource = {
194 .flags = IORESOURCE_ROM,
197 static struct resource video_ram_resource = {
198 .name = "Video RAM area",
201 .flags = IORESOURCE_RAM,
204 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
206 static int __init romchecksum(unsigned char *rom, unsigned long length)
208 unsigned char *p, sum = 0;
210 for (p = rom; p < rom + length; p++)
215 static void __init probe_roms(void)
217 unsigned long start, length, upper;
222 upper = adapter_rom_resources[0].start;
223 for (start = video_rom_resource.start; start < upper; start += 2048) {
224 rom = isa_bus_to_virt(start);
225 if (!romsignature(rom))
228 video_rom_resource.start = start;
230 /* 0 < length <= 0x7f * 512, historically */
231 length = rom[2] * 512;
233 /* if checksum okay, trust length byte */
234 if (length && romchecksum(rom, length))
235 video_rom_resource.end = start + length - 1;
237 request_resource(&iomem_resource, &video_rom_resource);
241 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
246 request_resource(&iomem_resource, &system_rom_resource);
247 upper = system_rom_resource.start;
249 /* check for extension rom (ignore length byte!) */
250 rom = isa_bus_to_virt(extension_rom_resource.start);
251 if (romsignature(rom)) {
252 length = extension_rom_resource.end - extension_rom_resource.start + 1;
253 if (romchecksum(rom, length)) {
254 request_resource(&iomem_resource, &extension_rom_resource);
255 upper = extension_rom_resource.start;
259 /* check for adapter roms on 2k boundaries */
260 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
261 rom = isa_bus_to_virt(start);
262 if (!romsignature(rom))
265 /* 0 < length <= 0x7f * 512, historically */
266 length = rom[2] * 512;
268 /* but accept any length that fits if checksum okay */
269 if (!length || start + length > upper || !romchecksum(rom, length))
272 adapter_rom_resources[i].start = start;
273 adapter_rom_resources[i].end = start + length - 1;
274 request_resource(&iomem_resource, &adapter_rom_resources[i]);
276 start = adapter_rom_resources[i++].end & ~2047UL;
280 /* Check for full argument with no trailing characters */
281 static int fullarg(char *p, char *arg)
284 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
287 static __init void parse_cmdline_early (char ** cmdline_p)
289 char c = ' ', *to = command_line, *from = COMMAND_LINE;
299 * If the BIOS enumerates physical processors before logical,
300 * maxcpus=N at enumeration-time can be used to disable HT.
302 else if (!memcmp(from, "maxcpus=", 8)) {
303 extern unsigned int maxcpus;
305 maxcpus = simple_strtoul(from + 8, NULL, 0);
309 /* "acpi=off" disables both ACPI table parsing and interpreter init */
310 if (fullarg(from,"acpi=off"))
313 if (fullarg(from, "acpi=force")) {
314 /* add later when we do DMI horrors: */
319 /* acpi=ht just means: do ACPI MADT parsing
320 at bootup, but don't enable the full ACPI interpreter */
321 if (fullarg(from, "acpi=ht")) {
326 else if (fullarg(from, "pci=noacpi"))
328 else if (fullarg(from, "acpi=noirq"))
331 else if (fullarg(from, "acpi_sci=edge"))
332 acpi_sci_flags.trigger = 1;
333 else if (fullarg(from, "acpi_sci=level"))
334 acpi_sci_flags.trigger = 3;
335 else if (fullarg(from, "acpi_sci=high"))
336 acpi_sci_flags.polarity = 1;
337 else if (fullarg(from, "acpi_sci=low"))
338 acpi_sci_flags.polarity = 3;
340 /* acpi=strict disables out-of-spec workarounds */
341 else if (fullarg(from, "acpi=strict")) {
344 #ifdef CONFIG_X86_IO_APIC
345 else if (fullarg(from, "acpi_skip_timer_override"))
346 acpi_skip_timer_override = 1;
350 if (fullarg(from, "disable_timer_pin_1"))
351 disable_timer_pin_1 = 1;
352 if (fullarg(from, "enable_timer_pin_1"))
353 disable_timer_pin_1 = -1;
355 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
356 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
360 if (fullarg(from, "noapic"))
361 skip_ioapic_setup = 1;
363 if (fullarg(from,"apic")) {
364 skip_ioapic_setup = 0;
368 if (!memcmp(from, "mem=", 4))
369 parse_memopt(from+4, &from);
371 if (!memcmp(from, "memmap=", 7)) {
372 /* exactmap option is for used defined memory */
373 if (!memcmp(from+7, "exactmap", 8)) {
374 #ifdef CONFIG_CRASH_DUMP
375 /* If we are doing a crash dump, we
376 * still need to know the real mem
377 * size before original memory map is
380 saved_max_pfn = e820_end_of_ram();
388 parse_memmapopt(from+7, &from);
394 if (!memcmp(from, "numa=", 5))
398 if (!memcmp(from,"iommu=",6)) {
402 if (fullarg(from,"oops=panic"))
405 if (!memcmp(from, "noexec=", 7))
406 nonx_setup(from + 7);
409 /* crashkernel=size@addr specifies the location to reserve for
410 * a crash kernel. By reserving this memory we guarantee
411 * that linux never set's it up as a DMA target.
412 * Useful for holding code to do something appropriate
413 * after a kernel panic.
415 else if (!memcmp(from, "crashkernel=", 12)) {
416 unsigned long size, base;
417 size = memparse(from+12, &from);
419 base = memparse(from+1, &from);
420 /* FIXME: Do I want a sanity check
421 * to validate the memory range?
423 crashk_res.start = base;
424 crashk_res.end = base + size - 1;
429 #ifdef CONFIG_PROC_VMCORE
430 /* elfcorehdr= specifies the location of elf core header
431 * stored by the crashed kernel. This option will be passed
432 * by kexec loader to the capture kernel.
434 else if(!memcmp(from, "elfcorehdr=", 11))
435 elfcorehdr_addr = memparse(from+11, &from);
438 #ifdef CONFIG_HOTPLUG_CPU
439 else if (!memcmp(from, "additional_cpus=", 16))
440 setup_additional_cpus(from+16);
447 if (COMMAND_LINE_SIZE <= ++len)
452 printk(KERN_INFO "user-defined physical RAM map:\n");
453 e820_print_map("user");
456 *cmdline_p = command_line;
461 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
463 unsigned long bootmap_size, bootmap;
465 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
466 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
468 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
469 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
470 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
471 reserve_bootmem(bootmap, bootmap_size);
475 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
477 #ifdef CONFIG_EDD_MODULE
481 * copy_edd() - Copy the BIOS EDD information
482 * from boot_params into a safe place.
485 static inline void copy_edd(void)
487 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
488 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
489 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
490 edd.edd_info_nr = EDD_NR;
493 static inline void copy_edd(void)
498 #define EBDA_ADDR_POINTER 0x40E
500 unsigned __initdata ebda_addr;
501 unsigned __initdata ebda_size;
503 static void discover_ebda(void)
506 * there is a real-mode segmented pointer pointing to the
507 * 4K EBDA area at 0x40E
509 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
512 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
514 /* Round EBDA up to pages */
518 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
519 if (ebda_size > 64*1024)
523 void __init setup_arch(char **cmdline_p)
525 unsigned long kernel_end;
527 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
528 screen_info = SCREEN_INFO;
529 edid_info = EDID_INFO;
530 saved_video_mode = SAVED_VIDEO_MODE;
531 bootloader_type = LOADER_TYPE;
533 #ifdef CONFIG_BLK_DEV_RAM
534 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
535 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
536 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
538 setup_memory_region();
541 if (!MOUNT_ROOT_RDONLY)
542 root_mountflags &= ~MS_RDONLY;
543 init_mm.start_code = (unsigned long) &_text;
544 init_mm.end_code = (unsigned long) &_etext;
545 init_mm.end_data = (unsigned long) &_edata;
546 init_mm.brk = (unsigned long) &_end;
548 code_resource.start = virt_to_phys(&_text);
549 code_resource.end = virt_to_phys(&_etext)-1;
550 data_resource.start = virt_to_phys(&_etext);
551 data_resource.end = virt_to_phys(&_edata)-1;
553 parse_cmdline_early(cmdline_p);
555 early_identify_cpu(&boot_cpu_data);
558 * partially used pages are not usable - thus
559 * we are rounding upwards:
561 end_pfn = e820_end_of_ram();
562 num_physpages = end_pfn; /* for pfn_valid */
568 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
576 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
577 * Call this early for SRAT node setup.
579 acpi_boot_table_init();
582 #ifdef CONFIG_ACPI_NUMA
584 * Parse SRAT to discover nodes.
590 numa_initmem_init(0, end_pfn);
592 contig_initmem_init(0, end_pfn);
595 /* Reserve direct mapping */
596 reserve_bootmem_generic(table_start << PAGE_SHIFT,
597 (table_end - table_start) << PAGE_SHIFT);
600 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
601 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
604 * reserve physical page 0 - it's a special BIOS page on many boxes,
605 * enabling clean reboots, SMP operation, laptop functions.
607 reserve_bootmem_generic(0, PAGE_SIZE);
609 /* reserve ebda region */
611 reserve_bootmem_generic(ebda_addr, ebda_size);
615 * But first pinch a few for the stack/trampoline stuff
616 * FIXME: Don't need the extra page at 4K, but need to fix
617 * trampoline before removing it. (see the GDT stuff)
619 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
621 /* Reserve SMP trampoline */
622 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
625 #ifdef CONFIG_ACPI_SLEEP
627 * Reserve low memory region for sleep support.
629 acpi_reserve_bootmem();
631 #ifdef CONFIG_X86_LOCAL_APIC
633 * Find and reserve possible boot-time SMP configuration:
637 #ifdef CONFIG_BLK_DEV_INITRD
638 if (LOADER_TYPE && INITRD_START) {
639 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
640 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
642 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
643 initrd_end = initrd_start+INITRD_SIZE;
646 printk(KERN_ERR "initrd extends beyond end of memory "
647 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
648 (unsigned long)(INITRD_START + INITRD_SIZE),
649 (unsigned long)(end_pfn << PAGE_SHIFT));
655 if (crashk_res.start != crashk_res.end) {
656 reserve_bootmem_generic(crashk_res.start,
657 crashk_res.end - crashk_res.start + 1);
666 * set this early, so we dont allocate cpu0
667 * if MADT list doesnt list BSP first
668 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
670 cpu_set(0, cpu_present_map);
673 * Read APIC and some other early information from ACPI tables.
680 #ifdef CONFIG_X86_LOCAL_APIC
682 * get boot-time SMP configuration:
684 if (smp_found_config)
686 init_apic_mappings();
690 * Request address space for all standard RAM and ROM resources
691 * and also for regions reported as reserved by the e820.
694 e820_reserve_resources();
696 request_resource(&iomem_resource, &video_ram_resource);
700 /* request I/O space for devices used on all i[345]86 PCs */
701 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
702 request_resource(&ioport_resource, &standard_io_resources[i]);
708 #if defined(CONFIG_VGA_CONSOLE)
709 conswitchp = &vga_con;
710 #elif defined(CONFIG_DUMMY_CONSOLE)
711 conswitchp = &dummy_con;
716 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
720 if (c->extended_cpuid_level < 0x80000004)
723 v = (unsigned int *) c->x86_model_id;
724 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
725 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
726 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
727 c->x86_model_id[48] = 0;
732 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
734 unsigned int n, dummy, eax, ebx, ecx, edx;
736 n = c->extended_cpuid_level;
738 if (n >= 0x80000005) {
739 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
740 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
741 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
742 c->x86_cache_size=(ecx>>24)+(edx>>24);
743 /* On K8 L1 TLB is inclusive, so don't count it */
747 if (n >= 0x80000006) {
748 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
749 ecx = cpuid_ecx(0x80000006);
750 c->x86_cache_size = ecx >> 16;
751 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
753 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
754 c->x86_cache_size, ecx & 0xFF);
758 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
759 if (n >= 0x80000008) {
760 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
761 c->x86_virt_bits = (eax >> 8) & 0xff;
762 c->x86_phys_bits = eax & 0xff;
767 static int nearby_node(int apicid)
770 for (i = apicid - 1; i >= 0; i--) {
771 int node = apicid_to_node[i];
772 if (node != NUMA_NO_NODE && node_online(node))
775 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
776 int node = apicid_to_node[i];
777 if (node != NUMA_NO_NODE && node_online(node))
780 return first_node(node_online_map); /* Shouldn't happen */
785 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
786 * Assumes number of cores is a power of two.
788 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
793 int cpu = smp_processor_id();
795 unsigned apicid = hard_smp_processor_id();
797 unsigned ecx = cpuid_ecx(0x80000008);
799 c->x86_max_cores = (ecx & 0xff) + 1;
801 /* CPU telling us the core id bits shift? */
802 bits = (ecx >> 12) & 0xF;
804 /* Otherwise recompute */
806 while ((1 << bits) < c->x86_max_cores)
810 /* Low order bits define the core id (index of core in socket) */
811 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
812 /* Convert the APIC ID into the socket ID */
813 c->phys_proc_id = phys_pkg_id(bits);
816 node = c->phys_proc_id;
817 if (apicid_to_node[apicid] != NUMA_NO_NODE)
818 node = apicid_to_node[apicid];
819 if (!node_online(node)) {
820 /* Two possibilities here:
821 - The CPU is missing memory and no node was created.
822 In that case try picking one from a nearby CPU
823 - The APIC IDs differ from the HyperTransport node IDs
824 which the K8 northbridge parsing fills in.
825 Assume they are all increased by a constant offset,
826 but in the same order as the HT nodeids.
827 If that doesn't result in a usable node fall back to the
828 path for the previous case. */
829 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
830 if (ht_nodeid >= 0 &&
831 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
832 node = apicid_to_node[ht_nodeid];
833 /* Pick a nearby node */
834 if (!node_online(node))
835 node = nearby_node(apicid);
837 numa_set_node(cpu, node);
839 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
844 static void __init init_amd(struct cpuinfo_x86 *c)
852 * Disable TLB flush filter by setting HWCR.FFDIS on K8
853 * bit 6 of msr C001_0015
855 * Errata 63 for SH-B3 steppings
856 * Errata 122 for all steppings (F+ have it disabled by default)
859 rdmsrl(MSR_K8_HWCR, value);
861 wrmsrl(MSR_K8_HWCR, value);
865 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
866 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
867 clear_bit(0*32+31, &c->x86_capability);
869 /* On C+ stepping K8 rep microcode works well for copy/memset */
870 level = cpuid_eax(1);
871 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
872 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
874 /* Enable workaround for FXSAVE leak */
876 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
878 level = get_model_name(c);
882 /* Should distinguish Models here, but this is only
883 a fallback anyways. */
884 strcpy(c->x86_model_id, "Hammer");
888 display_cacheinfo(c);
890 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
891 if (c->x86_power & (1<<8))
892 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
894 /* Multi core CPU? */
895 if (c->extended_cpuid_level >= 0x80000008)
898 /* Fix cpuid4 emulation for more */
899 num_cache_leaves = 3;
902 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
905 u32 eax, ebx, ecx, edx;
906 int index_msb, core_bits;
908 cpuid(1, &eax, &ebx, &ecx, &edx);
911 if (!cpu_has(c, X86_FEATURE_HT))
913 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
916 smp_num_siblings = (ebx & 0xff0000) >> 16;
918 if (smp_num_siblings == 1) {
919 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
920 } else if (smp_num_siblings > 1 ) {
922 if (smp_num_siblings > NR_CPUS) {
923 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
924 smp_num_siblings = 1;
928 index_msb = get_count_order(smp_num_siblings);
929 c->phys_proc_id = phys_pkg_id(index_msb);
931 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
933 index_msb = get_count_order(smp_num_siblings) ;
935 core_bits = get_count_order(c->x86_max_cores);
937 c->cpu_core_id = phys_pkg_id(index_msb) &
938 ((1 << core_bits) - 1);
941 if ((c->x86_max_cores * smp_num_siblings) > 1) {
942 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
943 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
950 * find out the number of processor cores on the die
952 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
956 if (c->cpuid_level < 4)
959 cpuid_count(4, 0, &eax, &t, &t, &t);
962 return ((eax >> 26) + 1);
967 static void srat_detect_node(void)
971 int cpu = smp_processor_id();
972 int apicid = hard_smp_processor_id();
974 /* Don't do the funky fallback heuristics the AMD version employs
976 node = apicid_to_node[apicid];
977 if (node == NUMA_NO_NODE)
978 node = first_node(node_online_map);
979 numa_set_node(cpu, node);
982 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
986 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
991 init_intel_cacheinfo(c);
992 if (c->cpuid_level > 9 ) {
993 unsigned eax = cpuid_eax(10);
994 /* Check for version and the number of counters */
995 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
996 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
999 n = c->extended_cpuid_level;
1000 if (n >= 0x80000008) {
1001 unsigned eax = cpuid_eax(0x80000008);
1002 c->x86_virt_bits = (eax >> 8) & 0xff;
1003 c->x86_phys_bits = eax & 0xff;
1004 /* CPUID workaround for Intel 0F34 CPU */
1005 if (c->x86_vendor == X86_VENDOR_INTEL &&
1006 c->x86 == 0xF && c->x86_model == 0x3 &&
1008 c->x86_phys_bits = 36;
1012 c->x86_cache_alignment = c->x86_clflush_size * 2;
1013 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1014 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1015 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1016 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1017 c->x86_max_cores = intel_num_cpu_cores(c);
1022 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1024 char *v = c->x86_vendor_id;
1026 if (!strcmp(v, "AuthenticAMD"))
1027 c->x86_vendor = X86_VENDOR_AMD;
1028 else if (!strcmp(v, "GenuineIntel"))
1029 c->x86_vendor = X86_VENDOR_INTEL;
1031 c->x86_vendor = X86_VENDOR_UNKNOWN;
1034 struct cpu_model_info {
1037 char *model_names[16];
1040 /* Do some early cpuid on the boot CPU to get some parameter that are
1041 needed before check_bugs. Everything advanced is in identify_cpu
1043 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1047 c->loops_per_jiffy = loops_per_jiffy;
1048 c->x86_cache_size = -1;
1049 c->x86_vendor = X86_VENDOR_UNKNOWN;
1050 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1051 c->x86_vendor_id[0] = '\0'; /* Unset */
1052 c->x86_model_id[0] = '\0'; /* Unset */
1053 c->x86_clflush_size = 64;
1054 c->x86_cache_alignment = c->x86_clflush_size;
1055 c->x86_max_cores = 1;
1056 c->extended_cpuid_level = 0;
1057 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1059 /* Get vendor name */
1060 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1061 (unsigned int *)&c->x86_vendor_id[0],
1062 (unsigned int *)&c->x86_vendor_id[8],
1063 (unsigned int *)&c->x86_vendor_id[4]);
1067 /* Initialize the standard set of capabilities */
1068 /* Note that the vendor-specific code below might override */
1070 /* Intel-defined flags: level 0x00000001 */
1071 if (c->cpuid_level >= 0x00000001) {
1073 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1074 &c->x86_capability[0]);
1075 c->x86 = (tfms >> 8) & 0xf;
1076 c->x86_model = (tfms >> 4) & 0xf;
1077 c->x86_mask = tfms & 0xf;
1079 c->x86 += (tfms >> 20) & 0xff;
1081 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1082 if (c->x86_capability[0] & (1<<19))
1083 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1085 /* Have CPUID level 0 only - unheard of */
1090 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
1095 * This does the hard work of actually picking apart the CPU stuff...
1097 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1102 early_identify_cpu(c);
1104 /* AMD-defined flags: level 0x80000001 */
1105 xlvl = cpuid_eax(0x80000000);
1106 c->extended_cpuid_level = xlvl;
1107 if ((xlvl & 0xffff0000) == 0x80000000) {
1108 if (xlvl >= 0x80000001) {
1109 c->x86_capability[1] = cpuid_edx(0x80000001);
1110 c->x86_capability[6] = cpuid_ecx(0x80000001);
1112 if (xlvl >= 0x80000004)
1113 get_model_name(c); /* Default name */
1116 /* Transmeta-defined flags: level 0x80860001 */
1117 xlvl = cpuid_eax(0x80860000);
1118 if ((xlvl & 0xffff0000) == 0x80860000) {
1119 /* Don't set x86_cpuid_level here for now to not confuse. */
1120 if (xlvl >= 0x80860001)
1121 c->x86_capability[2] = cpuid_edx(0x80860001);
1124 c->apicid = phys_pkg_id(0);
1127 * Vendor-specific initialization. In this section we
1128 * canonicalize the feature flags, meaning if there are
1129 * features a certain CPU supports which CPUID doesn't
1130 * tell us, CPUID claiming incorrect flags, or other bugs,
1131 * we handle them here.
1133 * At the end of this section, c->x86_capability better
1134 * indicate the features this CPU genuinely supports!
1136 switch (c->x86_vendor) {
1137 case X86_VENDOR_AMD:
1141 case X86_VENDOR_INTEL:
1145 case X86_VENDOR_UNKNOWN:
1147 display_cacheinfo(c);
1151 select_idle_routine(c);
1155 * On SMP, boot_cpu_data holds the common feature set between
1156 * all CPUs; so make sure that we indicate which features are
1157 * common between the CPUs. The first time this routine gets
1158 * executed, c == &boot_cpu_data.
1160 if (c != &boot_cpu_data) {
1161 /* AND the already accumulated flags with these */
1162 for (i = 0 ; i < NCAPINTS ; i++)
1163 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1166 #ifdef CONFIG_X86_MCE
1169 if (c == &boot_cpu_data)
1174 numa_add_cpu(smp_processor_id());
1179 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1181 if (c->x86_model_id[0])
1182 printk("%s", c->x86_model_id);
1184 if (c->x86_mask || c->cpuid_level >= 0)
1185 printk(" stepping %02x\n", c->x86_mask);
1191 * Get CPU information for use by the procfs.
1194 static int show_cpuinfo(struct seq_file *m, void *v)
1196 struct cpuinfo_x86 *c = v;
1199 * These flag bits must match the definitions in <asm/cpufeature.h>.
1200 * NULL means this bit is undefined or reserved; either way it doesn't
1201 * have meaning as far as Linux is concerned. Note that it's important
1202 * to realize there is a difference between this table and CPUID -- if
1203 * applications want to get the raw CPUID data, they should access
1204 * /dev/cpu/<cpu_nr>/cpuid instead.
1206 static char *x86_cap_flags[] = {
1208 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1209 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1210 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1211 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1216 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1217 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1219 /* Transmeta-defined */
1220 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1223 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1225 /* Other (Linux-defined) */
1226 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1227 "constant_tsc", NULL, NULL,
1228 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1230 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232 /* Intel-defined (#2) */
1233 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1234 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1235 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1236 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1238 /* VIA/Cyrix/Centaur-defined */
1239 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1240 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1241 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1242 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1244 /* AMD-defined (#2) */
1245 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1246 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1247 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1248 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1250 static char *x86_power_flags[] = {
1251 "ts", /* temperature sensor */
1252 "fid", /* frequency id control */
1253 "vid", /* voltage id control */
1254 "ttp", /* thermal trip */
1258 /* nothing */ /* constant_tsc - moved to flags */
1263 if (!cpu_online(c-cpu_data))
1267 seq_printf(m,"processor\t: %u\n"
1269 "cpu family\t: %d\n"
1271 "model name\t: %s\n",
1272 (unsigned)(c-cpu_data),
1273 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1276 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1278 if (c->x86_mask || c->cpuid_level >= 0)
1279 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1281 seq_printf(m, "stepping\t: unknown\n");
1283 if (cpu_has(c,X86_FEATURE_TSC)) {
1284 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1287 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1288 freq / 1000, (freq % 1000));
1292 if (c->x86_cache_size >= 0)
1293 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1296 if (smp_num_siblings * c->x86_max_cores > 1) {
1297 int cpu = c - cpu_data;
1298 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1299 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1300 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1301 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1307 "fpu_exception\t: yes\n"
1308 "cpuid level\t: %d\n"
1315 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1316 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1317 seq_printf(m, " %s", x86_cap_flags[i]);
1320 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1321 c->loops_per_jiffy/(500000/HZ),
1322 (c->loops_per_jiffy/(5000/HZ)) % 100);
1324 if (c->x86_tlbsize > 0)
1325 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1326 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1327 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1329 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1330 c->x86_phys_bits, c->x86_virt_bits);
1332 seq_printf(m, "power management:");
1335 for (i = 0; i < 32; i++)
1336 if (c->x86_power & (1 << i)) {
1337 if (i < ARRAY_SIZE(x86_power_flags) &&
1339 seq_printf(m, "%s%s",
1340 x86_power_flags[i][0]?" ":"",
1341 x86_power_flags[i]);
1343 seq_printf(m, " [%d]", i);
1347 seq_printf(m, "\n\n");
1352 static void *c_start(struct seq_file *m, loff_t *pos)
1354 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1357 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1360 return c_start(m, pos);
1363 static void c_stop(struct seq_file *m, void *v)
1367 struct seq_operations cpuinfo_op = {
1371 .show = show_cpuinfo,
1374 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1375 #include <linux/platform_device.h>
1376 static __init int add_pcspkr(void)
1378 struct platform_device *pd;
1381 pd = platform_device_alloc("pcspkr", -1);
1385 ret = platform_device_add(pd);
1387 platform_device_put(pd);
1391 device_initcall(add_pcspkr);