git.oblomov.eu Git - linux-2.6/blob - sound/pci/pcxhr/pcxhr.c

   1 /*
   2  * Driver for Digigram pcxhr compatible soundcards
   3  *
   4  * main file with alsa callbacks
   5  *
   6  * Copyright (c) 2004 by Digigram <alsa@digigram.com>
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  */
  22
  23
  24 #include <sound/driver.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/slab.h>
  28 #include <linux/pci.h>
  29 #include <linux/dma-mapping.h>
  30 #include <linux/delay.h>
  31 #include <linux/moduleparam.h>
  32 #include <linux/mutex.h>
  33
  34 #include <sound/core.h>
  35 #include <sound/initval.h>
  36 #include <sound/info.h>
  37 #include <sound/control.h>
  38 #include <sound/pcm.h>
  39 #include <sound/pcm_params.h>
  40 #include "pcxhr.h"
  41 #include "pcxhr_mixer.h"
  42 #include "pcxhr_hwdep.h"
  43 #include "pcxhr_core.h"
  44
  45 #define DRIVER_NAME "pcxhr"
  46
  47 MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>");
  48 MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING);
  49 MODULE_LICENSE("GPL");
  50 MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}");
  51
  52 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;              /* Index 0-MAX */
  53 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;               /* ID for this card */
  54 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  55 static int mono[SNDRV_CARDS];                                   /* capture in mono only */
  56
  57 module_param_array(index, int, NULL, 0444);
  58 MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard");
  59 module_param_array(id, charp, NULL, 0444);
  60 MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard");
  61 module_param_array(enable, bool, NULL, 0444);
  62 MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard");
  63 module_param_array(mono, bool, NULL, 0444);
  64 MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)");
  65
  66 enum {
  67         PCI_ID_VX882HR,
  68         PCI_ID_PCX882HR,
  69         PCI_ID_VX881HR,
  70         PCI_ID_PCX881HR,
  71         PCI_ID_PCX1222HR,
  72         PCI_ID_PCX1221HR,
  73         PCI_ID_LAST
  74 };
  75
  76 static struct pci_device_id pcxhr_ids[] = {
  77         { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, },   /* VX882HR */
  78         { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, },  /* PCX882HR */
  79         { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, },   /* VX881HR */
  80         { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, },  /* PCX881HR */
  81         { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */
  82         { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */
  83         { 0, }
  84 };
  85
  86 MODULE_DEVICE_TABLE(pci, pcxhr_ids);
  87
  88 struct board_parameters {
  89         char* board_name;
  90         short playback_chips;
  91         short capture_chips;
  92         short firmware_num;
  93 };
  94 static struct board_parameters pcxhr_board_params[] = {
  95 [PCI_ID_VX882HR] =      { "VX882HR",   4, 4, 41, },
  96 [PCI_ID_PCX882HR] =     { "PCX882HR",  4, 4, 41, },
  97 [PCI_ID_VX881HR] =      { "VX881HR",   4, 4, 41, },
  98 [PCI_ID_PCX881HR] =     { "PCX881HR",  4, 4, 41, },
  99 [PCI_ID_PCX1222HR] =    { "PCX1222HR", 6, 1, 42, },
 100 [PCI_ID_PCX1221HR] =    { "PCX1221HR", 6, 1, 42, },
 101 };
 102
 103
 104 static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
 105                                    unsigned int* realfreq)
 106 {
 107         unsigned int reg;
 108
 109         if (freq < 6900 || freq > 110250)
 110                 return -EINVAL;
 111         reg = (28224000 * 10) / freq;
 112         reg = (reg + 5) / 10;
 113         if (reg < 0x200)
 114                 *pllreg = reg + 0x800;
 115         else if (reg < 0x400)
 116                 *pllreg = reg & 0x1ff;
 117         else if (reg < 0x800) {
 118                 *pllreg = ((reg >> 1) & 0x1ff) + 0x200;
 119                 reg &= ~1;
 120         } else {
 121                 *pllreg = ((reg >> 2) & 0x1ff) + 0x400;
 122                 reg &= ~3;
 123         }
 124         if (realfreq)
 125                 *realfreq = ((28224000 * 10) / reg + 5) / 10;
 126         return 0;
 127 }
 128
 129
 130 #define PCXHR_FREQ_REG_MASK             0x1f
 131 #define PCXHR_FREQ_QUARTZ_48000         0x00
 132 #define PCXHR_FREQ_QUARTZ_24000         0x01
 133 #define PCXHR_FREQ_QUARTZ_12000         0x09
 134 #define PCXHR_FREQ_QUARTZ_32000         0x08
 135 #define PCXHR_FREQ_QUARTZ_16000         0x04
 136 #define PCXHR_FREQ_QUARTZ_8000          0x0c
 137 #define PCXHR_FREQ_QUARTZ_44100         0x02
 138 #define PCXHR_FREQ_QUARTZ_22050         0x0a
 139 #define PCXHR_FREQ_QUARTZ_11025         0x06
 140 #define PCXHR_FREQ_PLL                  0x05
 141 #define PCXHR_FREQ_QUARTZ_192000        0x10
 142 #define PCXHR_FREQ_QUARTZ_96000         0x18
 143 #define PCXHR_FREQ_QUARTZ_176400        0x14
 144 #define PCXHR_FREQ_QUARTZ_88200         0x1c
 145 #define PCXHR_FREQ_QUARTZ_128000        0x12
 146 #define PCXHR_FREQ_QUARTZ_64000         0x1a
 147
 148 #define PCXHR_FREQ_WORD_CLOCK           0x0f
 149 #define PCXHR_FREQ_SYNC_AES             0x0e
 150 #define PCXHR_FREQ_AES_1                0x07
 151 #define PCXHR_FREQ_AES_2                0x0b
 152 #define PCXHR_FREQ_AES_3                0x03
 153 #define PCXHR_FREQ_AES_4                0x0d
 154
 155 #define PCXHR_MODIFY_CLOCK_S_BIT        0x04
 156
 157 #define PCXHR_IRQ_TIMER_FREQ            92000
 158 #define PCXHR_IRQ_TIMER_PERIOD          48
 159
 160 static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
 161                                unsigned int *reg, unsigned int *freq)
 162 {
 163         unsigned int val, realfreq, pllreg;
 164         struct pcxhr_rmh rmh;
 165         int err;
 166
 167         realfreq = rate;
 168         switch (mgr->use_clock_type) {
 169         case PCXHR_CLOCK_TYPE_INTERNAL :        /* clock by quartz or pll */
 170                 switch (rate) {
 171                 case 48000 :    val = PCXHR_FREQ_QUARTZ_48000;  break;
 172                 case 24000 :    val = PCXHR_FREQ_QUARTZ_24000;  break;
 173                 case 12000 :    val = PCXHR_FREQ_QUARTZ_12000;  break;
 174                 case 32000 :    val = PCXHR_FREQ_QUARTZ_32000;  break;
 175                 case 16000 :    val = PCXHR_FREQ_QUARTZ_16000;  break;
 176                 case 8000 :     val = PCXHR_FREQ_QUARTZ_8000;   break;
 177                 case 44100 :    val = PCXHR_FREQ_QUARTZ_44100;  break;
 178                 case 22050 :    val = PCXHR_FREQ_QUARTZ_22050;  break;
 179                 case 11025 :    val = PCXHR_FREQ_QUARTZ_11025;  break;
 180                 case 192000 :   val = PCXHR_FREQ_QUARTZ_192000; break;
 181                 case 96000 :    val = PCXHR_FREQ_QUARTZ_96000;  break;
 182                 case 176400 :   val = PCXHR_FREQ_QUARTZ_176400; break;
 183                 case 88200 :    val = PCXHR_FREQ_QUARTZ_88200;  break;
 184                 case 128000 :   val = PCXHR_FREQ_QUARTZ_128000; break;
 185                 case 64000 :    val = PCXHR_FREQ_QUARTZ_64000;  break;
 186                 default :
 187                         val = PCXHR_FREQ_PLL;
 188                         /* get the value for the pll register */
 189                         err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq);
 190                         if (err)
 191                                 return err;
 192                         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
 193                         rmh.cmd[0] |= IO_NUM_REG_GENCLK;
 194                         rmh.cmd[1]  = pllreg & MASK_DSP_WORD;
 195                         rmh.cmd[2]  = pllreg >> 24;
 196                         rmh.cmd_len = 3;
 197                         err = pcxhr_send_msg(mgr, &rmh);
 198                         if (err < 0) {
 199                                 snd_printk(KERN_ERR
 200                                            "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n",
 201                                            err );
 202                                 return err;
 203                         }
 204                 }
 205                 break;
 206         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      val = PCXHR_FREQ_WORD_CLOCK;    break;
 207         case PCXHR_CLOCK_TYPE_AES_SYNC :        val = PCXHR_FREQ_SYNC_AES;      break;
 208         case PCXHR_CLOCK_TYPE_AES_1 :           val = PCXHR_FREQ_AES_1;         break;
 209         case PCXHR_CLOCK_TYPE_AES_2 :           val = PCXHR_FREQ_AES_2;         break;
 210         case PCXHR_CLOCK_TYPE_AES_3 :           val = PCXHR_FREQ_AES_3;         break;
 211         case PCXHR_CLOCK_TYPE_AES_4 :           val = PCXHR_FREQ_AES_4;         break;
 212         default : return -EINVAL;
 213         }
 214         *reg = val;
 215         *freq = realfreq;
 216         return 0;
 217 }
 218
 219
 220 int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
 221 {
 222         unsigned int val, realfreq, speed;
 223         struct pcxhr_rmh rmh;
 224         int err, changed;
 225
 226         if (rate == 0)
 227                 return 0; /* nothing to do */
 228
 229         err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq);
 230         if (err)
 231                 return err;
 232
 233         /* codec speed modes */
 234         if (rate < 55000)
 235                 speed = 0;      /* single speed */
 236         else if (rate < 100000)
 237                 speed = 1;      /* dual speed */
 238         else
 239                 speed = 2;      /* quad speed */
 240         if (mgr->codec_speed != speed) {
 241                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* mute outputs */
 242                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
 243                 err = pcxhr_send_msg(mgr, &rmh);
 244                 if (err)
 245                         return err;
 246
 247                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* set speed ratio */
 248                 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
 249                 rmh.cmd[1] = speed;
 250                 rmh.cmd_len = 2;
 251                 err = pcxhr_send_msg(mgr, &rmh);
 252                 if (err)
 253                         return err;
 254         }
 255         /* set the new frequency */
 256         snd_printdd("clock register : set %x\n", val);
 257         err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed);
 258         if (err)
 259                 return err;
 260         mgr->sample_rate_real = realfreq;
 261         mgr->cur_clock_type = mgr->use_clock_type;
 262
 263         /* unmute after codec speed modes */
 264         if (mgr->codec_speed != speed) {
 265                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);       /* unmute outputs */
 266                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
 267                 err = pcxhr_send_msg(mgr, &rmh);
 268                 if (err)
 269                         return err;
 270                 mgr->codec_speed = speed;                       /* save new codec speed */
 271         }
 272
 273         if (changed) {
 274                 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
 275                 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT;         /* resync fifos  */
 276                 if (rate < PCXHR_IRQ_TIMER_FREQ)
 277                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
 278                 else
 279                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
 280                 rmh.cmd[2] = rate;
 281                 rmh.cmd_len = 3;
 282                 err = pcxhr_send_msg(mgr, &rmh);
 283                 if (err)
 284                         return err;
 285         }
 286         snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq);
 287         return 0;
 288 }
 289
 290
 291 int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type,
 292                              int *sample_rate)
 293 {
 294         struct pcxhr_rmh rmh;
 295         unsigned char reg;
 296         int err, rate;
 297
 298         switch (clock_type) {
 299         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      reg = REG_STATUS_WORD_CLOCK;    break;
 300         case PCXHR_CLOCK_TYPE_AES_SYNC :        reg = REG_STATUS_AES_SYNC;      break;
 301         case PCXHR_CLOCK_TYPE_AES_1 :           reg = REG_STATUS_AES_1;         break;
 302         case PCXHR_CLOCK_TYPE_AES_2 :           reg = REG_STATUS_AES_2;         break;
 303         case PCXHR_CLOCK_TYPE_AES_3 :           reg = REG_STATUS_AES_3;         break;
 304         case PCXHR_CLOCK_TYPE_AES_4 :           reg = REG_STATUS_AES_4;         break;
 305         default : return -EINVAL;
 306         }
 307         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
 308         rmh.cmd_len = 2;
 309         rmh.cmd[0] |= IO_NUM_REG_STATUS;
 310         if (mgr->last_reg_stat != reg) {
 311                 rmh.cmd[1]  = reg;
 312                 err = pcxhr_send_msg(mgr, &rmh);
 313                 if (err)
 314                         return err;
 315                 udelay(100);            /* wait minimum 2 sample_frames at 32kHz ! */
 316                 mgr->last_reg_stat = reg;
 317         }
 318         rmh.cmd[1]  = REG_STATUS_CURRENT;
 319         err = pcxhr_send_msg(mgr, &rmh);
 320         if (err)
 321                 return err;
 322         switch (rmh.stat[1] & 0x0f) {
 323         case REG_STATUS_SYNC_32000 :    rate = 32000; break;
 324         case REG_STATUS_SYNC_44100 :    rate = 44100; break;
 325         case REG_STATUS_SYNC_48000 :    rate = 48000; break;
 326         case REG_STATUS_SYNC_64000 :    rate = 64000; break;
 327         case REG_STATUS_SYNC_88200 :    rate = 88200; break;
 328         case REG_STATUS_SYNC_96000 :    rate = 96000; break;
 329         case REG_STATUS_SYNC_128000 :   rate = 128000; break;
 330         case REG_STATUS_SYNC_176400 :   rate = 176400; break;
 331         case REG_STATUS_SYNC_192000 :   rate = 192000; break;
 332         default: rate = 0;
 333         }
 334         snd_printdd("External clock is at %d Hz\n", rate);
 335         *sample_rate = rate;
 336         return 0;
 337 }
 338
 339
 340 /*
 341  *  start or stop playback/capture substream
 342  */
 343 static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
 344 {
 345         int err;
 346         struct snd_pcxhr *chip;
 347         struct pcxhr_rmh rmh;
 348         int stream_mask, start;
 349
 350         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN)
 351                 start = 1;
 352         else {
 353                 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) {
 354                         snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n");
 355                         return -EINVAL;
 356                 }
 357                 start = 0;
 358         }
 359         if (!stream->substream)
 360                 return -EINVAL;
 361
 362         stream->timer_abs_periods = 0;
 363         stream->timer_period_frag = 0;            /* reset theoretical stream pos */
 364         stream->timer_buf_periods = 0;
 365         stream->timer_is_synced = 0;
 366
 367         stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number;
 368
 369         pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
 370         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
 371                                   stream->pipe->first_audio, 0, stream_mask);
 372
 373         chip = snd_pcm_substream_chip(stream->substream);
 374
 375         err = pcxhr_send_msg(chip->mgr, &rmh);
 376         if (err)
 377                 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err);
 378         stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED;
 379         return err;
 380 }
 381
 382 #define HEADER_FMT_BASE_LIN             0xfed00000
 383 #define HEADER_FMT_BASE_FLOAT           0xfad00000
 384 #define HEADER_FMT_INTEL                0x00008000
 385 #define HEADER_FMT_24BITS               0x00004000
 386 #define HEADER_FMT_16BITS               0x00002000
 387 #define HEADER_FMT_UPTO11               0x00000200
 388 #define HEADER_FMT_UPTO32               0x00000100
 389 #define HEADER_FMT_MONO                 0x00000080
 390
 391 static int pcxhr_set_format(struct pcxhr_stream *stream)
 392 {
 393         int err, is_capture, sample_rate, stream_num;
 394         struct snd_pcxhr *chip;
 395         struct pcxhr_rmh rmh;
 396         unsigned int header;
 397
 398         switch (stream->format) {
 399         case SNDRV_PCM_FORMAT_U8:
 400                 header = HEADER_FMT_BASE_LIN;
 401                 break;
 402         case SNDRV_PCM_FORMAT_S16_LE:
 403                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL;
 404                 break;
 405         case SNDRV_PCM_FORMAT_S16_BE:
 406                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS;
 407                 break;
 408         case SNDRV_PCM_FORMAT_S24_3LE:
 409                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL;
 410                 break;
 411         case SNDRV_PCM_FORMAT_S24_3BE:
 412                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS;
 413                 break;
 414         case SNDRV_PCM_FORMAT_FLOAT_LE:
 415                 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL;
 416                 break;
 417         default:
 418                 snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n");
 419                 return -EINVAL;
 420         }
 421         chip = snd_pcm_substream_chip(stream->substream);
 422
 423         sample_rate = chip->mgr->sample_rate;
 424         if (sample_rate <= 32000 && sample_rate !=0) {
 425                 if (sample_rate <= 11025)
 426                         header |= HEADER_FMT_UPTO11;
 427                 else
 428                         header |= HEADER_FMT_UPTO32;
 429         }
 430         if (stream->channels == 1)
 431                 header |= HEADER_FMT_MONO;
 432
 433         is_capture = stream->pipe->is_capture;
 434         stream_num = is_capture ? 0 : stream->substream->number;
 435
 436         pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT);
 437         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
 438         if (is_capture)
 439                 rmh.cmd[0] |= 1<<12;
 440         rmh.cmd[1] = 0;
 441         rmh.cmd[2] = header >> 8;
 442         rmh.cmd[3] = (header & 0xff) << 16;
 443         rmh.cmd_len = 4;
 444         err = pcxhr_send_msg(chip->mgr, &rmh);
 445         if (err)
 446                 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err);
 447         return err;
 448 }
 449
 450 static int pcxhr_update_r_buffer(struct pcxhr_stream *stream)
 451 {
 452         int err, is_capture, stream_num;
 453         struct pcxhr_rmh rmh;
 454         struct snd_pcm_substream *subs = stream->substream;
 455         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 456
 457         is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE);
 458         stream_num = is_capture ? 0 : subs->number;
 459
 460         snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n",
 461                     is_capture ? 'c' : 'p',
 462                     chip->chip_idx, (void*)subs->runtime->dma_addr,
 463                     subs->runtime->dma_bytes, subs->number);
 464
 465         pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
 466         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
 467
 468         snd_assert(subs->runtime->dma_bytes < 0x200000);        /* max buffer size is 2 MByte */
 469         rmh.cmd[1] = subs->runtime->dma_bytes * 8;              /* size in bits */
 470         rmh.cmd[2] = subs->runtime->dma_addr >> 24;             /* most significant byte */
 471         rmh.cmd[2] |= 1<<19;                                    /* this is a circular buffer */
 472         rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;   /* least 3 significant bytes */
 473         rmh.cmd_len = 4;
 474         err = pcxhr_send_msg(chip->mgr, &rmh);
 475         if (err)
 476                 snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err);
 477         return err;
 478 }
 479
 480
 481 #if 0
 482 static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count)
 483 {
 484         struct pcxhr_rmh rmh;
 485         int err;
 486         pcxhr_t *chip = snd_pcm_substream_chip(stream->substream);
 487         pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
 488         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
 489                                   1<<stream->pipe->first_audio);
 490         err = pcxhr_send_msg(chip->mgr, &rmh);
 491         if (err == 0) {
 492                 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
 493                 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
 494         }
 495         snd_printdd("PIPE_SAMPLE_COUNT = %lx\n", *sample_count);
 496         return err;
 497 }
 498 #endif
 499
 500 static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream,
 501                                                   struct pcxhr_pipe **pipe)
 502 {
 503         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) {
 504                 *pipe = stream->pipe;
 505                 return 1;
 506         }
 507         return 0;
 508 }
 509
 510 static void pcxhr_trigger_tasklet(unsigned long arg)
 511 {
 512         unsigned long flags;
 513         int i, j, err;
 514         struct pcxhr_pipe *pipe;
 515         struct snd_pcxhr *chip;
 516         struct pcxhr_mgr *mgr = (struct pcxhr_mgr*)(arg);
 517         int capture_mask = 0;
 518         int playback_mask = 0;
 519
 520 #ifdef CONFIG_SND_DEBUG_DETECT
 521         struct timeval my_tv1, my_tv2;
 522         do_gettimeofday(&my_tv1);
 523 #endif
 524         mutex_lock(&mgr->setup_mutex);
 525
 526         /* check the pipes concerned and build pipe_array */
 527         for (i = 0; i < mgr->num_cards; i++) {
 528                 chip = mgr->chip[i];
 529                 for (j = 0; j < chip->nb_streams_capt; j++) {
 530                         if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe))
 531                                 capture_mask |= (1 << pipe->first_audio);
 532                 }
 533                 for (j = 0; j < chip->nb_streams_play; j++) {
 534                         if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {
 535                                 playback_mask |= (1 << pipe->first_audio);
 536                                 break;  /* add only once, as all playback streams of
 537                                          * one chip use the same pipe
 538                                          */
 539                         }
 540                 }
 541         }
 542         if (capture_mask == 0 && playback_mask == 0) {
 543                 mutex_unlock(&mgr->setup_mutex);
 544                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : no pipes\n");
 545                 return;
 546         }
 547
 548         snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n",
 549                     playback_mask, capture_mask);
 550
 551         /* synchronous stop of all the pipes concerned */
 552         err = pcxhr_set_pipe_state(mgr,  playback_mask, capture_mask, 0);
 553         if (err) {
 554                 mutex_unlock(&mgr->setup_mutex);
 555                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n",
 556                            playback_mask, capture_mask);
 557                 return;
 558         }
 559
 560         /* unfortunately the dsp lost format and buffer info with the stop pipe */
 561         for (i = 0; i < mgr->num_cards; i++) {
 562                 struct pcxhr_stream *stream;
 563                 chip = mgr->chip[i];
 564                 for (j = 0; j < chip->nb_streams_capt; j++) {
 565                         stream = &chip->capture_stream[j];
 566                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
 567                                 err = pcxhr_set_format(stream);
 568                                 err = pcxhr_update_r_buffer(stream);
 569                         }
 570                 }
 571                 for (j = 0; j < chip->nb_streams_play; j++) {
 572                         stream = &chip->playback_stream[j];
 573                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
 574                                 err = pcxhr_set_format(stream);
 575                                 err = pcxhr_update_r_buffer(stream);
 576                         }
 577                 }
 578         }
 579         /* start all the streams */
 580         for (i = 0; i < mgr->num_cards; i++) {
 581                 struct pcxhr_stream *stream;
 582                 chip = mgr->chip[i];
 583                 for (j = 0; j < chip->nb_streams_capt; j++) {
 584                         stream = &chip->capture_stream[j];
 585                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
 586                                 err = pcxhr_set_stream_state(stream);
 587                 }
 588                 for (j = 0; j < chip->nb_streams_play; j++) {
 589                         stream = &chip->playback_stream[j];
 590                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
 591                                 err = pcxhr_set_stream_state(stream);
 592                 }
 593         }
 594
 595         /* synchronous start of all the pipes concerned */
 596         err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
 597         if (err) {
 598                 mutex_unlock(&mgr->setup_mutex);
 599                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n",
 600                            playback_mask, capture_mask);
 601                 return;
 602         }
 603
 604         /* put the streams into the running state now (increment pointer by interrupt) */
 605         spin_lock_irqsave(&mgr->lock, flags);
 606         for ( i =0; i < mgr->num_cards; i++) {
 607                 struct pcxhr_stream *stream;
 608                 chip = mgr->chip[i];
 609                 for(j = 0; j < chip->nb_streams_capt; j++) {
 610                         stream = &chip->capture_stream[j];
 611                         if(stream->status == PCXHR_STREAM_STATUS_STARTED)
 612                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
 613                 }
 614                 for (j = 0; j < chip->nb_streams_play; j++) {
 615                         stream = &chip->playback_stream[j];
 616                         if (stream->status == PCXHR_STREAM_STATUS_STARTED) {
 617                                 /* playback will already have advanced ! */
 618                                 stream->timer_period_frag += PCXHR_GRANULARITY;
 619                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
 620                         }
 621                 }
 622         }
 623         spin_unlock_irqrestore(&mgr->lock, flags);
 624
 625         mutex_unlock(&mgr->setup_mutex);
 626
 627 #ifdef CONFIG_SND_DEBUG_DETECT
 628         do_gettimeofday(&my_tv2);
 629         snd_printdd("***TRIGGER TASKLET*** TIME = %ld (err = %x)\n",
 630                     my_tv2.tv_usec - my_tv1.tv_usec, err);
 631 #endif
 632 }
 633
 634
 635 /*
 636  *  trigger callback
 637  */
 638 static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd)
 639 {
 640         struct pcxhr_stream *stream;
 641         struct list_head *pos;
 642         struct snd_pcm_substream *s;
 643         int i;
 644
 645         switch (cmd) {
 646         case SNDRV_PCM_TRIGGER_START:
 647                 snd_printdd("SNDRV_PCM_TRIGGER_START\n");
 648                 i = 0;
 649                 snd_pcm_group_for_each(pos, subs) {
 650                         s = snd_pcm_group_substream_entry(pos);
 651                         stream = s->runtime->private_data;
 652                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN;
 653                         snd_pcm_trigger_done(s, subs);
 654                         i++;
 655                 }
 656                 if (i==1) {
 657                         snd_printdd("Only one Substream %c %d\n",
 658                                     stream->pipe->is_capture ? 'C' : 'P',
 659                                     stream->pipe->first_audio);
 660                         if (pcxhr_set_format(stream))
 661                                 return -EINVAL;
 662                         if (pcxhr_update_r_buffer(stream))
 663                                 return -EINVAL;
 664
 665                         if (pcxhr_set_stream_state(stream))
 666                                 return -EINVAL;
 667                         stream->status = PCXHR_STREAM_STATUS_RUNNING;
 668                 } else {
 669                         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 670                         tasklet_hi_schedule(&chip->mgr->trigger_taskq);
 671                 }
 672                 break;
 673         case SNDRV_PCM_TRIGGER_STOP:
 674                 snd_printdd("SNDRV_PCM_TRIGGER_STOP\n");
 675                 snd_pcm_group_for_each(pos, subs) {
 676                         s = snd_pcm_group_substream_entry(pos);
 677                         stream = s->runtime->private_data;
 678                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP;
 679                         if (pcxhr_set_stream_state(stream))
 680                                 return -EINVAL;
 681                         snd_pcm_trigger_done(s, subs);
 682                 }
 683                 break;
 684         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 685         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 686                 /* TODO */
 687         default:
 688                 return -EINVAL;
 689         }
 690         return 0;
 691 }
 692
 693
 694 static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start)
 695 {
 696         struct pcxhr_rmh rmh;
 697         int err;
 698
 699         pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
 700         if (start) {
 701                 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID;    /* last dsp time invalid */
 702                 rmh.cmd[0] |= PCXHR_GRANULARITY;
 703         }
 704         err = pcxhr_send_msg(mgr, &rmh);
 705         if (err < 0)
 706                 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err);
 707         return err;
 708 }
 709
 710 /*
 711  *  prepare callback for all pcms
 712  */
 713 static int pcxhr_prepare(struct snd_pcm_substream *subs)
 714 {
 715         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 716         struct pcxhr_mgr *mgr = chip->mgr;
 717         /*
 718         struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data;
 719         */
 720         int err = 0;
 721
 722         snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n",
 723                     subs->runtime->period_size, subs->runtime->periods,
 724                     subs->runtime->buffer_size);
 725
 726         /*
 727         if(subs->runtime->period_size <= PCXHR_GRANULARITY) {
 728                 snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n",
 729                            (unsigned int)subs->runtime->period_size);
 730                 return -EINVAL;
 731         }
 732         */
 733
 734         mutex_lock(&mgr->setup_mutex);
 735
 736         do {
 737                 /* if the stream was stopped before, format and buffer were reset */
 738                 /*
 739                 if(stream->status == PCXHR_STREAM_STATUS_STOPPED) {
 740                         err = pcxhr_set_format(stream);
 741                         if(err) break;
 742                         err = pcxhr_update_r_buffer(stream);
 743                         if(err) break;
 744                 }
 745                 */
 746
 747                 /* only the first stream can choose the sample rate */
 748                 /* the further opened streams will be limited to its frequency (see open) */
 749                 /* set the clock only once (first stream) */
 750                 if (mgr->sample_rate != subs->runtime->rate) {
 751                         err = pcxhr_set_clock(mgr, subs->runtime->rate);
 752                         if (err)
 753                                 break;
 754                         if (mgr->sample_rate == 0)
 755                                 /* start the DSP-timer */
 756                                 err = pcxhr_hardware_timer(mgr, 1);
 757                         mgr->sample_rate = subs->runtime->rate;
 758                 }
 759         } while(0);     /* do only once (so we can use break instead of goto) */
 760
 761         mutex_unlock(&mgr->setup_mutex);
 762
 763         return err;
 764 }
 765
 766
 767 /*
 768  *  HW_PARAMS callback for all pcms
 769  */
 770 static int pcxhr_hw_params(struct snd_pcm_substream *subs,
 771                            struct snd_pcm_hw_params *hw)
 772 {
 773         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 774         struct pcxhr_mgr *mgr = chip->mgr;
 775         struct pcxhr_stream *stream = subs->runtime->private_data;
 776         snd_pcm_format_t format;
 777         int err;
 778         int channels;
 779
 780         /* set up channels */
 781         channels = params_channels(hw);
 782
 783         /*  set up format for the stream */
 784         format = params_format(hw);
 785
 786         mutex_lock(&mgr->setup_mutex);
 787
 788         stream->channels = channels;
 789         stream->format = format;
 790
 791         /* set the format to the board */
 792         /*
 793         err = pcxhr_set_format(stream);
 794         if(err) {
 795                 mutex_unlock(&mgr->setup_mutex);
 796                 return err;
 797         }
 798         */
 799         /* allocate buffer */
 800         err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw));
 801
 802         /*
 803         if (err > 0) {
 804                 err = pcxhr_update_r_buffer(stream);
 805         }
 806         */
 807         mutex_unlock(&mgr->setup_mutex);
 808
 809         return err;
 810 }
 811
 812 static int pcxhr_hw_free(struct snd_pcm_substream *subs)
 813 {
 814         snd_pcm_lib_free_pages(subs);
 815         return 0;
 816 }
 817
 818
 819 /*
 820  *  CONFIGURATION SPACE for all pcms, mono pcm must update channels_max
 821  */
 822 static struct snd_pcm_hardware pcxhr_caps =
 823 {
 824         .info             = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 825                               SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START |
 826                               0 /*SNDRV_PCM_INFO_PAUSE*/),
 827         .formats          = ( SNDRV_PCM_FMTBIT_U8 |
 828                               SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |
 829                               SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |
 830                               SNDRV_PCM_FMTBIT_FLOAT_LE ),
 831         .rates            = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000,
 832         .rate_min         = 8000,
 833         .rate_max         = 192000,
 834         .channels_min     = 1,
 835         .channels_max     = 2,
 836         .buffer_bytes_max = (32*1024),
 837         /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */
 838         .period_bytes_min = (2*PCXHR_GRANULARITY),
 839         .period_bytes_max = (16*1024),
 840         .periods_min      = 2,
 841         .periods_max      = (32*1024/PCXHR_GRANULARITY),
 842 };
 843
 844
 845 static int pcxhr_open(struct snd_pcm_substream *subs)
 846 {
 847         struct snd_pcxhr       *chip = snd_pcm_substream_chip(subs);
 848         struct pcxhr_mgr       *mgr = chip->mgr;
 849         struct snd_pcm_runtime *runtime = subs->runtime;
 850         struct pcxhr_stream    *stream;
 851         int                 is_capture;
 852
 853         mutex_lock(&mgr->setup_mutex);
 854
 855         /* copy the struct snd_pcm_hardware struct */
 856         runtime->hw = pcxhr_caps;
 857
 858         if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) {
 859                 snd_printdd("pcxhr_open playback chip%d subs%d\n",
 860                             chip->chip_idx, subs->number);
 861                 is_capture = 0;
 862                 stream = &chip->playback_stream[subs->number];
 863         } else {
 864                 snd_printdd("pcxhr_open capture chip%d subs%d\n",
 865                             chip->chip_idx, subs->number);
 866                 is_capture = 1;
 867                 if (mgr->mono_capture)
 868                         runtime->hw.channels_max = 1;
 869                 else
 870                         runtime->hw.channels_min = 2;
 871                 stream = &chip->capture_stream[subs->number];
 872         }
 873         if (stream->status != PCXHR_STREAM_STATUS_FREE){
 874                 /* streams in use */
 875                 snd_printk(KERN_ERR "pcxhr_open chip%d subs%d in use\n",
 876                            chip->chip_idx, subs->number);
 877                 mutex_unlock(&mgr->setup_mutex);
 878                 return -EBUSY;
 879         }
 880
 881         /* if a sample rate is already used or fixed by external clock,
 882          * the stream cannot change
 883          */
 884         if (mgr->sample_rate)
 885                 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate;
 886         else {
 887                 if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) {
 888                         int external_rate;
 889                         if (pcxhr_get_external_clock(mgr, mgr->use_clock_type,
 890                                                      &external_rate) ||
 891                             external_rate == 0) {
 892                                 /* cannot detect the external clock rate */
 893                                 mutex_unlock(&mgr->setup_mutex);
 894                                 return -EBUSY;
 895                         }
 896                         runtime->hw.rate_min = runtime->hw.rate_max = external_rate;
 897                 }
 898         }
 899
 900         stream->status      = PCXHR_STREAM_STATUS_OPEN;
 901         stream->substream   = subs;
 902         stream->channels    = 0; /* not configured yet */
 903
 904         runtime->private_data = stream;
 905
 906         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4);
 907         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
 908
 909         mgr->ref_count_rate++;
 910
 911         mutex_unlock(&mgr->setup_mutex);
 912         return 0;
 913 }
 914
 915
 916 static int pcxhr_close(struct snd_pcm_substream *subs)
 917 {
 918         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 919         struct pcxhr_mgr *mgr = chip->mgr;
 920         struct pcxhr_stream *stream = subs->runtime->private_data;
 921
 922         mutex_lock(&mgr->setup_mutex);
 923
 924         snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number);
 925
 926         /* sample rate released */
 927         if (--mgr->ref_count_rate == 0) {
 928                 mgr->sample_rate = 0;           /* the sample rate is no more locked */
 929                 pcxhr_hardware_timer(mgr, 0);   /* stop the DSP-timer */
 930         }
 931
 932         stream->status    = PCXHR_STREAM_STATUS_FREE;
 933         stream->substream = NULL;
 934
 935         mutex_unlock(&mgr->setup_mutex);
 936
 937         return 0;
 938 }
 939
 940
 941 static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs)
 942 {
 943         unsigned long flags;
 944         u_int32_t timer_period_frag;
 945         int timer_buf_periods;
 946         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
 947         struct snd_pcm_runtime *runtime = subs->runtime;
 948         struct pcxhr_stream *stream  = runtime->private_data;
 949
 950         spin_lock_irqsave(&chip->mgr->lock, flags);
 951
 952         /* get the period fragment and the nb of periods in the buffer */
 953         timer_period_frag = stream->timer_period_frag;
 954         timer_buf_periods = stream->timer_buf_periods;
 955
 956         spin_unlock_irqrestore(&chip->mgr->lock, flags);
 957
 958         return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) +
 959                                    timer_period_frag);
 960 }
 961
 962
 963 static struct snd_pcm_ops pcxhr_ops = {
 964         .open      = pcxhr_open,
 965         .close     = pcxhr_close,
 966         .ioctl     = snd_pcm_lib_ioctl,
 967         .prepare   = pcxhr_prepare,
 968         .hw_params = pcxhr_hw_params,
 969         .hw_free   = pcxhr_hw_free,
 970         .trigger   = pcxhr_trigger,
 971         .pointer   = pcxhr_stream_pointer,
 972 };
 973
 974 /*
 975  */
 976 int pcxhr_create_pcm(struct snd_pcxhr *chip)
 977 {
 978         int err;
 979         struct snd_pcm *pcm;
 980         char name[32];
 981
 982         sprintf(name, "pcxhr %d", chip->chip_idx);
 983         if ((err = snd_pcm_new(chip->card, name, 0,
 984                                chip->nb_streams_play,
 985                                chip->nb_streams_capt, &pcm)) < 0) {
 986                 snd_printk(KERN_ERR "cannot create pcm %s\n", name);
 987                 return err;
 988         }
 989         pcm->private_data = chip;
 990
 991         if (chip->nb_streams_play)
 992                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops);
 993         if (chip->nb_streams_capt)
 994                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops);
 995
 996         pcm->info_flags = 0;
 997         strcpy(pcm->name, name);
 998
 999         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1000                                               snd_dma_pci_data(chip->mgr->pci),
1001                                               32*1024, 32*1024);
1002         chip->pcm = pcm;
1003         return 0;
1004 }
1005
1006 static int pcxhr_chip_free(struct snd_pcxhr *chip)
1007 {
1008         kfree(chip);
1009         return 0;
1010 }
1011
1012 static int pcxhr_chip_dev_free(struct snd_device *device)
1013 {
1014         struct snd_pcxhr *chip = device->device_data;
1015         return pcxhr_chip_free(chip);
1016 }
1017
1018
1019 /*
1020  */
1021 static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx)
1022 {
1023         int err;
1024         struct snd_pcxhr *chip;
1025         static struct snd_device_ops ops = {
1026                 .dev_free = pcxhr_chip_dev_free,
1027         };
1028
1029         mgr->chip[idx] = chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1030         if (! chip) {
1031                 snd_printk(KERN_ERR "cannot allocate chip\n");
1032                 return -ENOMEM;
1033         }
1034
1035         chip->card = card;
1036         chip->chip_idx = idx;
1037         chip->mgr = mgr;
1038
1039         if (idx < mgr->playback_chips)
1040                 /* stereo or mono streams */
1041                 chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS;
1042
1043         if (idx < mgr->capture_chips) {
1044                 if (mgr->mono_capture)
1045                         chip->nb_streams_capt = 2;      /* 2 mono streams (left+right) */
1046                 else
1047                         chip->nb_streams_capt = 1;      /* or 1 stereo stream */
1048         }
1049
1050         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1051                 pcxhr_chip_free(chip);
1052                 return err;
1053         }
1054
1055         snd_card_set_dev(card, &mgr->pci->dev);
1056
1057         return 0;
1058 }
1059
1060 /* proc interface */
1061 static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1062 {
1063         struct snd_pcxhr *chip = entry->private_data;
1064         struct pcxhr_mgr *mgr = chip->mgr;
1065
1066         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1067
1068         /* stats available when embedded DSP is running */
1069         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1070                 struct pcxhr_rmh rmh;
1071                 short ver_maj = (mgr->dsp_version >> 16) & 0xff;
1072                 short ver_min = (mgr->dsp_version >> 8) & 0xff;
1073                 short ver_build = mgr->dsp_version & 0xff;
1074                 snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING);
1075                 snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build);
1076                 if (mgr->board_has_analog)
1077                         snd_iprintf(buffer, "analog io available\n");
1078                 else
1079                         snd_iprintf(buffer, "digital only board\n");
1080
1081                 /* calc cpu load of the dsp */
1082                 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1083                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1084                         int cur = rmh.stat[0];
1085                         int ref = rmh.stat[1];
1086                         if (ref > 0) {
1087                                 if (mgr->sample_rate_real != 0 &&
1088                                     mgr->sample_rate_real != 48000) {
1089                                         ref = (ref * 48000) / mgr->sample_rate_real;
1090                                         if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ)
1091                                                 ref *= 2;
1092                                 }
1093                                 cur = 100 - (100 * cur) / ref;
1094                                 snd_iprintf(buffer, "cpu load    %d%%\n", cur);
1095                                 snd_iprintf(buffer, "buffer pool %d/%d kWords\n",
1096                                             rmh.stat[2], rmh.stat[3]);
1097                         }
1098                 }
1099                 snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY);
1100                 snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err);
1101                 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n",
1102                             mgr->async_err_pipe_xrun);
1103                 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n",
1104                             mgr->async_err_stream_xrun);
1105                 snd_iprintf(buffer, "dsp async last other error : %x\n",
1106                             mgr->async_err_other_last);
1107                 /* debug zone dsp */
1108                 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1109                 rmh.cmd_len = 1;
1110                 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1111                 rmh.dsp_stat = 0;
1112                 rmh.cmd_idx = CMD_LAST_INDEX;
1113                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1114                         int i;
1115                         for (i = 0; i < rmh.stat_len; i++)
1116                                 snd_iprintf(buffer, "debug[%02d] = %06x\n", i,  rmh.stat[i]);
1117                 }
1118         } else
1119                 snd_iprintf(buffer, "no firmware loaded\n");
1120         snd_iprintf(buffer, "\n");
1121 }
1122 static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1123 {
1124         struct snd_pcxhr *chip = entry->private_data;
1125         struct pcxhr_mgr *mgr = chip->mgr;
1126         static char *texts[7] = {
1127                 "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4"
1128         };
1129
1130         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1131         snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]);
1132         snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real);
1133
1134         /* commands available when embedded DSP is running */
1135         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1136                 int i, err, sample_rate;
1137                 for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) {
1138                         err = pcxhr_get_external_clock(mgr, i, &sample_rate);
1139                         if (err)
1140                                 break;
1141                         snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate);
1142                 }
1143         } else
1144                 snd_iprintf(buffer, "no firmware loaded\n");
1145         snd_iprintf(buffer, "\n");
1146 }
1147
1148 static void __devinit pcxhr_proc_init(struct snd_pcxhr *chip)
1149 {
1150         struct snd_info_entry *entry;
1151
1152         if (! snd_card_proc_new(chip->card, "info", &entry))
1153                 snd_info_set_text_ops(entry, chip, pcxhr_proc_info);
1154         if (! snd_card_proc_new(chip->card, "sync", &entry))
1155                 snd_info_set_text_ops(entry, chip, pcxhr_proc_sync);
1156 }
1157 /* end of proc interface */
1158
1159 /*
1160  * release all the cards assigned to a manager instance
1161  */
1162 static int pcxhr_free(struct pcxhr_mgr *mgr)
1163 {
1164         unsigned int i;
1165
1166         for (i = 0; i < mgr->num_cards; i++) {
1167                 if (mgr->chip[i])
1168                         snd_card_free(mgr->chip[i]->card);
1169         }
1170
1171         /* reset board if some firmware was loaded */
1172         if(mgr->dsp_loaded) {
1173                 pcxhr_reset_board(mgr);
1174                 snd_printdd("reset pcxhr !\n");
1175         }
1176
1177         /* release irq  */
1178         if (mgr->irq >= 0)
1179                 free_irq(mgr->irq, mgr);
1180
1181         pci_release_regions(mgr->pci);
1182
1183         /* free hostport purgebuffer */
1184         if (mgr->hostport.area) {
1185                 snd_dma_free_pages(&mgr->hostport);
1186                 mgr->hostport.area = NULL;
1187         }
1188
1189         kfree(mgr->prmh);
1190
1191         pci_disable_device(mgr->pci);
1192         kfree(mgr);
1193         return 0;
1194 }
1195
1196 /*
1197  *    probe function - creates the card manager
1198  */
1199 static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1200 {
1201         static int dev;
1202         struct pcxhr_mgr *mgr;
1203         unsigned int i;
1204         int err;
1205         size_t size;
1206         char *card_name;
1207
1208         if (dev >= SNDRV_CARDS)
1209                 return -ENODEV;
1210         if (! enable[dev]) {
1211                 dev++;
1212                 return -ENOENT;
1213         }
1214
1215         /* enable PCI device */
1216         if ((err = pci_enable_device(pci)) < 0)
1217                 return err;
1218         pci_set_master(pci);
1219
1220         /* check if we can restrict PCI DMA transfers to 32 bits */
1221         if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0) {
1222                 snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n");
1223                 pci_disable_device(pci);
1224                 return -ENXIO;
1225         }
1226
1227         /* alloc card manager */
1228         mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
1229         if (! mgr) {
1230                 pci_disable_device(pci);
1231                 return -ENOMEM;
1232         }
1233
1234         snd_assert(pci_id->driver_data < PCI_ID_LAST, return -ENODEV);
1235         card_name = pcxhr_board_params[pci_id->driver_data].board_name;
1236         mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips;
1237         mgr->capture_chips  = pcxhr_board_params[pci_id->driver_data].capture_chips;
1238         mgr->firmware_num  = pcxhr_board_params[pci_id->driver_data].firmware_num;
1239         mgr->mono_capture = mono[dev];
1240
1241         /* resource assignment */
1242         if ((err = pci_request_regions(pci, card_name)) < 0) {
1243                 kfree(mgr);
1244                 pci_disable_device(pci);
1245                 return err;
1246         }
1247         for (i = 0; i < 3; i++)
1248                 mgr->port[i] = pci_resource_start(pci, i);
1249
1250         mgr->pci = pci;
1251         mgr->irq = -1;
1252
1253         if (request_irq(pci->irq, pcxhr_interrupt, IRQF_DISABLED|IRQF_SHARED,
1254                         card_name, mgr)) {
1255                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1256                 pcxhr_free(mgr);
1257                 return -EBUSY;
1258         }
1259         mgr->irq = pci->irq;
1260
1261         sprintf(mgr->shortname, "Digigram %s", card_name);
1262         sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname,
1263                 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq);
1264
1265         /* ISR spinlock  */
1266         spin_lock_init(&mgr->lock);
1267         spin_lock_init(&mgr->msg_lock);
1268
1269         /* init setup mutex*/
1270         mutex_init(&mgr->setup_mutex);
1271
1272         /* init taslket */
1273         tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr);
1274         tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr);
1275         mgr->prmh = kmalloc(sizeof(*mgr->prmh) +
1276                             sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS),
1277                             GFP_KERNEL);
1278         if (! mgr->prmh) {
1279                 pcxhr_free(mgr);
1280                 return -ENOMEM;
1281         }
1282
1283         for (i=0; i < PCXHR_MAX_CARDS; i++) {
1284                 struct snd_card *card;
1285                 char tmpid[16];
1286                 int idx;
1287
1288                 if (i >= max(mgr->playback_chips, mgr->capture_chips))
1289                         break;
1290                 mgr->num_cards++;
1291
1292                 if (index[dev] < 0)
1293                         idx = index[dev];
1294                 else
1295                         idx = index[dev] + i;
1296
1297                 snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i);
1298                 card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
1299
1300                 if (! card) {
1301                         snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
1302                         pcxhr_free(mgr);
1303                         return -ENOMEM;
1304                 }
1305
1306                 strcpy(card->driver, DRIVER_NAME);
1307                 sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i);
1308                 sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i);
1309
1310                 if ((err = pcxhr_create(mgr, card, i)) < 0) {
1311                         pcxhr_free(mgr);
1312                         return err;
1313                 }
1314
1315                 if (i == 0)
1316                         /* init proc interface only for chip0 */
1317                         pcxhr_proc_init(mgr->chip[i]);
1318
1319                 if ((err = snd_card_register(card)) < 0) {
1320                         pcxhr_free(mgr);
1321                         return err;
1322                 }
1323         }
1324
1325         /* create hostport purgebuffer */
1326         size = PAGE_ALIGN(sizeof(struct pcxhr_hostport));
1327         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1328                                 size, &mgr->hostport) < 0) {
1329                 pcxhr_free(mgr);
1330                 return -ENOMEM;
1331         }
1332         /* init purgebuffer */
1333         memset(mgr->hostport.area, 0, size);
1334
1335         /* create a DSP loader */
1336         err = pcxhr_setup_firmware(mgr);
1337         if (err < 0) {
1338                 pcxhr_free(mgr);
1339                 return err;
1340         }
1341
1342         pci_set_drvdata(pci, mgr);
1343         dev++;
1344         return 0;
1345 }
1346
1347 static void __devexit pcxhr_remove(struct pci_dev *pci)
1348 {
1349         pcxhr_free(pci_get_drvdata(pci));
1350         pci_set_drvdata(pci, NULL);
1351 }
1352
1353 static struct pci_driver driver = {
1354         .name = "Digigram pcxhr",
1355         .id_table = pcxhr_ids,
1356         .probe = pcxhr_probe,
1357         .remove = __devexit_p(pcxhr_remove),
1358 };
1359
1360 static int __init pcxhr_module_init(void)
1361 {
1362         return pci_register_driver(&driver);
1363 }
1364
1365 static void __exit pcxhr_module_exit(void)
1366 {
1367         pci_unregister_driver(&driver);
1368 }
1369
1370 module_init(pcxhr_module_init)
1371 module_exit(pcxhr_module_exit)