1 /* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
3 * Serial port driver for the ETRAX 100LX chip
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
21 * Revision 1.22 2004/08/24 06:12:20 starvik
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
27 * Revision 1.19 2004/05/17 13:12:15 starvik
29 * Big merge from Linux 2.4 still pending.
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
272 * Items worth noticing:
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
426 static char *serial_version = "$Revision: 1.25 $";
428 #include <linux/config.h>
429 #include <linux/version.h>
431 #include <linux/types.h>
432 #include <linux/errno.h>
433 #include <linux/signal.h>
434 #include <linux/sched.h>
435 #include <linux/timer.h>
436 #include <linux/interrupt.h>
437 #include <linux/tty.h>
438 #include <linux/tty_flip.h>
439 #include <linux/major.h>
440 #include <linux/string.h>
441 #include <linux/fcntl.h>
442 #include <linux/mm.h>
443 #include <linux/slab.h>
444 #include <linux/init.h>
445 #include <asm/uaccess.h>
446 #include <linux/kernel.h>
450 #include <asm/system.h>
451 #include <asm/segment.h>
452 #include <asm/bitops.h>
453 #include <linux/delay.h>
455 #include <asm/arch/svinto.h>
457 /* non-arch dependent serial structures are in linux/serial.h */
458 #include <linux/serial.h>
459 /* while we keep our own stuff (struct e100_serial) in a local .h file */
461 #include <asm/fasttimer.h>
463 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
464 #ifndef CONFIG_ETRAX_FAST_TIMER
465 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
469 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
470 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
471 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
474 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
475 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
479 * All of the compatibilty code so we can compile serial.c against
480 * older kernels is hidden in serial_compat.h
482 #if defined(LOCAL_HEADERS)
483 #include "serial_compat.h"
486 #define _INLINE_ inline
488 struct tty_driver *serial_driver;
490 /* serial subtype definitions */
491 #ifndef SERIAL_TYPE_NORMAL
492 #define SERIAL_TYPE_NORMAL 1
495 /* number of characters left in xmit buffer before we ask for more */
496 #define WAKEUP_CHARS 256
498 //#define SERIAL_DEBUG_INTR
499 //#define SERIAL_DEBUG_OPEN
500 //#define SERIAL_DEBUG_FLOW
501 //#define SERIAL_DEBUG_DATA
502 //#define SERIAL_DEBUG_THROTTLE
503 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
504 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
506 /* Enable this to use serial interrupts to handle when you
507 expect the first received event on the serial port to
508 be an error, break or similar. Used to be able to flash IRMA
510 #define SERIAL_HANDLE_EARLY_ERRORS
512 /* Defined and used in n_tty.c, but we need it here as well */
513 #define TTY_THRESHOLD_THROTTLE 128
515 /* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
516 * must not be to high or flow control won't work if we leave it to the tty
517 * layer so we have our own throttling in flush_to_flip
518 * TTY_FLIPBUF_SIZE=512,
519 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
520 * BUF_SIZE can't be > 128
522 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
523 #define SERIAL_DESCR_BUF_SIZE 256
525 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
526 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
528 /* We don't want to load the system with massive fast timer interrupt
529 * on high baudrates so limit it to 250 us (4kHz) */
530 #define MIN_FLUSH_TIME_USEC 250
532 /* Add an x here to log a lot of timer stuff */
534 /* Debug details of interrupt handling */
535 #define DINTR1(x) /* irq on/off, errors */
536 #define DINTR2(x) /* tx and rx */
537 /* Debug flip buffer stuff */
539 /* Debug flow control and overview of data flow */
542 #define DLOG_INT_TRIG(x)
544 //#define DEBUG_LOG_INCLUDED
545 #ifndef DEBUG_LOG_INCLUDED
546 #define DEBUG_LOG(line, string, value)
548 struct debug_log_info
551 unsigned long timer_data;
556 #define DEBUG_LOG_SIZE 4096
558 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
559 int debug_log_pos = 0;
561 #define DEBUG_LOG(_line, _string, _value) do { \
562 if ((_line) == SERIAL_DEBUG_LINE) {\
563 debug_log_func(_line, _string, _value); \
567 void debug_log_func(int line, const char *string, int value)
569 if (debug_log_pos < DEBUG_LOG_SIZE) {
570 debug_log[debug_log_pos].time = jiffies;
571 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
572 // debug_log[debug_log_pos].line = line;
573 debug_log[debug_log_pos].string = string;
574 debug_log[debug_log_pos].value = value;
577 /*printk(string, value);*/
581 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
582 /* Default number of timer ticks before flushing rx fifo
583 * When using "little data, low latency applications: use 0
584 * When using "much data applications (PPP)" use ~5
586 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
589 unsigned long timer_data_to_ns(unsigned long timer_data);
591 static void change_speed(struct e100_serial *info);
592 static void rs_throttle(struct tty_struct * tty);
593 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
594 static int rs_write(struct tty_struct * tty, int from_user,
595 const unsigned char *buf, int count);
596 extern _INLINE_ int rs_raw_write(struct tty_struct * tty, int from_user,
597 const unsigned char *buf, int count);
598 #ifdef CONFIG_ETRAX_RS485
599 static int e100_write_rs485(struct tty_struct * tty, int from_user,
600 const unsigned char *buf, int count);
602 static int get_lsr_info(struct e100_serial * info, unsigned int *value);
605 #define DEF_BAUD 115200 /* 115.2 kbit/s */
606 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
607 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
608 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
609 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
611 /* offsets from R_SERIALx_CTRL */
614 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
615 #define REG_TR_DATA 0
617 #define REG_TR_CTRL 1
618 #define REG_REC_CTRL 2
620 #define REG_XOFF 4 /* this is a 32 bit register */
622 /* The bitfields are the same for all serial ports */
623 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
624 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
625 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
626 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
627 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
629 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
631 /* Values for info->errorcode */
632 #define ERRCODE_SET_BREAK (TTY_BREAK)
633 #define ERRCODE_INSERT 0x100
634 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
636 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
639 * General note regarding the use of IO_* macros in this file:
641 * We will use the bits defined for DMA channel 6 when using various
642 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
643 * the same for all channels (which of course they are).
645 * We will also use the bits defined for serial port 0 when writing commands
646 * to the different ports, as these bits too are the same for all ports.
650 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
651 static const unsigned long e100_ser_int_mask = 0
652 #ifdef CONFIG_ETRAX_SERIAL_PORT0
653 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
655 #ifdef CONFIG_ETRAX_SERIAL_PORT1
656 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
658 #ifdef CONFIG_ETRAX_SERIAL_PORT2
659 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
661 #ifdef CONFIG_ETRAX_SERIAL_PORT3
662 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
665 unsigned long r_alt_ser_baudrate_shadow = 0;
667 /* this is the data for the four serial ports in the etrax100 */
668 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
669 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
671 static struct e100_serial rs_table[] = {
673 .port = (unsigned char *)R_SERIAL0_CTRL,
674 .irq = 1U << 12, /* uses DMA 6 and 7 */
675 .oclrintradr = R_DMA_CH6_CLR_INTR,
676 .ofirstadr = R_DMA_CH6_FIRST,
677 .ocmdadr = R_DMA_CH6_CMD,
678 .ostatusadr = R_DMA_CH6_STATUS,
679 .iclrintradr = R_DMA_CH7_CLR_INTR,
680 .ifirstadr = R_DMA_CH7_FIRST,
681 .icmdadr = R_DMA_CH7_CMD,
682 .idescradr = R_DMA_CH7_DESCR,
687 #ifdef CONFIG_ETRAX_SERIAL_PORT0
689 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
690 .dma_out_enabled = 1,
692 .dma_out_enabled = 0,
694 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
701 .dma_out_enabled = 0,
706 #ifndef CONFIG_SVINTO_SIM
708 .port = (unsigned char *)R_SERIAL1_CTRL,
709 .irq = 1U << 16, /* uses DMA 8 and 9 */
710 .oclrintradr = R_DMA_CH8_CLR_INTR,
711 .ofirstadr = R_DMA_CH8_FIRST,
712 .ocmdadr = R_DMA_CH8_CMD,
713 .ostatusadr = R_DMA_CH8_STATUS,
714 .iclrintradr = R_DMA_CH9_CLR_INTR,
715 .ifirstadr = R_DMA_CH9_FIRST,
716 .icmdadr = R_DMA_CH9_CMD,
717 .idescradr = R_DMA_CH9_DESCR,
722 #ifdef CONFIG_ETRAX_SERIAL_PORT1
724 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
725 .dma_out_enabled = 1,
727 .dma_out_enabled = 0,
729 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
736 .dma_out_enabled = 0,
742 .port = (unsigned char *)R_SERIAL2_CTRL,
743 .irq = 1U << 4, /* uses DMA 2 and 3 */
744 .oclrintradr = R_DMA_CH2_CLR_INTR,
745 .ofirstadr = R_DMA_CH2_FIRST,
746 .ocmdadr = R_DMA_CH2_CMD,
747 .ostatusadr = R_DMA_CH2_STATUS,
748 .iclrintradr = R_DMA_CH3_CLR_INTR,
749 .ifirstadr = R_DMA_CH3_FIRST,
750 .icmdadr = R_DMA_CH3_CMD,
751 .idescradr = R_DMA_CH3_DESCR,
756 #ifdef CONFIG_ETRAX_SERIAL_PORT2
758 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
759 .dma_out_enabled = 1,
761 .dma_out_enabled = 0,
763 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
770 .dma_out_enabled = 0,
776 .port = (unsigned char *)R_SERIAL3_CTRL,
777 .irq = 1U << 8, /* uses DMA 4 and 5 */
778 .oclrintradr = R_DMA_CH4_CLR_INTR,
779 .ofirstadr = R_DMA_CH4_FIRST,
780 .ocmdadr = R_DMA_CH4_CMD,
781 .ostatusadr = R_DMA_CH4_STATUS,
782 .iclrintradr = R_DMA_CH5_CLR_INTR,
783 .ifirstadr = R_DMA_CH5_FIRST,
784 .icmdadr = R_DMA_CH5_CMD,
785 .idescradr = R_DMA_CH5_DESCR,
790 #ifdef CONFIG_ETRAX_SERIAL_PORT3
792 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
793 .dma_out_enabled = 1,
795 .dma_out_enabled = 0,
797 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
804 .dma_out_enabled = 0,
812 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
814 static struct termios *serial_termios[NR_PORTS];
815 static struct termios *serial_termios_locked[NR_PORTS];
816 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
817 static struct fast_timer fast_timers[NR_PORTS];
820 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
821 #define PROCSTAT(x) x
822 struct ser_statistics_type {
824 int early_errors_cnt;
827 unsigned long int processing_flip;
828 unsigned long processing_flip_still_room;
829 unsigned long int timeout_flush_cnt;
836 static struct ser_statistics_type ser_stat[NR_PORTS];
842 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
845 #if defined(CONFIG_ETRAX_RS485)
846 #ifdef CONFIG_ETRAX_FAST_TIMER
847 static struct fast_timer fast_timers_rs485[NR_PORTS];
849 #if defined(CONFIG_ETRAX_RS485_ON_PA)
850 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
852 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
853 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
857 /* Info and macros needed for each ports extra control/status signals. */
858 #define E100_STRUCT_PORT(line, pinname) \
859 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
860 (R_PORT_PA_DATA): ( \
861 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
862 (R_PORT_PB_DATA):&dummy_ser[line]))
864 #define E100_STRUCT_SHADOW(line, pinname) \
865 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
866 (&port_pa_data_shadow): ( \
867 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
868 (&port_pb_data_shadow):&dummy_ser[line]))
869 #define E100_STRUCT_MASK(line, pinname) \
870 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
871 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
872 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
873 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
875 #define DUMMY_DTR_MASK 1
876 #define DUMMY_RI_MASK 2
877 #define DUMMY_DSR_MASK 4
878 #define DUMMY_CD_MASK 8
879 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
881 /* If not all status pins are used or disabled, use mixed mode */
882 #ifdef CONFIG_ETRAX_SERIAL_PORT0
884 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
886 #if SER0_PA_BITSUM != -4
887 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
888 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
889 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
892 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
893 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
894 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
897 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
898 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
899 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
902 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
903 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
904 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
909 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
911 #if SER0_PB_BITSUM != -4
912 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
913 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
914 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
917 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
918 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
919 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
922 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
923 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
924 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
927 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
928 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
929 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
937 #ifdef CONFIG_ETRAX_SERIAL_PORT1
939 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
941 #if SER1_PA_BITSUM != -4
942 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
943 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
944 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
947 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
948 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
949 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
952 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
953 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
954 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
957 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
958 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
959 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
964 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
966 #if SER1_PB_BITSUM != -4
967 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
968 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
969 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
972 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
973 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
974 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
977 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
978 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
979 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
982 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
983 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
984 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
991 #ifdef CONFIG_ETRAX_SERIAL_PORT2
993 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
995 #if SER2_PA_BITSUM != -4
996 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
997 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
998 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1001 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
1002 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1003 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1006 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1007 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1008 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1011 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1012 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1013 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1018 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1020 #if SER2_PB_BITSUM != -4
1021 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1022 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1023 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1026 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1027 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1028 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1031 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1032 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1033 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1036 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1037 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1038 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1045 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1047 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1049 #if SER3_PA_BITSUM != -4
1050 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1051 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1052 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1055 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1056 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1057 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1060 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1061 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1062 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1065 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1066 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1067 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1072 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1074 #if SER3_PB_BITSUM != -4
1075 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1076 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1077 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1080 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1081 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1082 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1085 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1086 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1087 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1090 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1091 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1092 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1100 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1101 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1102 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1103 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1104 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1107 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1108 /* The pins can be mixed on PA and PB */
1109 #define CONTROL_PINS_PORT_NOT_USED(line) \
1110 &dummy_ser[line], &dummy_ser[line], \
1111 &dummy_ser[line], &dummy_ser[line], \
1112 &dummy_ser[line], &dummy_ser[line], \
1113 &dummy_ser[line], &dummy_ser[line], \
1114 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1119 volatile unsigned char *dtr_port;
1120 unsigned char *dtr_shadow;
1121 volatile unsigned char *ri_port;
1122 unsigned char *ri_shadow;
1123 volatile unsigned char *dsr_port;
1124 unsigned char *dsr_shadow;
1125 volatile unsigned char *cd_port;
1126 unsigned char *cd_shadow;
1128 unsigned char dtr_mask;
1129 unsigned char ri_mask;
1130 unsigned char dsr_mask;
1131 unsigned char cd_mask;
1134 static const struct control_pins e100_modem_pins[NR_PORTS] =
1138 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1139 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1140 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1141 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1142 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1143 E100_STRUCT_MASK(0,DTR),
1144 E100_STRUCT_MASK(0,RI),
1145 E100_STRUCT_MASK(0,DSR),
1146 E100_STRUCT_MASK(0,CD)
1148 CONTROL_PINS_PORT_NOT_USED(0)
1154 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1155 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1156 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1157 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1158 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1159 E100_STRUCT_MASK(1,DTR),
1160 E100_STRUCT_MASK(1,RI),
1161 E100_STRUCT_MASK(1,DSR),
1162 E100_STRUCT_MASK(1,CD)
1164 CONTROL_PINS_PORT_NOT_USED(1)
1170 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1171 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1172 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1173 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1174 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1175 E100_STRUCT_MASK(2,DTR),
1176 E100_STRUCT_MASK(2,RI),
1177 E100_STRUCT_MASK(2,DSR),
1178 E100_STRUCT_MASK(2,CD)
1180 CONTROL_PINS_PORT_NOT_USED(2)
1186 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1187 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1188 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1189 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1190 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1191 E100_STRUCT_MASK(3,DTR),
1192 E100_STRUCT_MASK(3,RI),
1193 E100_STRUCT_MASK(3,DSR),
1194 E100_STRUCT_MASK(3,CD)
1196 CONTROL_PINS_PORT_NOT_USED(3)
1200 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1202 /* All pins are on either PA or PB for each serial port */
1203 #define CONTROL_PINS_PORT_NOT_USED(line) \
1204 &dummy_ser[line], &dummy_ser[line], \
1205 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1210 volatile unsigned char *port;
1211 unsigned char *shadow;
1213 unsigned char dtr_mask;
1214 unsigned char ri_mask;
1215 unsigned char dsr_mask;
1216 unsigned char cd_mask;
1219 #define dtr_port port
1220 #define dtr_shadow shadow
1221 #define ri_port port
1222 #define ri_shadow shadow
1223 #define dsr_port port
1224 #define dsr_shadow shadow
1225 #define cd_port port
1226 #define cd_shadow shadow
1228 static const struct control_pins e100_modem_pins[NR_PORTS] =
1232 #ifdef CONFIG_ETRAX_SERIAL_PORT0
1233 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1234 E100_STRUCT_MASK(0,DTR),
1235 E100_STRUCT_MASK(0,RI),
1236 E100_STRUCT_MASK(0,DSR),
1237 E100_STRUCT_MASK(0,CD)
1239 CONTROL_PINS_PORT_NOT_USED(0)
1245 #ifdef CONFIG_ETRAX_SERIAL_PORT1
1246 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1247 E100_STRUCT_MASK(1,DTR),
1248 E100_STRUCT_MASK(1,RI),
1249 E100_STRUCT_MASK(1,DSR),
1250 E100_STRUCT_MASK(1,CD)
1252 CONTROL_PINS_PORT_NOT_USED(1)
1258 #ifdef CONFIG_ETRAX_SERIAL_PORT2
1259 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1260 E100_STRUCT_MASK(2,DTR),
1261 E100_STRUCT_MASK(2,RI),
1262 E100_STRUCT_MASK(2,DSR),
1263 E100_STRUCT_MASK(2,CD)
1265 CONTROL_PINS_PORT_NOT_USED(2)
1271 #ifdef CONFIG_ETRAX_SERIAL_PORT3
1272 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1273 E100_STRUCT_MASK(3,DTR),
1274 E100_STRUCT_MASK(3,RI),
1275 E100_STRUCT_MASK(3,DSR),
1276 E100_STRUCT_MASK(3,CD)
1278 CONTROL_PINS_PORT_NOT_USED(3)
1282 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1284 #define E100_RTS_MASK 0x20
1285 #define E100_CTS_MASK 0x40
1287 /* All serial port signals are active low:
1288 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1289 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1291 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1295 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1297 #define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1299 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1301 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1303 /* Normally inputs */
1304 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1305 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1308 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1312 * tmp_buf is used as a temporary buffer by serial_write. We need to
1313 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1314 * and some other program tries to do a serial write at the same time.
1315 * Since the lock will only come under contention when the system is
1316 * swapping and available memory is low, it makes sense to share one
1317 * buffer across all the serial ports, since it significantly saves
1318 * memory if large numbers of serial ports are open.
1320 static unsigned char *tmp_buf;
1321 #ifdef DECLARE_MUTEX
1322 static DECLARE_MUTEX(tmp_buf_sem);
1324 static struct semaphore tmp_buf_sem = MUTEX;
1327 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
1328 static void update_char_time(struct e100_serial * info)
1330 tcflag_t cflags = info->tty->termios->c_cflag;
1333 /* calc. number of bits / data byte */
1334 /* databits + startbit and 1 stopbit */
1335 if ((cflags & CSIZE) == CS7)
1340 if (cflags & CSTOPB) /* 2 stopbits ? */
1343 if (cflags & PARENB) /* parity bit ? */
1347 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1348 info->flush_time_usec = 4*info->char_time_usec;
1349 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1350 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1355 * This function maps from the Bxxxx defines in asm/termbits.h into real
1360 cflag_to_baud(unsigned int cflag)
1362 static int baud_table[] = {
1363 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1364 4800, 9600, 19200, 38400 };
1366 static int ext_baud_table[] = {
1367 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1368 0, 0, 0, 0, 0, 0, 0, 0 };
1370 if (cflag & CBAUDEX)
1371 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1373 return baud_table[cflag & CBAUD];
1376 /* and this maps to an etrax100 hardware baud constant */
1378 static unsigned char
1379 cflag_to_etrax_baud(unsigned int cflag)
1383 static char baud_table[] = {
1384 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1386 static char ext_baud_table[] = {
1387 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1389 if (cflag & CBAUDEX)
1390 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1392 retval = baud_table[cflag & CBAUD];
1395 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1396 retval = 5; /* choose default 9600 instead */
1399 return retval | (retval << 4); /* choose same for both TX and RX */
1403 /* Various static support functions */
1405 /* Functions to set or clear DTR/RTS on the requested line */
1406 /* It is complicated by the fact that RTS is a serial port register, while
1407 * DTR might not be implemented in the HW at all, and if it is, it can be on
1413 e100_dtr(struct e100_serial *info, int set)
1415 #ifndef CONFIG_SVINTO_SIM
1416 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1418 #ifdef SERIAL_DEBUG_IO
1419 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1420 printk("ser%i shadow before 0x%02X get: %i\n",
1421 info->line, *e100_modem_pins[info->line].dtr_shadow,
1422 E100_DTR_GET(info));
1424 /* DTR is active low */
1426 unsigned long flags;
1430 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1431 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1432 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1433 restore_flags(flags);
1436 #ifdef SERIAL_DEBUG_IO
1437 printk("ser%i shadow after 0x%02X get: %i\n",
1438 info->line, *e100_modem_pins[info->line].dtr_shadow,
1439 E100_DTR_GET(info));
1444 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1448 e100_rts(struct e100_serial *info, int set)
1450 #ifndef CONFIG_SVINTO_SIM
1451 unsigned long flags;
1454 info->rx_ctrl &= ~E100_RTS_MASK;
1455 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1456 info->port[REG_REC_CTRL] = info->rx_ctrl;
1457 restore_flags(flags);
1458 #ifdef SERIAL_DEBUG_IO
1459 printk("ser%i rts %i\n", info->line, set);
1465 /* If this behaves as a modem, RI and CD is an output */
1467 e100_ri_out(struct e100_serial *info, int set)
1469 #ifndef CONFIG_SVINTO_SIM
1470 /* RI is active low */
1472 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1473 unsigned long flags;
1477 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1478 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1479 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1480 restore_flags(flags);
1485 e100_cd_out(struct e100_serial *info, int set)
1487 #ifndef CONFIG_SVINTO_SIM
1488 /* CD is active low */
1490 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1491 unsigned long flags;
1495 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1496 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1497 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1498 restore_flags(flags);
1504 e100_disable_rx(struct e100_serial *info)
1506 #ifndef CONFIG_SVINTO_SIM
1507 /* disable the receiver */
1508 info->port[REG_REC_CTRL] =
1509 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1514 e100_enable_rx(struct e100_serial *info)
1516 #ifndef CONFIG_SVINTO_SIM
1517 /* enable the receiver */
1518 info->port[REG_REC_CTRL] =
1519 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1523 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1526 e100_disable_rxdma_irq(struct e100_serial *info)
1528 #ifdef SERIAL_DEBUG_INTR
1529 printk("rxdma_irq(%d): 0\n",info->line);
1531 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1532 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1536 e100_enable_rxdma_irq(struct e100_serial *info)
1538 #ifdef SERIAL_DEBUG_INTR
1539 printk("rxdma_irq(%d): 1\n",info->line);
1541 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1542 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1545 /* the tx DMA uses only dma_descr interrupt */
1547 static _INLINE_ void
1548 e100_disable_txdma_irq(struct e100_serial *info)
1550 #ifdef SERIAL_DEBUG_INTR
1551 printk("txdma_irq(%d): 0\n",info->line);
1553 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1554 *R_IRQ_MASK2_CLR = info->irq;
1557 static _INLINE_ void
1558 e100_enable_txdma_irq(struct e100_serial *info)
1560 #ifdef SERIAL_DEBUG_INTR
1561 printk("txdma_irq(%d): 1\n",info->line);
1563 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1564 *R_IRQ_MASK2_SET = info->irq;
1567 static _INLINE_ void
1568 e100_disable_txdma_channel(struct e100_serial *info)
1570 unsigned long flags;
1572 /* Disable output DMA channel for the serial port in question
1573 * ( set to something other then serialX)
1577 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1578 if (info->line == 0) {
1579 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1580 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1581 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1582 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1584 } else if (info->line == 1) {
1585 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1586 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1587 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1588 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1590 } else if (info->line == 2) {
1591 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1592 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1593 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1594 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1596 } else if (info->line == 3) {
1597 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1598 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1599 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1600 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1603 *R_GEN_CONFIG = genconfig_shadow;
1604 restore_flags(flags);
1608 static _INLINE_ void
1609 e100_enable_txdma_channel(struct e100_serial *info)
1611 unsigned long flags;
1615 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1616 /* Enable output DMA channel for the serial port in question */
1617 if (info->line == 0) {
1618 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1619 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1620 } else if (info->line == 1) {
1621 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1622 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1623 } else if (info->line == 2) {
1624 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1625 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1626 } else if (info->line == 3) {
1627 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1628 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1630 *R_GEN_CONFIG = genconfig_shadow;
1631 restore_flags(flags);
1634 static _INLINE_ void
1635 e100_disable_rxdma_channel(struct e100_serial *info)
1637 unsigned long flags;
1639 /* Disable input DMA channel for the serial port in question
1640 * ( set to something other then serialX)
1644 if (info->line == 0) {
1645 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1646 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1647 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1648 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1650 } else if (info->line == 1) {
1651 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1652 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1653 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1654 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1656 } else if (info->line == 2) {
1657 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1658 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1659 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1660 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1662 } else if (info->line == 3) {
1663 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1664 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1665 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1666 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1669 *R_GEN_CONFIG = genconfig_shadow;
1670 restore_flags(flags);
1674 static _INLINE_ void
1675 e100_enable_rxdma_channel(struct e100_serial *info)
1677 unsigned long flags;
1681 /* Enable input DMA channel for the serial port in question */
1682 if (info->line == 0) {
1683 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1684 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1685 } else if (info->line == 1) {
1686 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1687 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1688 } else if (info->line == 2) {
1689 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1690 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1691 } else if (info->line == 3) {
1692 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1693 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1695 *R_GEN_CONFIG = genconfig_shadow;
1696 restore_flags(flags);
1699 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1700 /* in order to detect and fix errors on the first byte
1701 we have to use the serial interrupts as well. */
1704 e100_disable_serial_data_irq(struct e100_serial *info)
1706 #ifdef SERIAL_DEBUG_INTR
1707 printk("ser_irq(%d): 0\n",info->line);
1709 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1710 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1714 e100_enable_serial_data_irq(struct e100_serial *info)
1716 #ifdef SERIAL_DEBUG_INTR
1717 printk("ser_irq(%d): 1\n",info->line);
1718 printk("**** %d = %d\n",
1720 (1U << (8+2*info->line)));
1722 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1723 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1728 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1730 #ifdef SERIAL_DEBUG_INTR
1731 printk("ser_tx_irq(%d): 0\n",info->line);
1733 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1734 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1738 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1740 #ifdef SERIAL_DEBUG_INTR
1741 printk("ser_tx_irq(%d): 1\n",info->line);
1742 printk("**** %d = %d\n",
1744 (1U << (8+1+2*info->line)));
1746 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1747 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1750 static inline void e100_enable_rx_irq(struct e100_serial *info)
1752 if (info->uses_dma_in)
1753 e100_enable_rxdma_irq(info);
1755 e100_enable_serial_data_irq(info);
1757 static inline void e100_disable_rx_irq(struct e100_serial *info)
1759 if (info->uses_dma_in)
1760 e100_disable_rxdma_irq(info);
1762 e100_disable_serial_data_irq(info);
1765 #if defined(CONFIG_ETRAX_RS485)
1766 /* Enable RS-485 mode on selected port. This is UGLY. */
1768 e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1770 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1772 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1773 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1775 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1776 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1777 rs485_port_g_bit, 1);
1779 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1780 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1781 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1782 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1783 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1786 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1787 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1788 if (r->delay_rts_before_send >= 1000)
1789 info->rs485.delay_rts_before_send = 1000;
1791 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1792 info->rs485.enabled = r->enabled;
1793 /* printk("rts: on send = %i, after = %i, enabled = %i",
1794 info->rs485.rts_on_send,
1795 info->rs485.rts_after_sent,
1803 e100_write_rs485(struct tty_struct *tty, int from_user,
1804 const unsigned char *buf, int count)
1806 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1807 int old_enabled = info->rs485.enabled;
1809 /* rs485 is always implicitly enabled if we're using the ioctl()
1810 * but it doesn't have to be set in the rs485_control
1811 * (to be backward compatible with old apps)
1812 * So we store, set and restore it.
1814 info->rs485.enabled = 1;
1815 /* rs_write now deals with RS485 if enabled */
1816 count = rs_write(tty, from_user, buf, count);
1817 info->rs485.enabled = old_enabled;
1821 #ifdef CONFIG_ETRAX_FAST_TIMER
1822 /* Timer function to toggle RTS when using FAST_TIMER */
1823 static void rs485_toggle_rts_timer_function(unsigned long data)
1825 struct e100_serial *info = (struct e100_serial *)data;
1827 fast_timers_rs485[info->line].function = NULL;
1828 e100_rts(info, info->rs485.rts_after_sent);
1829 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1830 e100_enable_rx(info);
1831 e100_enable_rx_irq(info);
1835 #endif /* CONFIG_ETRAX_RS485 */
1838 * ------------------------------------------------------------
1839 * rs_stop() and rs_start()
1841 * This routines are called before setting or resetting tty->stopped.
1842 * They enable or disable transmitter using the XOFF registers, as necessary.
1843 * ------------------------------------------------------------
1847 rs_stop(struct tty_struct *tty)
1849 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1851 unsigned long flags;
1854 save_flags(flags); cli();
1855 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1856 CIRC_CNT(info->xmit.head,
1857 info->xmit.tail,SERIAL_XMIT_SIZE)));
1859 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1860 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1861 if (tty->termios->c_iflag & IXON ) {
1862 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1865 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1866 restore_flags(flags);
1871 rs_start(struct tty_struct *tty)
1873 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1875 unsigned long flags;
1878 save_flags(flags); cli();
1879 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1880 CIRC_CNT(info->xmit.head,
1881 info->xmit.tail,SERIAL_XMIT_SIZE)));
1882 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1883 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1884 if (tty->termios->c_iflag & IXON ) {
1885 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1888 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1889 if (!info->uses_dma_out &&
1890 info->xmit.head != info->xmit.tail && info->xmit.buf)
1891 e100_enable_serial_tx_ready_irq(info);
1893 restore_flags(flags);
1898 * ----------------------------------------------------------------------
1900 * Here starts the interrupt handling routines. All of the following
1901 * subroutines are declared as inline and are folded into
1902 * rs_interrupt(). They were separated out for readability's sake.
1904 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1905 * runs with interrupts turned off. People who may want to modify
1906 * rs_interrupt() should try to keep the interrupt handler as fast as
1907 * possible. After you are done making modifications, it is not a bad
1910 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1912 * and look at the resulting assemble code in serial.s.
1914 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1915 * -----------------------------------------------------------------------
1919 * This routine is used by the interrupt handler to schedule
1920 * processing in the software interrupt portion of the driver.
1922 static _INLINE_ void
1923 rs_sched_event(struct e100_serial *info,
1926 if (info->event & (1 << event))
1928 info->event |= 1 << event;
1929 schedule_work(&info->work);
1932 /* The output DMA channel is free - use it to send as many chars as possible
1934 * We don't pay attention to info->x_char, which means if the TTY wants to
1935 * use XON/XOFF it will set info->x_char but we won't send any X char!
1937 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1938 * buffer containing the X char, and skip updating xmit. We'd also have to
1939 * check if the last sent char was the X char when we enter this function
1940 * the next time, to avoid updating xmit with the sent X value.
1944 transmit_chars_dma(struct e100_serial *info)
1946 unsigned int c, sentl;
1947 struct etrax_dma_descr *descr;
1949 #ifdef CONFIG_SVINTO_SIM
1950 /* This will output too little if tail is not 0 always since
1951 * we don't reloop to send the other part. Anyway this SHOULD be a
1952 * no-op - transmit_chars_dma would never really be called during sim
1953 * since rs_write does not write into the xmit buffer then.
1955 if (info->xmit.tail)
1956 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1957 if (info->xmit.head != info->xmit.tail) {
1958 SIMCOUT(info->xmit.buf + info->xmit.tail,
1959 CIRC_CNT(info->xmit.head,
1962 info->xmit.head = info->xmit.tail; /* move back head */
1963 info->tr_running = 0;
1967 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1968 *info->oclrintradr =
1969 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1970 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1972 #ifdef SERIAL_DEBUG_INTR
1973 if (info->line == SERIAL_DEBUG_LINE)
1976 if (!info->tr_running) {
1977 /* weirdo... we shouldn't get here! */
1978 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1982 descr = &info->tr_descr;
1984 /* first get the amount of bytes sent during the last DMA transfer,
1985 and update xmit accordingly */
1987 /* if the stop bit was not set, all data has been sent */
1988 if (!(descr->status & d_stop)) {
1989 sentl = descr->sw_len;
1991 /* otherwise we find the amount of data sent here */
1992 sentl = descr->hw_len;
1994 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1997 info->icount.tx += sentl;
1999 /* update xmit buffer */
2000 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
2002 /* if there is only a few chars left in the buf, wake up the blocked
2004 if (CIRC_CNT(info->xmit.head,
2006 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2007 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2009 /* find out the largest amount of consecutive bytes we want to send now */
2011 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
2013 /* Don't send all in one DMA transfer - divide it so we wake up
2014 * application before all is sent
2017 if (c >= 4*WAKEUP_CHARS)
2021 /* our job here is done, don't schedule any new DMA transfer */
2022 info->tr_running = 0;
2024 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2025 if (info->rs485.enabled) {
2026 /* Set a short timer to toggle RTS */
2027 start_one_shot_timer(&fast_timers_rs485[info->line],
2028 rs485_toggle_rts_timer_function,
2029 (unsigned long)info,
2030 info->char_time_usec*2,
2037 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2038 /* set up the descriptor correctly for output */
2039 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2040 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2042 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2045 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2046 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2048 /* DMA is now running (hopefully) */
2049 } /* transmit_chars_dma */
2052 start_transmit(struct e100_serial *info)
2055 if (info->line == SERIAL_DEBUG_LINE)
2059 info->tr_descr.sw_len = 0;
2060 info->tr_descr.hw_len = 0;
2061 info->tr_descr.status = 0;
2062 info->tr_running = 1;
2063 if (info->uses_dma_out)
2064 transmit_chars_dma(info);
2066 e100_enable_serial_tx_ready_irq(info);
2067 } /* start_transmit */
2069 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2070 static int serial_fast_timer_started = 0;
2071 static int serial_fast_timer_expired = 0;
2072 static void flush_timeout_function(unsigned long data);
2073 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2074 unsigned long timer_flags; \
2075 save_flags(timer_flags); \
2077 if (fast_timers[info->line].function == NULL) { \
2078 serial_fast_timer_started++; \
2079 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2080 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2081 start_one_shot_timer(&fast_timers[info->line], \
2082 flush_timeout_function, \
2083 (unsigned long)info, \
2088 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2090 restore_flags(timer_flags); \
2092 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2095 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2096 #define START_FLUSH_FAST_TIMER(info, string)
2099 static struct etrax_recv_buffer *
2100 alloc_recv_buffer(unsigned int size)
2102 struct etrax_recv_buffer *buffer;
2104 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2107 buffer->next = NULL;
2109 buffer->error = TTY_NORMAL;
2115 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2117 unsigned long flags;
2122 if (!info->first_recv_buffer)
2123 info->first_recv_buffer = buffer;
2125 info->last_recv_buffer->next = buffer;
2127 info->last_recv_buffer = buffer;
2129 info->recv_cnt += buffer->length;
2130 if (info->recv_cnt > info->max_recv_cnt)
2131 info->max_recv_cnt = info->recv_cnt;
2133 restore_flags(flags);
2137 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2139 struct etrax_recv_buffer *buffer;
2140 if (info->uses_dma_in) {
2141 if (!(buffer = alloc_recv_buffer(4)))
2145 buffer->error = flag;
2146 buffer->buffer[0] = data;
2148 append_recv_buffer(info, buffer);
2152 struct tty_struct *tty = info->tty;
2153 *tty->flip.char_buf_ptr = data;
2154 *tty->flip.flag_buf_ptr = flag;
2155 tty->flip.flag_buf_ptr++;
2156 tty->flip.char_buf_ptr++;
2164 extern _INLINE_ unsigned int
2165 handle_descr_data(struct e100_serial *info, struct etrax_dma_descr *descr, unsigned int recvl)
2167 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2169 if (info->recv_cnt + recvl > 65536) {
2171 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2175 buffer->length = recvl;
2177 if (info->errorcode == ERRCODE_SET_BREAK)
2178 buffer->error = TTY_BREAK;
2179 info->errorcode = 0;
2181 append_recv_buffer(info, buffer);
2183 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2184 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2186 descr->buf = virt_to_phys(buffer->buffer);
2191 static _INLINE_ unsigned int
2192 handle_all_descr_data(struct e100_serial *info)
2194 struct etrax_dma_descr *descr;
2196 unsigned int ret = 0;
2200 descr = &info->rec_descr[info->cur_rec_descr];
2202 if (descr == phys_to_virt(*info->idescradr))
2205 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2206 info->cur_rec_descr = 0;
2208 /* find out how many bytes were read */
2210 /* if the eop bit was not set, all data has been received */
2211 if (!(descr->status & d_eop)) {
2212 recvl = descr->sw_len;
2214 /* otherwise we find the amount of data received here */
2215 recvl = descr->hw_len;
2218 /* Reset the status information */
2221 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2222 if (info->tty->stopped) {
2223 unsigned char *buf = phys_to_virt(descr->buf);
2224 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2225 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2226 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2231 info->icount.rx += recvl;
2233 ret += handle_descr_data(info, descr, recvl);
2239 static _INLINE_ void
2240 receive_chars_dma(struct e100_serial *info)
2242 struct tty_struct *tty;
2243 unsigned char rstat;
2245 #ifdef CONFIG_SVINTO_SIM
2246 /* No receive in the simulator. Will probably be when the rest of
2247 * the serial interface works, and this piece will just be removed.
2252 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2253 *info->iclrintradr =
2254 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2255 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2258 if (!tty) /* Something wrong... */
2261 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2262 if (info->uses_dma_in)
2263 e100_enable_serial_data_irq(info);
2266 if (info->errorcode == ERRCODE_INSERT_BREAK)
2267 add_char_and_flag(info, '\0', TTY_BREAK);
2269 handle_all_descr_data(info);
2271 /* Read the status register to detect errors */
2272 rstat = info->port[REG_STATUS];
2273 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2274 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2277 if (rstat & SER_ERROR_MASK) {
2278 /* If we got an error, we must reset it by reading the
2281 unsigned char data = info->port[REG_DATA];
2283 PROCSTAT(ser_stat[info->line].errors_cnt++);
2284 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2285 ((rstat & SER_ERROR_MASK) << 8) | data);
2287 if (rstat & SER_PAR_ERR_MASK)
2288 add_char_and_flag(info, data, TTY_PARITY);
2289 else if (rstat & SER_OVERRUN_MASK)
2290 add_char_and_flag(info, data, TTY_OVERRUN);
2291 else if (rstat & SER_FRAMING_ERR_MASK)
2292 add_char_and_flag(info, data, TTY_FRAME);
2295 START_FLUSH_FAST_TIMER(info, "receive_chars");
2297 /* Restart the receiving DMA */
2298 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2302 start_recv_dma(struct e100_serial *info)
2304 struct etrax_dma_descr *descr = info->rec_descr;
2305 struct etrax_recv_buffer *buffer;
2308 /* Set up the receiving descriptors */
2309 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2310 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2311 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2313 descr[i].ctrl = d_int;
2314 descr[i].buf = virt_to_phys(buffer->buffer);
2315 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2316 descr[i].hw_len = 0;
2317 descr[i].status = 0;
2318 descr[i].next = virt_to_phys(&descr[i+1]);
2321 /* Link the last descriptor to the first */
2322 descr[i-1].next = virt_to_phys(&descr[0]);
2324 /* Start with the first descriptor in the list */
2325 info->cur_rec_descr = 0;
2328 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2329 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2331 /* Input DMA should be running now */
2336 start_receive(struct e100_serial *info)
2338 #ifdef CONFIG_SVINTO_SIM
2339 /* No receive in the simulator. Will probably be when the rest of
2340 * the serial interface works, and this piece will just be removed.
2344 info->tty->flip.count = 0;
2345 if (info->uses_dma_in) {
2346 /* reset the input dma channel to be sure it works */
2348 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2349 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2350 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2352 start_recv_dma(info);
2357 static _INLINE_ void
2358 status_handle(struct e100_serial *info, unsigned short status)
2362 /* the bits in the MASK2 register are laid out like this:
2363 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2364 where I is the input channel and O is the output channel for the port.
2365 info->irq is the bit number for the DMAO_DESCR so to check the others we
2366 shift info->irq to the left.
2369 /* dma output channel interrupt handler
2370 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2371 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2375 tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2377 struct e100_serial *info;
2382 #ifdef CONFIG_SVINTO_SIM
2383 /* No receive in the simulator. Will probably be when the rest of
2384 * the serial interface works, and this piece will just be removed.
2387 const char *s = "What? tr_interrupt in simulator??\n";
2388 SIMCOUT(s,strlen(s));
2393 /* find out the line that caused this irq and get it from rs_table */
2395 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2397 for (i = 0; i < NR_PORTS; i++) {
2398 info = rs_table + i;
2399 if (!info->enabled || !info->uses_dma_out)
2401 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2402 if (ireg & info->irq) {
2404 /* we can send a new dma bunch. make it so. */
2405 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2406 /* Read jiffies_usec first,
2407 * we want this time to be as late as possible
2409 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2410 info->last_tx_active_usec = GET_JIFFIES_USEC();
2411 info->last_tx_active = jiffies;
2412 transmit_chars_dma(info);
2415 /* FIXME: here we should really check for a change in the
2416 status lines and if so call status_handle(info) */
2418 return IRQ_RETVAL(handled);
2419 } /* tr_interrupt */
2421 /* dma input channel interrupt handler */
2424 rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2426 struct e100_serial *info;
2431 #ifdef CONFIG_SVINTO_SIM
2432 /* No receive in the simulator. Will probably be when the rest of
2433 * the serial interface works, and this piece will just be removed.
2436 const char *s = "What? rec_interrupt in simulator??\n";
2437 SIMCOUT(s,strlen(s));
2442 /* find out the line that caused this irq and get it from rs_table */
2444 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2446 for (i = 0; i < NR_PORTS; i++) {
2447 info = rs_table + i;
2448 if (!info->enabled || !info->uses_dma_in)
2450 /* check for both dma_eop and dma_descr for the input dma channel */
2451 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2453 /* we have received something */
2454 receive_chars_dma(info);
2457 /* FIXME: here we should really check for a change in the
2458 status lines and if so call status_handle(info) */
2460 return IRQ_RETVAL(handled);
2461 } /* rec_interrupt */
2464 force_eop_if_needed(struct e100_serial *info)
2466 /* We check data_avail bit to determine if data has
2467 * arrived since last time
2469 unsigned char rstat = info->port[REG_STATUS];
2471 /* error or datavail? */
2472 if (rstat & SER_ERROR_MASK) {
2473 /* Some error has occurred. If there has been valid data, an
2474 * EOP interrupt will be made automatically. If no data, the
2475 * normal ser_interrupt should be enabled and handle it.
2478 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2479 rstat | (info->line << 8));
2483 if (rstat & SER_DATA_AVAIL_MASK) {
2484 /* Ok data, no error, count it */
2485 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2486 rstat | (info->line << 8)));
2487 /* Read data to clear status flags */
2488 (void)info->port[REG_DATA];
2490 info->forced_eop = 0;
2491 START_FLUSH_FAST_TIMER(info, "magic");
2495 /* hit the timeout, force an EOP for the input
2496 * dma channel if we haven't already
2498 if (!info->forced_eop) {
2499 info->forced_eop = 1;
2500 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2501 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2508 extern _INLINE_ void
2509 flush_to_flip_buffer(struct e100_serial *info)
2511 struct tty_struct *tty;
2512 struct etrax_recv_buffer *buffer;
2513 unsigned int length;
2514 unsigned long flags;
2517 if (!info->first_recv_buffer)
2523 if (!(tty = info->tty)) {
2524 restore_flags(flags);
2528 length = tty->flip.count;
2529 /* Don't flip more than the ldisc has room for.
2530 * The return value from ldisc.receive_room(tty) - might not be up to
2531 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2532 * processed and not accounted for yet.
2533 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2534 * Lets buffer data here and let flow control take care of it.
2535 * Since we normally flip large chunks, the ldisc don't react
2536 * with throttle until too late if we flip to much.
2538 max_flip_size = tty->ldisc.receive_room(tty);
2539 if (max_flip_size < 0)
2541 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2542 length + info->recv_cnt + /* We have this queued */
2543 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2544 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2545 /* check TTY_THROTTLED first so it indicates our state */
2546 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2547 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2551 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2552 length + info->recv_cnt + /* We have this queued */
2553 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2554 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2555 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2561 if (max_flip_size > TTY_FLIPBUF_SIZE)
2562 max_flip_size = TTY_FLIPBUF_SIZE;
2564 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2565 unsigned int count = buffer->length;
2567 if (length + count > max_flip_size)
2568 count = max_flip_size - length;
2570 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2571 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2572 tty->flip.flag_buf_ptr[length] = buffer->error;
2575 info->recv_cnt -= count;
2576 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2578 if (count == buffer->length) {
2579 info->first_recv_buffer = buffer->next;
2582 buffer->length -= count;
2583 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2584 buffer->error = TTY_NORMAL;
2588 if (!info->first_recv_buffer)
2589 info->last_recv_buffer = NULL;
2591 tty->flip.count = length;
2592 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2593 DEBUG_LOG(info->line, "ldisc %lu\n",
2594 tty->ldisc.chars_in_buffer(tty));
2595 DEBUG_LOG(info->line, "flip.count %lu\n",
2599 restore_flags(flags);
2604 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2605 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2606 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2609 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2610 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2611 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2616 /* this includes a check for low-latency */
2617 tty_flip_buffer_push(tty);
2620 static _INLINE_ void
2621 check_flush_timeout(struct e100_serial *info)
2623 /* Flip what we've got (if we can) */
2624 flush_to_flip_buffer(info);
2626 /* We might need to flip later, but not to fast
2627 * since the system is busy processing input... */
2628 if (info->first_recv_buffer)
2629 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2631 /* Force eop last, since data might have come while we're processing
2632 * and if we started the slow timer above, we won't start a fast
2635 force_eop_if_needed(info);
2638 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2639 static void flush_timeout_function(unsigned long data)
2641 struct e100_serial *info = (struct e100_serial *)data;
2643 fast_timers[info->line].function = NULL;
2644 serial_fast_timer_expired++;
2645 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2646 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2647 check_flush_timeout(info);
2652 /* dma fifo/buffer timeout handler
2653 forces an end-of-packet for the dma input channel if no chars
2654 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2657 static struct timer_list flush_timer;
2660 timed_flush_handler(unsigned long ptr)
2662 struct e100_serial *info;
2665 #ifdef CONFIG_SVINTO_SIM
2669 for (i = 0; i < NR_PORTS; i++) {
2670 info = rs_table + i;
2671 if (info->uses_dma_in)
2672 check_flush_timeout(info);
2675 /* restart flush timer */
2676 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2680 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2682 /* If there is an error (ie break) when the DMA is running and
2683 * there are no bytes in the fifo the DMA is stopped and we get no
2684 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2685 * transfer, and if it is without error we can turn the serial
2690 BREAK handling on ETRAX 100:
2691 ETRAX will generate interrupt although there is no stop bit between the
2694 Depending on how long the break sequence is, the end of the breaksequence
2695 will look differently:
2696 | indicates start/end of a character.
2698 B= Break character (0x00) with framing error.
2699 E= Error byte with parity error received after B characters.
2700 F= "Faked" valid byte received immediately after B characters.
2704 B BL ___________________________ V
2705 .._|__________|__________| |valid data |
2707 Multiple frame errors with data == 0x00 (B),
2708 the timing matches up "perfectly" so no extra ending char is detected.
2709 The RXD pin is 1 in the last interrupt, in that case
2710 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2711 know if another byte will come and this really is case 2. below
2712 (e.g F=0xFF or 0xFE)
2713 If RXD pin is 0 we can expect another character (see 2. below).
2718 B B E or F__________________..__ V
2719 .._|__________|__________|______ | |valid data
2723 Multiple frame errors with data == 0x00 (B),
2724 but the part of the break trigs is interpreted as a start bit (and possibly
2725 some 0 bits followed by a number of 1 bits and a stop bit).
2726 Depending on parity settings etc. this last character can be either
2727 a fake "valid" char (F) or have a parity error (E).
2729 If the character is valid it will be put in the buffer,
2730 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2731 will set the flags so the tty will handle it,
2732 if it's an error byte it will not be put in the buffer
2733 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2735 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2736 of the last faulty char (B) and compares it with the current time:
2737 If the time elapsed time is less then 2*char_time_usec we will assume
2738 it's a faked F char and not a Valid char and set
2739 info->errorcode = ERRCODE_SET_BREAK.
2741 Flaws in the above solution:
2742 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2743 We use the timer to distinguish a F character from a V character,
2744 if a V character is to close after the break we might make the wrong decision.
2746 TODO: The break will be delayed until an F or V character is received.
2751 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2753 unsigned long data_read;
2754 struct tty_struct *tty = info->tty;
2757 printk("!NO TTY!\n");
2760 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2761 /* check TTY_THROTTLED first so it indicates our state */
2762 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2763 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2767 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2768 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2769 tty->flip.work.func((void *) tty);
2770 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2771 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2772 return info; /* if TTY_DONT_FLIP is set */
2775 /* Read data and status at the same time */
2776 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2778 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2779 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2781 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2783 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2784 IO_MASK(R_SERIAL0_READ, par_err) |
2785 IO_MASK(R_SERIAL0_READ, overrun) )) {
2787 info->last_rx_active_usec = GET_JIFFIES_USEC();
2788 info->last_rx_active = jiffies;
2789 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2791 if (!log_int_trig1_pos) {
2792 log_int_trig1_pos = log_int_pos;
2793 log_int(rdpc(), 0, 0);
2798 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2799 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2800 /* Most likely a break, but we get interrupts over and
2804 if (!info->break_detected_cnt) {
2805 DEBUG_LOG(info->line, "#BRK start\n", 0);
2807 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2808 /* The RX pin is high now, so the break
2809 * must be over, but....
2810 * we can't really know if we will get another
2811 * last byte ending the break or not.
2812 * And we don't know if the byte (if any) will
2813 * have an error or look valid.
2815 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2816 info->errorcode = ERRCODE_INSERT_BREAK;
2818 info->break_detected_cnt++;
2820 /* The error does not look like a break, but could be
2823 if (info->break_detected_cnt) {
2824 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2825 info->errorcode = ERRCODE_INSERT_BREAK;
2827 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2829 *tty->flip.char_buf_ptr = 0;
2830 *tty->flip.flag_buf_ptr = TTY_BREAK;
2831 tty->flip.flag_buf_ptr++;
2832 tty->flip.char_buf_ptr++;
2836 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2838 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2839 info->icount.parity++;
2840 *tty->flip.flag_buf_ptr = TTY_PARITY;
2841 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2842 info->icount.overrun++;
2843 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2844 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2845 info->icount.frame++;
2846 *tty->flip.flag_buf_ptr = TTY_FRAME;
2848 info->errorcode = 0;
2850 info->break_detected_cnt = 0;
2852 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2855 if (!log_int_trig1_pos) {
2856 if (log_int_pos >= log_int_size) {
2859 log_int_trig0_pos = log_int_pos;
2860 log_int(rdpc(), 0, 0);
2863 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2864 *tty->flip.flag_buf_ptr = 0;
2866 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2870 tty->flip.flag_buf_ptr++;
2871 tty->flip.char_buf_ptr++;
2874 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2875 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2876 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2880 tty_flip_buffer_push(info->tty);
2885 struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2887 unsigned char rstat;
2889 #ifdef SERIAL_DEBUG_INTR
2890 printk("Interrupt from serport %d\n", i);
2892 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2893 if (!info->uses_dma_in) {
2894 return handle_ser_rx_interrupt_no_dma(info);
2897 rstat = info->port[REG_STATUS];
2898 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2899 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2902 if (rstat & SER_ERROR_MASK) {
2905 info->last_rx_active_usec = GET_JIFFIES_USEC();
2906 info->last_rx_active = jiffies;
2907 /* If we got an error, we must reset it by reading the
2910 data = info->port[REG_DATA];
2911 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2912 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2913 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2914 /* Most likely a break, but we get interrupts over and
2918 if (!info->break_detected_cnt) {
2919 DEBUG_LOG(info->line, "#BRK start\n", 0);
2921 if (rstat & SER_RXD_MASK) {
2922 /* The RX pin is high now, so the break
2923 * must be over, but....
2924 * we can't really know if we will get another
2925 * last byte ending the break or not.
2926 * And we don't know if the byte (if any) will
2927 * have an error or look valid.
2929 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2930 info->errorcode = ERRCODE_INSERT_BREAK;
2932 info->break_detected_cnt++;
2934 /* The error does not look like a break, but could be
2937 if (info->break_detected_cnt) {
2938 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2939 info->errorcode = ERRCODE_INSERT_BREAK;
2941 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2943 add_char_and_flag(info, '\0', TTY_BREAK);
2946 if (rstat & SER_PAR_ERR_MASK) {
2947 info->icount.parity++;
2948 add_char_and_flag(info, data, TTY_PARITY);
2949 } else if (rstat & SER_OVERRUN_MASK) {
2950 info->icount.overrun++;
2951 add_char_and_flag(info, data, TTY_OVERRUN);
2952 } else if (rstat & SER_FRAMING_ERR_MASK) {
2953 info->icount.frame++;
2954 add_char_and_flag(info, data, TTY_FRAME);
2957 info->errorcode = 0;
2959 info->break_detected_cnt = 0;
2960 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2961 ((rstat & SER_ERROR_MASK) << 8) | data);
2963 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2964 } else { /* It was a valid byte, now let the DMA do the rest */
2965 unsigned long curr_time_u = GET_JIFFIES_USEC();
2966 unsigned long curr_time = jiffies;
2968 if (info->break_detected_cnt) {
2969 /* Detect if this character is a new valid char or the
2970 * last char in a break sequence: If LSBits are 0 and
2971 * MSBits are high AND the time is close to the
2972 * previous interrupt we should discard it.
2975 (curr_time - info->last_rx_active) * (1000000/HZ) +
2976 curr_time_u - info->last_rx_active_usec;
2977 if (elapsed_usec < 2*info->char_time_usec) {
2978 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2979 /* Report as BREAK (error) and let
2980 * receive_chars_dma() handle it
2982 info->errorcode = ERRCODE_SET_BREAK;
2984 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2986 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2989 #ifdef SERIAL_DEBUG_INTR
2990 printk("** OK, disabling ser_interrupts\n");
2992 e100_disable_serial_data_irq(info);
2993 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2994 info->break_detected_cnt = 0;
2996 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2998 /* Restarting the DMA never hurts */
2999 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
3000 START_FLUSH_FAST_TIMER(info, "ser_int");
3002 } /* handle_ser_rx_interrupt */
3004 extern _INLINE_ void handle_ser_tx_interrupt(struct e100_serial *info)
3006 unsigned long flags;
3009 unsigned char rstat;
3010 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
3011 save_flags(flags); cli();
3012 rstat = info->port[REG_STATUS];
3013 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3015 info->port[REG_TR_DATA] = info->x_char;
3018 /* We must enable since it is disabled in ser_interrupt */
3019 e100_enable_serial_tx_ready_irq(info);
3020 restore_flags(flags);
3023 if (info->uses_dma_out) {
3024 unsigned char rstat;
3026 /* We only use normal tx interrupt when sending x_char */
3027 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
3028 save_flags(flags); cli();
3029 rstat = info->port[REG_STATUS];
3030 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3031 e100_disable_serial_tx_ready_irq(info);
3032 if (info->tty->stopped)
3034 /* Enable the DMA channel and tell it to continue */
3035 e100_enable_txdma_channel(info);
3036 /* Wait 12 cycles before doing the DMA command */
3037 for(i = 6; i > 0; i--)
3040 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3041 restore_flags(flags);
3044 /* Normal char-by-char interrupt */
3045 if (info->xmit.head == info->xmit.tail
3046 || info->tty->stopped
3047 || info->tty->hw_stopped) {
3048 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3049 e100_disable_serial_tx_ready_irq(info);
3050 info->tr_running = 0;
3053 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3054 /* Send a byte, rs485 timing is critical so turn of ints */
3055 save_flags(flags); cli();
3056 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3057 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3059 if (info->xmit.head == info->xmit.tail) {
3060 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3061 if (info->rs485.enabled) {
3062 /* Set a short timer to toggle RTS */
3063 start_one_shot_timer(&fast_timers_rs485[info->line],
3064 rs485_toggle_rts_timer_function,
3065 (unsigned long)info,
3066 info->char_time_usec*2,
3070 info->last_tx_active_usec = GET_JIFFIES_USEC();
3071 info->last_tx_active = jiffies;
3072 e100_disable_serial_tx_ready_irq(info);
3073 info->tr_running = 0;
3074 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3076 /* We must enable since it is disabled in ser_interrupt */
3077 e100_enable_serial_tx_ready_irq(info);
3079 restore_flags(flags);
3081 if (CIRC_CNT(info->xmit.head,
3083 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3084 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3086 } /* handle_ser_tx_interrupt */
3088 /* result of time measurements:
3089 * RX duration 54-60 us when doing something, otherwise 6-9 us
3090 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3093 ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3095 static volatile int tx_started = 0;
3096 struct e100_serial *info;
3098 unsigned long flags;
3099 unsigned long irq_mask1_rd;
3100 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3102 static volatile unsigned long reentered_ready_mask = 0;
3104 save_flags(flags); cli();
3105 irq_mask1_rd = *R_IRQ_MASK1_RD;
3106 /* First handle all rx interrupts with ints disabled */
3108 irq_mask1_rd &= e100_ser_int_mask;
3109 for (i = 0; i < NR_PORTS; i++) {
3110 /* Which line caused the data irq? */
3111 if (irq_mask1_rd & data_mask) {
3113 handle_ser_rx_interrupt(info);
3118 /* Handle tx interrupts with interrupts enabled so we
3119 * can take care of new data interrupts while transmitting
3120 * We protect the tx part with the tx_started flag.
3121 * We disable the tr_ready interrupts we are about to handle and
3122 * unblock the serial interrupt so new serial interrupts may come.
3124 * If we get a new interrupt:
3125 * - it migth be due to synchronous serial ports.
3126 * - serial irq will be blocked by general irq handler.
3127 * - async data will be handled above (sync will be ignored).
3128 * - tx_started flag will prevent us from trying to send again and
3129 * we will exit fast - no need to unblock serial irq.
3130 * - Next (sync) serial interrupt handler will be runned with
3131 * disabled interrupt due to restore_flags() at end of function,
3132 * so sync handler will not be preempted or reentered.
3135 unsigned long ready_mask;
3138 /* Only the tr_ready interrupts left */
3139 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3140 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3141 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3142 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3143 while (irq_mask1_rd) {
3144 /* Disable those we are about to handle */
3145 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3146 /* Unblock the serial interrupt */
3147 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3150 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3152 for (i = 0; i < NR_PORTS; i++) {
3153 /* Which line caused the ready irq? */
3154 if (irq_mask1_rd & ready_mask) {
3156 handle_ser_tx_interrupt(info);
3161 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3163 /* Handle reentered TX interrupt */
3164 irq_mask1_rd = reentered_ready_mask;
3169 unsigned long ready_mask;
3170 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3171 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3172 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3173 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3175 reentered_ready_mask |= ready_mask;
3176 /* Disable those we are about to handle */
3177 *R_IRQ_MASK1_CLR = ready_mask;
3178 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3182 restore_flags(flags);
3183 return IRQ_RETVAL(handled);
3184 } /* ser_interrupt */
3188 * -------------------------------------------------------------------
3189 * Here ends the serial interrupt routines.
3190 * -------------------------------------------------------------------
3194 * This routine is used to handle the "bottom half" processing for the
3195 * serial driver, known also the "software interrupt" processing.
3196 * This processing is done at the kernel interrupt level, after the
3197 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3198 * is where time-consuming activities which can not be done in the
3199 * interrupt driver proper are done; the interrupt driver schedules
3200 * them using rs_sched_event(), and they get done here.
3203 do_softint(void *private_)
3205 struct e100_serial *info = (struct e100_serial *) private_;
3206 struct tty_struct *tty;
3212 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3213 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3214 tty->ldisc.write_wakeup)
3215 (tty->ldisc.write_wakeup)(tty);
3216 wake_up_interruptible(&tty->write_wait);
3221 startup(struct e100_serial * info)
3223 unsigned long flags;
3224 unsigned long xmit_page;
3227 xmit_page = get_zeroed_page(GFP_KERNEL);
3234 /* if it was already initialized, skip this */
3236 if (info->flags & ASYNC_INITIALIZED) {
3237 restore_flags(flags);
3238 free_page(xmit_page);
3243 free_page(xmit_page);
3245 info->xmit.buf = (unsigned char *) xmit_page;
3247 #ifdef SERIAL_DEBUG_OPEN
3248 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3251 #ifdef CONFIG_SVINTO_SIM
3252 /* Bits and pieces collected from below. Better to have them
3253 in one ifdef:ed clause than to mix in a lot of ifdefs,
3256 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3258 info->xmit.head = info->xmit.tail = 0;
3259 info->first_recv_buffer = info->last_recv_buffer = NULL;
3260 info->recv_cnt = info->max_recv_cnt = 0;
3262 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3263 info->rec_descr[i].buf = NULL;
3265 /* No real action in the simulator, but may set info important
3271 * Clear the FIFO buffers and disable them
3272 * (they will be reenabled in change_speed())
3276 * Reset the DMA channels and make sure their interrupts are cleared
3279 if (info->dma_in_enabled) {
3280 info->uses_dma_in = 1;
3281 e100_enable_rxdma_channel(info);
3283 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3285 /* Wait until reset cycle is complete */
3286 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3287 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3289 /* Make sure the irqs are cleared */
3290 *info->iclrintradr =
3291 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3292 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3294 e100_disable_rxdma_channel(info);
3297 if (info->dma_out_enabled) {
3298 info->uses_dma_out = 1;
3299 e100_enable_txdma_channel(info);
3300 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3302 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3303 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3305 /* Make sure the irqs are cleared */
3306 *info->oclrintradr =
3307 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3308 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3310 e100_disable_txdma_channel(info);
3314 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3316 info->xmit.head = info->xmit.tail = 0;
3317 info->first_recv_buffer = info->last_recv_buffer = NULL;
3318 info->recv_cnt = info->max_recv_cnt = 0;
3320 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3321 info->rec_descr[i].buf = 0;
3324 * and set the speed and other flags of the serial port
3325 * this will start the rx/tx as well
3327 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3328 e100_enable_serial_data_irq(info);
3332 /* dummy read to reset any serial errors */
3334 (void)info->port[REG_DATA];
3336 /* enable the interrupts */
3337 if (info->uses_dma_out)
3338 e100_enable_txdma_irq(info);
3340 e100_enable_rx_irq(info);
3342 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3344 /* setup the dma input descriptor and start dma */
3346 start_receive(info);
3348 /* for safety, make sure the descriptors last result is 0 bytes written */
3350 info->tr_descr.sw_len = 0;
3351 info->tr_descr.hw_len = 0;
3352 info->tr_descr.status = 0;
3354 /* enable RTS/DTR last */
3359 #endif /* CONFIG_SVINTO_SIM */
3361 info->flags |= ASYNC_INITIALIZED;
3363 restore_flags(flags);
3368 * This routine will shutdown a serial port; interrupts are disabled, and
3369 * DTR is dropped if the hangup on close termio flag is on.
3372 shutdown(struct e100_serial * info)
3374 unsigned long flags;
3375 struct etrax_dma_descr *descr = info->rec_descr;
3376 struct etrax_recv_buffer *buffer;
3379 #ifndef CONFIG_SVINTO_SIM
3380 /* shut down the transmitter and receiver */
3381 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3382 e100_disable_rx(info);
3383 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3385 /* disable interrupts, reset dma channels */
3386 if (info->uses_dma_in) {
3387 e100_disable_rxdma_irq(info);
3388 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3389 info->uses_dma_in = 0;
3391 e100_disable_serial_data_irq(info);
3394 if (info->uses_dma_out) {
3395 e100_disable_txdma_irq(info);
3396 info->tr_running = 0;
3397 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3398 info->uses_dma_out = 0;
3400 e100_disable_serial_tx_ready_irq(info);
3401 info->tr_running = 0;
3404 #endif /* CONFIG_SVINTO_SIM */
3406 if (!(info->flags & ASYNC_INITIALIZED))
3409 #ifdef SERIAL_DEBUG_OPEN
3410 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3415 cli(); /* Disable interrupts */
3417 if (info->xmit.buf) {
3418 free_page((unsigned long)info->xmit.buf);
3419 info->xmit.buf = NULL;
3422 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3424 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3429 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3430 /* hang up DTR and RTS if HUPCL is enabled */
3432 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3436 set_bit(TTY_IO_ERROR, &info->tty->flags);
3438 info->flags &= ~ASYNC_INITIALIZED;
3439 restore_flags(flags);
3443 /* change baud rate and other assorted parameters */
3446 change_speed(struct e100_serial *info)
3450 unsigned long flags;
3451 /* first some safety checks */
3453 if (!info->tty || !info->tty->termios)
3458 cflag = info->tty->termios->c_cflag;
3460 /* possibly, the tx/rx should be disabled first to do this safely */
3462 /* change baud-rate and write it to the hardware */
3463 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3464 /* Special baudrate */
3465 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3466 unsigned long alt_source =
3467 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3468 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3469 /* R_ALT_SER_BAUDRATE selects the source */
3470 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3471 (unsigned long)info->baud_base, info->custom_divisor));
3472 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3473 /* 0, 2-65535 (0=65536) */
3474 u16 divisor = info->custom_divisor;
3475 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3476 /* baudrate is 3.125MHz/custom_divisor */
3478 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3479 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3481 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3482 *R_SERIAL_PRESCALE = divisor;
3483 info->baud = SERIAL_PRESCALE_BASE/divisor;
3485 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3486 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3487 info->custom_divisor == 1) ||
3488 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3489 info->custom_divisor == 8)) {
3490 /* ext_clk selected */
3492 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3493 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3494 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3495 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3501 /* Bad baudbase, we don't support using timer0
3504 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3505 (unsigned long)info->baud_base, info->custom_divisor);
3507 r_alt_ser_baudrate_shadow &= ~mask;
3508 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3509 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3511 /* Normal baudrate */
3512 /* Make sure we use normal baudrate */
3513 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3514 unsigned long alt_source =
3515 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3516 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3517 r_alt_ser_baudrate_shadow &= ~mask;
3518 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3519 #ifndef CONFIG_SVINTO_SIM
3520 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3521 #endif /* CONFIG_SVINTO_SIM */
3523 info->baud = cflag_to_baud(cflag);
3524 #ifndef CONFIG_SVINTO_SIM
3525 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3526 #endif /* CONFIG_SVINTO_SIM */
3529 #ifndef CONFIG_SVINTO_SIM
3530 /* start with default settings and then fill in changes */
3533 /* 8 bit, no/even parity */
3534 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3535 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3536 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3538 /* 8 bit, no/even parity, 1 stop bit, no cts */
3539 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3540 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3541 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3542 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3543 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3545 if ((cflag & CSIZE) == CS7) {
3546 /* set 7 bit mode */
3547 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3548 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3551 if (cflag & CSTOPB) {
3552 /* set 2 stop bit mode */
3553 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3556 if (cflag & PARENB) {
3558 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3559 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3562 if (cflag & CMSPAR) {
3563 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3564 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3565 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3567 if (cflag & PARODD) {
3568 /* set odd parity (or Mark if CMSPAR) */
3569 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3570 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3573 if (cflag & CRTSCTS) {
3574 /* enable automatic CTS handling */
3575 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3576 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3579 /* make sure the tx and rx are enabled */
3581 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3582 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3584 /* actually write the control regs to the hardware */
3586 info->port[REG_TR_CTRL] = info->tx_ctrl;
3587 info->port[REG_REC_CTRL] = info->rx_ctrl;
3588 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3589 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3590 if (info->tty->termios->c_iflag & IXON ) {
3591 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3592 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3595 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3596 restore_flags(flags);
3597 #endif /* !CONFIG_SVINTO_SIM */
3599 update_char_time(info);
3601 } /* change_speed */
3603 /* start transmitting chars NOW */
3606 rs_flush_chars(struct tty_struct *tty)
3608 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3609 unsigned long flags;
3611 if (info->tr_running ||
3612 info->xmit.head == info->xmit.tail ||
3618 #ifdef SERIAL_DEBUG_FLOW
3619 printk("rs_flush_chars\n");
3622 /* this protection might not exactly be necessary here */
3626 start_transmit(info);
3627 restore_flags(flags);
3631 rs_raw_write(struct tty_struct * tty, int from_user,
3632 const unsigned char *buf, int count)
3635 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3636 unsigned long flags;
3638 /* first some sanity checks */
3640 if (!tty || !info->xmit.buf || !tmp_buf)
3643 #ifdef SERIAL_DEBUG_DATA
3644 if (info->line == SERIAL_DEBUG_LINE)
3645 printk("rs_raw_write (%d), status %d\n",
3646 count, info->port[REG_STATUS]);
3649 #ifdef CONFIG_SVINTO_SIM
3650 /* Really simple. The output is here and now. */
3651 SIMCOUT(buf, count);
3655 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3656 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3659 /* the cli/restore_flags pairs below are needed because the
3660 * DMA interrupt handler moves the info->xmit values. the memcpy
3661 * needs to be in the critical region unfortunately, because we
3662 * need to read xmit values, memcpy, write xmit values in one
3663 * atomic operation... this could perhaps be avoided by more clever
3670 c = CIRC_SPACE_TO_END(info->xmit.head,
3678 c -= copy_from_user(tmp_buf, buf, c);
3685 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3690 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3691 info->xmit.head = ((info->xmit.head + c) &
3692 (SERIAL_XMIT_SIZE-1));
3693 restore_flags(flags);
3702 c = CIRC_SPACE_TO_END(info->xmit.head,
3711 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3712 info->xmit.head = (info->xmit.head + c) &
3713 (SERIAL_XMIT_SIZE-1);
3718 restore_flags(flags);
3721 /* enable transmitter if not running, unless the tty is stopped
3722 * this does not need IRQ protection since if tr_running == 0
3723 * the IRQ's are not running anyway for this port.
3725 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3727 if (info->xmit.head != info->xmit.tail &&
3730 !info->tr_running) {
3731 start_transmit(info);
3735 } /* raw_raw_write() */
3738 rs_write(struct tty_struct * tty, int from_user,
3739 const unsigned char *buf, int count)
3741 #if defined(CONFIG_ETRAX_RS485)
3742 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3744 if (info->rs485.enabled)
3746 /* If we are in RS-485 mode, we need to toggle RTS and disable
3747 * the receiver before initiating a DMA transfer
3749 #ifdef CONFIG_ETRAX_FAST_TIMER
3750 /* Abort any started timer */
3751 fast_timers_rs485[info->line].function = NULL;
3752 del_fast_timer(&fast_timers_rs485[info->line]);
3754 e100_rts(info, info->rs485.rts_on_send);
3755 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3756 e100_disable_rx(info);
3757 e100_enable_rx_irq(info);
3760 if (info->rs485.delay_rts_before_send > 0)
3761 msleep(info->rs485.delay_rts_before_send);
3763 #endif /* CONFIG_ETRAX_RS485 */
3765 count = rs_raw_write(tty, from_user, buf, count);
3767 #if defined(CONFIG_ETRAX_RS485)
3768 if (info->rs485.enabled)
3771 /* If we are in RS-485 mode the following has to be done:
3772 * wait until DMA is ready
3773 * wait on transmit shift register
3775 * enable the receiver
3778 /* Sleep until all sent */
3779 tty_wait_until_sent(tty, 0);
3780 #ifdef CONFIG_ETRAX_FAST_TIMER
3781 /* Now sleep a little more so that shift register is empty */
3782 schedule_usleep(info->char_time_usec * 2);
3784 /* wait on transmit shift register */
3786 get_lsr_info(info, &val);
3787 }while (!(val & TIOCSER_TEMT));
3789 e100_rts(info, info->rs485.rts_after_sent);
3791 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3792 e100_enable_rx(info);
3793 e100_enable_rxdma_irq(info);
3796 #endif /* CONFIG_ETRAX_RS485 */
3802 /* how much space is available in the xmit buffer? */
3805 rs_write_room(struct tty_struct *tty)
3807 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3809 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3812 /* How many chars are in the xmit buffer?
3813 * This does not include any chars in the transmitter FIFO.
3814 * Use wait_until_sent for waiting for FIFO drain.
3818 rs_chars_in_buffer(struct tty_struct *tty)
3820 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3822 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3825 /* discard everything in the xmit buffer */
3828 rs_flush_buffer(struct tty_struct *tty)
3830 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3831 unsigned long flags;
3835 info->xmit.head = info->xmit.tail = 0;
3836 restore_flags(flags);
3838 wake_up_interruptible(&tty->write_wait);
3840 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3841 tty->ldisc.write_wakeup)
3842 (tty->ldisc.write_wakeup)(tty);
3846 * This function is used to send a high-priority XON/XOFF character to
3849 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3850 * but we do it in handle_ser_tx_interrupt().
3851 * We disable DMA channel and enable tx ready interrupt and write the
3852 * character when possible.
3854 static void rs_send_xchar(struct tty_struct *tty, char ch)
3856 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3857 unsigned long flags;
3858 save_flags(flags); cli();
3859 if (info->uses_dma_out) {
3860 /* Put the DMA on hold and disable the channel */
3861 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3862 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3863 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3864 e100_disable_txdma_channel(info);
3867 /* Must make sure transmitter is not stopped before we can transmit */
3871 /* Enable manual transmit interrupt and send from there */
3872 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3874 e100_enable_serial_tx_ready_irq(info);
3875 restore_flags(flags);
3879 * ------------------------------------------------------------
3882 * This routine is called by the upper-layer tty layer to signal that
3883 * incoming characters should be throttled.
3884 * ------------------------------------------------------------
3887 rs_throttle(struct tty_struct * tty)
3889 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3890 #ifdef SERIAL_DEBUG_THROTTLE
3893 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3894 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3896 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3898 /* Do RTS before XOFF since XOFF might take some time */
3899 if (tty->termios->c_cflag & CRTSCTS) {
3900 /* Turn off RTS line */
3904 rs_send_xchar(tty, STOP_CHAR(tty));
3909 rs_unthrottle(struct tty_struct * tty)
3911 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3912 #ifdef SERIAL_DEBUG_THROTTLE
3915 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3916 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3918 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3919 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3920 /* Do RTS before XOFF since XOFF might take some time */
3921 if (tty->termios->c_cflag & CRTSCTS) {
3922 /* Assert RTS line */
3930 rs_send_xchar(tty, START_CHAR(tty));
3936 * ------------------------------------------------------------
3937 * rs_ioctl() and friends
3938 * ------------------------------------------------------------
3942 get_serial_info(struct e100_serial * info,
3943 struct serial_struct * retinfo)
3945 struct serial_struct tmp;
3947 /* this is all probably wrong, there are a lot of fields
3948 * here that we don't have in e100_serial and maybe we
3949 * should set them to something else than 0.
3954 memset(&tmp, 0, sizeof(tmp));
3955 tmp.type = info->type;
3956 tmp.line = info->line;
3957 tmp.port = (int)info->port;
3958 tmp.irq = info->irq;
3959 tmp.flags = info->flags;
3960 tmp.baud_base = info->baud_base;
3961 tmp.close_delay = info->close_delay;
3962 tmp.closing_wait = info->closing_wait;
3963 tmp.custom_divisor = info->custom_divisor;
3964 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3970 set_serial_info(struct e100_serial *info,
3971 struct serial_struct *new_info)
3973 struct serial_struct new_serial;
3974 struct e100_serial old_info;
3977 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3982 if (!capable(CAP_SYS_ADMIN)) {
3983 if ((new_serial.type != info->type) ||
3984 (new_serial.close_delay != info->close_delay) ||
3985 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3986 (info->flags & ~ASYNC_USR_MASK)))
3988 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3989 (new_serial.flags & ASYNC_USR_MASK));
3990 goto check_and_exit;
3993 if (info->count > 1)
3997 * OK, past this point, all the error checking has been done.
3998 * At this point, we start making changes.....
4001 info->baud_base = new_serial.baud_base;
4002 info->flags = ((info->flags & ~ASYNC_FLAGS) |
4003 (new_serial.flags & ASYNC_FLAGS));
4004 info->custom_divisor = new_serial.custom_divisor;
4005 info->type = new_serial.type;
4006 info->close_delay = new_serial.close_delay;
4007 info->closing_wait = new_serial.closing_wait;
4008 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4011 if (info->flags & ASYNC_INITIALIZED) {
4014 retval = startup(info);
4019 * get_lsr_info - get line status register info
4021 * Purpose: Let user call ioctl() to get info when the UART physically
4022 * is emptied. On bus types like RS485, the transmitter must
4023 * release the bus after transmitting. This must be done when
4024 * the transmit shift register is empty, not be done when the
4025 * transmit holding register is empty. This functionality
4026 * allows an RS485 driver to be written in user space.
4029 get_lsr_info(struct e100_serial * info, unsigned int *value)
4031 unsigned int result = TIOCSER_TEMT;
4032 #ifndef CONFIG_SVINTO_SIM
4033 unsigned long curr_time = jiffies;
4034 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4035 unsigned long elapsed_usec =
4036 (curr_time - info->last_tx_active) * 1000000/HZ +
4037 curr_time_usec - info->last_tx_active_usec;
4039 if (info->xmit.head != info->xmit.tail ||
4040 elapsed_usec < 2*info->char_time_usec) {
4045 if (copy_to_user(value, &result, sizeof(int)))
4050 #ifdef SERIAL_DEBUG_IO
4057 const struct state_str control_state_str[] = {
4058 {TIOCM_DTR, "DTR" },
4062 {TIOCM_CTS, "CTS" },
4065 {TIOCM_DSR, "DSR" },
4069 char *get_control_state_str(int MLines, char *s)
4074 while (control_state_str[i].str != NULL) {
4075 if (MLines & control_state_str[i].state) {
4079 strcat(s, control_state_str[i].str);
4088 get_modem_info(struct e100_serial * info, unsigned int *value)
4090 unsigned int result;
4091 /* Polarity isn't verified */
4092 #if 0 /*def SERIAL_DEBUG_IO */
4094 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4100 E100_CTS_GET(info));
4104 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4105 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4106 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4107 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4108 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4109 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4111 #ifdef SERIAL_DEBUG_IO
4112 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4116 get_control_state_str(result, s);
4117 printk("state: %s\n", s);
4120 if (copy_to_user(value, &result, sizeof(int)))
4127 set_modem_info(struct e100_serial * info, unsigned int cmd,
4128 unsigned int *value)
4132 if (copy_from_user(&arg, value, sizeof(int)))
4137 if (arg & TIOCM_RTS) {
4140 if (arg & TIOCM_DTR) {
4143 /* Handle FEMALE behaviour */
4144 if (arg & TIOCM_RI) {
4145 e100_ri_out(info, 1);
4147 if (arg & TIOCM_CD) {
4148 e100_cd_out(info, 1);
4152 if (arg & TIOCM_RTS) {
4155 if (arg & TIOCM_DTR) {
4158 /* Handle FEMALE behaviour */
4159 if (arg & TIOCM_RI) {
4160 e100_ri_out(info, 0);
4162 if (arg & TIOCM_CD) {
4163 e100_cd_out(info, 0);
4167 e100_rts(info, arg & TIOCM_RTS);
4168 e100_dtr(info, arg & TIOCM_DTR);
4169 /* Handle FEMALE behaviour */
4170 e100_ri_out(info, arg & TIOCM_RI);
4171 e100_cd_out(info, arg & TIOCM_CD);
4181 rs_break(struct tty_struct *tty, int break_state)
4183 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4184 unsigned long flags;
4191 if (break_state == -1) {
4192 /* Go to manual mode and set the txd pin to 0 */
4193 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4195 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4197 info->port[REG_TR_CTRL] = info->tx_ctrl;
4198 restore_flags(flags);
4202 rs_ioctl(struct tty_struct *tty, struct file * file,
4203 unsigned int cmd, unsigned long arg)
4205 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4207 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4208 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4209 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4210 if (tty->flags & (1 << TTY_IO_ERROR))
4216 return get_modem_info(info, (unsigned int *) arg);
4220 return set_modem_info(info, cmd, (unsigned int *) arg);
4222 return get_serial_info(info,
4223 (struct serial_struct *) arg);
4225 return set_serial_info(info,
4226 (struct serial_struct *) arg);
4227 case TIOCSERGETLSR: /* Get line status register */
4228 return get_lsr_info(info, (unsigned int *) arg);
4230 case TIOCSERGSTRUCT:
4231 if (copy_to_user((struct e100_serial *) arg,
4232 info, sizeof(struct e100_serial)))
4236 #if defined(CONFIG_ETRAX_RS485)
4237 case TIOCSERSETRS485:
4239 struct rs485_control rs485ctrl;
4240 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4243 return e100_enable_rs485(tty, &rs485ctrl);
4246 case TIOCSERWRRS485:
4248 struct rs485_write rs485wr;
4249 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4252 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4257 return -ENOIOCTLCMD;
4263 rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4265 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4267 if (tty->termios->c_cflag == old_termios->c_cflag &&
4268 tty->termios->c_iflag == old_termios->c_iflag)
4273 /* Handle turning off CRTSCTS */
4274 if ((old_termios->c_cflag & CRTSCTS) &&
4275 !(tty->termios->c_cflag & CRTSCTS)) {
4276 tty->hw_stopped = 0;
4282 /* In debugport.c - register a console write function that uses the normal
4285 typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4287 extern debugport_write_function debug_write_function;
4289 static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4293 struct tty_struct *tty;
4294 static int recurse_cnt = 0;
4296 tty = rs_table[i].tty;
4298 unsigned long flags;
4299 if (recurse_cnt > 5) /* We skip this debug output */
4302 local_irq_save(flags);
4304 local_irq_restore(flags);
4306 cnt = rs_write(tty, 0, buf + written, len);
4314 local_irq_save(flags);
4316 local_irq_restore(flags);
4323 * ------------------------------------------------------------
4326 * This routine is called when the serial port gets closed. First, we
4327 * wait for the last remaining data to be sent. Then, we unlink its
4328 * S structure from the interrupt chain if necessary, and we free
4329 * that IRQ if nothing is left in the chain.
4330 * ------------------------------------------------------------
4333 rs_close(struct tty_struct *tty, struct file * filp)
4335 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4336 unsigned long flags;
4341 /* interrupts are disabled for this entire function */
4346 if (tty_hung_up_p(filp)) {
4347 restore_flags(flags);
4351 #ifdef SERIAL_DEBUG_OPEN
4352 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4353 info->line, info->count);
4355 if ((tty->count == 1) && (info->count != 1)) {
4357 * Uh, oh. tty->count is 1, which means that the tty
4358 * structure will be freed. Info->count should always
4359 * be one in these conditions. If it's greater than
4360 * one, we've got real problems, since it means the
4361 * serial port won't be shutdown.
4364 "rs_close: bad serial port count; tty->count is 1, "
4365 "info->count is %d\n", info->count);
4368 if (--info->count < 0) {
4369 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4370 info->line, info->count);
4374 restore_flags(flags);
4377 info->flags |= ASYNC_CLOSING;
4379 * Save the termios structure, since this port may have
4380 * separate termios for callout and dialin.
4382 if (info->flags & ASYNC_NORMAL_ACTIVE)
4383 info->normal_termios = *tty->termios;
4385 * Now we wait for the transmit buffer to clear; and we notify
4386 * the line discipline to only process XON/XOFF characters.
4389 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4390 tty_wait_until_sent(tty, info->closing_wait);
4392 * At this point we stop accepting input. To do this, we
4393 * disable the serial receiver and the DMA receive interrupt.
4395 #ifdef SERIAL_HANDLE_EARLY_ERRORS
4396 e100_disable_serial_data_irq(info);
4399 #ifndef CONFIG_SVINTO_SIM
4400 e100_disable_rx(info);
4401 e100_disable_rx_irq(info);
4403 if (info->flags & ASYNC_INITIALIZED) {
4405 * Before we drop DTR, make sure the UART transmitter
4406 * has completely drained; this is especially
4407 * important as we have a transmit FIFO!
4409 rs_wait_until_sent(tty, HZ);
4414 if (tty->driver->flush_buffer)
4415 tty->driver->flush_buffer(tty);
4416 if (tty->ldisc.flush_buffer)
4417 tty->ldisc.flush_buffer(tty);
4421 if (info->blocked_open) {
4422 if (info->close_delay) {
4423 set_current_state(TASK_INTERRUPTIBLE);
4424 schedule_timeout(info->close_delay);
4426 wake_up_interruptible(&info->open_wait);
4428 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4429 wake_up_interruptible(&info->close_wait);
4430 restore_flags(flags);
4434 #if defined(CONFIG_ETRAX_RS485)
4435 if (info->rs485.enabled) {
4436 info->rs485.enabled = 0;
4437 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4438 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4440 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4441 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4442 rs485_port_g_bit, 0);
4444 #if defined(CONFIG_ETRAX_RS485_LTC1387)
4445 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4446 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4447 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4448 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4455 * rs_wait_until_sent() --- wait until the transmitter is empty
4457 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4459 unsigned long orig_jiffies;
4460 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4461 unsigned long curr_time = jiffies;
4462 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4464 (curr_time - info->last_tx_active) * (1000000/HZ) +
4465 curr_time_usec - info->last_tx_active_usec;
4468 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4469 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4471 orig_jiffies = jiffies;
4472 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4473 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4474 (elapsed_usec < 2*info->char_time_usec)) {
4475 set_current_state(TASK_INTERRUPTIBLE);
4476 schedule_timeout(1);
4477 if (signal_pending(current))
4479 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4481 curr_time = jiffies;
4482 curr_time_usec = GET_JIFFIES_USEC();
4484 (curr_time - info->last_tx_active) * (1000000/HZ) +
4485 curr_time_usec - info->last_tx_active_usec;
4487 set_current_state(TASK_RUNNING);
4491 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4494 rs_hangup(struct tty_struct *tty)
4496 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4498 rs_flush_buffer(tty);
4502 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4504 wake_up_interruptible(&info->open_wait);
4508 * ------------------------------------------------------------
4509 * rs_open() and friends
4510 * ------------------------------------------------------------
4513 block_til_ready(struct tty_struct *tty, struct file * filp,
4514 struct e100_serial *info)
4516 DECLARE_WAITQUEUE(wait, current);
4517 unsigned long flags;
4519 int do_clocal = 0, extra_count = 0;
4522 * If the device is in the middle of being closed, then block
4523 * until it's done, and then try again.
4525 if (tty_hung_up_p(filp) ||
4526 (info->flags & ASYNC_CLOSING)) {
4527 if (info->flags & ASYNC_CLOSING)
4528 interruptible_sleep_on(&info->close_wait);
4529 #ifdef SERIAL_DO_RESTART
4530 if (info->flags & ASYNC_HUP_NOTIFY)
4533 return -ERESTARTSYS;
4540 * If non-blocking mode is set, or the port is not enabled,
4541 * then make the check up front and then exit.
4543 if ((filp->f_flags & O_NONBLOCK) ||
4544 (tty->flags & (1 << TTY_IO_ERROR))) {
4545 info->flags |= ASYNC_NORMAL_ACTIVE;
4549 if (tty->termios->c_cflag & CLOCAL) {
4554 * Block waiting for the carrier detect and the line to become
4555 * free (i.e., not in use by the callout). While we are in
4556 * this loop, info->count is dropped by one, so that
4557 * rs_close() knows when to free things. We restore it upon
4558 * exit, either normal or abnormal.
4561 add_wait_queue(&info->open_wait, &wait);
4562 #ifdef SERIAL_DEBUG_OPEN
4563 printk("block_til_ready before block: ttyS%d, count = %d\n",
4564 info->line, info->count);
4568 if (!tty_hung_up_p(filp)) {
4572 restore_flags(flags);
4573 info->blocked_open++;
4577 /* assert RTS and DTR */
4580 restore_flags(flags);
4581 set_current_state(TASK_INTERRUPTIBLE);
4582 if (tty_hung_up_p(filp) ||
4583 !(info->flags & ASYNC_INITIALIZED)) {
4584 #ifdef SERIAL_DO_RESTART
4585 if (info->flags & ASYNC_HUP_NOTIFY)
4588 retval = -ERESTARTSYS;
4594 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4595 /* && (do_clocal || DCD_IS_ASSERTED) */
4597 if (signal_pending(current)) {
4598 retval = -ERESTARTSYS;
4601 #ifdef SERIAL_DEBUG_OPEN
4602 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4603 info->line, info->count);
4607 set_current_state(TASK_RUNNING);
4608 remove_wait_queue(&info->open_wait, &wait);
4611 info->blocked_open--;
4612 #ifdef SERIAL_DEBUG_OPEN
4613 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4614 info->line, info->count);
4618 info->flags |= ASYNC_NORMAL_ACTIVE;
4623 * This routine is called whenever a serial port is opened.
4624 * It performs the serial-specific initialization for the tty structure.
4627 rs_open(struct tty_struct *tty, struct file * filp)
4629 struct e100_serial *info;
4633 /* find which port we want to open */
4637 if (line < 0 || line >= NR_PORTS)
4640 /* find the corresponding e100_serial struct in the table */
4641 info = rs_table + line;
4643 /* don't allow the opening of ports that are not enabled in the HW config */
4647 #ifdef SERIAL_DEBUG_OPEN
4648 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4653 tty->driver_data = info;
4656 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4659 page = get_zeroed_page(GFP_KERNEL);
4666 tmp_buf = (unsigned char *) page;
4670 * If the port is in the middle of closing, bail out now
4672 if (tty_hung_up_p(filp) ||
4673 (info->flags & ASYNC_CLOSING)) {
4674 if (info->flags & ASYNC_CLOSING)
4675 interruptible_sleep_on(&info->close_wait);
4676 #ifdef SERIAL_DO_RESTART
4677 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4678 -EAGAIN : -ERESTARTSYS);
4685 * Start up the serial port
4688 retval = startup(info);
4692 retval = block_til_ready(tty, filp, info);
4694 #ifdef SERIAL_DEBUG_OPEN
4695 printk("rs_open returning after block_til_ready with %d\n",
4701 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4702 *tty->termios = info->normal_termios;
4706 #ifdef SERIAL_DEBUG_OPEN
4707 printk("rs_open ttyS%d successful...\n", info->line);
4709 DLOG_INT_TRIG( log_int_pos = 0);
4711 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4712 info->icount.rx = 0;
4719 * /proc fs routines....
4722 extern _INLINE_ int line_info(char *buf, struct e100_serial *info)
4728 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4729 info->line, (unsigned long)info->port, info->irq);
4731 if (!info->port || (info->type == PORT_UNKNOWN)) {
4732 ret += sprintf(buf+ret, "\n");
4738 if (!E100_RTS_GET(info))
4739 strcat(stat_buf, "|RTS");
4740 if (!E100_CTS_GET(info))
4741 strcat(stat_buf, "|CTS");
4742 if (!E100_DTR_GET(info))
4743 strcat(stat_buf, "|DTR");
4744 if (!E100_DSR_GET(info))
4745 strcat(stat_buf, "|DSR");
4746 if (!E100_CD_GET(info))
4747 strcat(stat_buf, "|CD");
4748 if (!E100_RI_GET(info))
4749 strcat(stat_buf, "|RI");
4751 ret += sprintf(buf+ret, " baud:%d", info->baud);
4753 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4754 (unsigned long)info->icount.tx,
4755 (unsigned long)info->icount.rx);
4756 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4758 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4760 (unsigned long)SERIAL_XMIT_SIZE);
4763 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4764 (unsigned long)info->recv_cnt,
4765 (unsigned long)info->max_recv_cnt);
4770 if (info->tty->stopped)
4771 ret += sprintf(buf+ret, " stopped:%i",
4772 (int)info->tty->stopped);
4773 if (info->tty->hw_stopped)
4774 ret += sprintf(buf+ret, " hw_stopped:%i",
4775 (int)info->tty->hw_stopped);
4779 unsigned char rstat = info->port[REG_STATUS];
4780 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4781 ret += sprintf(buf+ret, " xoff_detect:1");
4789 if (info->icount.frame)
4790 ret += sprintf(buf+ret, " fe:%lu",
4791 (unsigned long)info->icount.frame);
4793 if (info->icount.parity)
4794 ret += sprintf(buf+ret, " pe:%lu",
4795 (unsigned long)info->icount.parity);
4797 if (info->icount.brk)
4798 ret += sprintf(buf+ret, " brk:%lu",
4799 (unsigned long)info->icount.brk);
4801 if (info->icount.overrun)
4802 ret += sprintf(buf+ret, " oe:%lu",
4803 (unsigned long)info->icount.overrun);
4806 * Last thing is the RS-232 status lines
4808 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4812 int rs_read_proc(char *page, char **start, off_t off, int count,
4813 int *eof, void *data)
4818 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4820 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4821 if (!rs_table[i].enabled)
4823 l = line_info(page + len, &rs_table[i]);
4825 if (len+begin > off+count)
4827 if (len+begin < off) {
4832 #ifdef DEBUG_LOG_INCLUDED
4833 for (i = 0; i < debug_log_pos; i++) {
4834 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4835 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4836 if (len+begin > off+count)
4838 if (len+begin < off) {
4843 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4844 i, DEBUG_LOG_SIZE, begin+len);
4850 if (off >= len+begin)
4852 *start = page + (off-begin);
4853 return ((count < begin+len-off) ? count : begin+len-off);
4856 /* Finally, routines used to initialize the serial driver. */
4859 show_serial_version(void)
4862 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4863 &serial_version[11]); /* "$Revision: x.yy" */
4866 /* rs_init inits the driver at boot (using the module_init chain) */
4868 static struct tty_operations rs_ops = {
4872 .flush_chars = rs_flush_chars,
4873 .write_room = rs_write_room,
4874 .chars_in_buffer = rs_chars_in_buffer,
4875 .flush_buffer = rs_flush_buffer,
4877 .throttle = rs_throttle,
4878 .unthrottle = rs_unthrottle,
4879 .set_termios = rs_set_termios,
4882 .hangup = rs_hangup,
4883 .break_ctl = rs_break,
4884 .send_xchar = rs_send_xchar,
4885 .wait_until_sent = rs_wait_until_sent,
4886 .read_proc = rs_read_proc,
4893 struct e100_serial *info;
4894 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4899 show_serial_version();
4901 /* Setup the timed flush handler system */
4903 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4904 init_timer(&flush_timer);
4905 flush_timer.function = timed_flush_handler;
4906 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4909 /* Initialize the tty_driver structure */
4911 driver->driver_name = "serial";
4912 driver->name = "ttyS";
4913 driver->major = TTY_MAJOR;
4914 driver->minor_start = 64;
4915 driver->type = TTY_DRIVER_TYPE_SERIAL;
4916 driver->subtype = SERIAL_TYPE_NORMAL;
4917 driver->init_termios = tty_std_termios;
4918 driver->init_termios.c_cflag =
4919 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4920 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4921 driver->termios = serial_termios;
4922 driver->termios_locked = serial_termios_locked;
4924 tty_set_operations(driver, &rs_ops);
4925 serial_driver = driver;
4926 if (tty_register_driver(driver))
4927 panic("Couldn't register serial driver\n");
4928 /* do some initializing for the separate ports */
4930 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4931 info->uses_dma_in = 0;
4932 info->uses_dma_out = 0;
4935 info->type = PORT_ETRAX;
4936 info->tr_running = 0;
4937 info->forced_eop = 0;
4938 info->baud_base = DEF_BAUD_BASE;
4939 info->custom_divisor = 0;
4941 info->close_delay = 5*HZ/10;
4942 info->closing_wait = 30*HZ;
4946 info->blocked_open = 0;
4947 info->normal_termios = driver->init_termios;
4948 init_waitqueue_head(&info->open_wait);
4949 init_waitqueue_head(&info->close_wait);
4950 info->xmit.buf = NULL;
4951 info->xmit.tail = info->xmit.head = 0;
4952 info->first_recv_buffer = info->last_recv_buffer = NULL;
4953 info->recv_cnt = info->max_recv_cnt = 0;
4954 info->last_tx_active_usec = 0;
4955 info->last_tx_active = 0;
4957 #if defined(CONFIG_ETRAX_RS485)
4958 /* Set sane defaults */
4959 info->rs485.rts_on_send = 0;
4960 info->rs485.rts_after_sent = 1;
4961 info->rs485.delay_rts_before_send = 0;
4962 info->rs485.enabled = 0;
4964 INIT_WORK(&info->work, do_softint, info);
4966 if (info->enabled) {
4967 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4968 serial_driver->name, info->line, (unsigned int)info->port);
4971 #ifdef CONFIG_ETRAX_FAST_TIMER
4972 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4973 memset(fast_timers, 0, sizeof(fast_timers));
4975 #ifdef CONFIG_ETRAX_RS485
4976 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4981 #ifndef CONFIG_SVINTO_SIM
4982 /* Not needed in simulator. May only complicate stuff. */
4983 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4985 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4988 #ifdef CONFIG_ETRAX_SERIAL_PORT0
4989 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4990 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4993 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4994 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4999 #ifdef CONFIG_ETRAX_SERIAL_PORT1
5000 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
5001 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
5004 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
5005 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
5009 #ifdef CONFIG_ETRAX_SERIAL_PORT2
5010 /* DMA Shared with par0 (and SCSI0 and ATA) */
5011 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
5012 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
5015 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
5016 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
5020 #ifdef CONFIG_ETRAX_SERIAL_PORT3
5021 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
5022 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
5023 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
5026 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
5027 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
5032 #ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5033 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5034 "fast serial dma timeout", NULL)) {
5035 printk(KERN_CRIT "err: timer1 irq\n");
5038 #endif /* CONFIG_SVINTO_SIM */
5039 debug_write_function = rs_debug_write_function;
5043 /* this makes sure that rs_init is called during kernel boot */
5045 module_init(rs_init);
5048 * register_serial and unregister_serial allows for serial ports to be
5049 * configured at run-time, to support PCMCIA modems.
5052 register_serial(struct serial_struct *req)
5057 void unregister_serial(int line)