2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <mach/board.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb *bp)
61 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
62 macb_writel(bp, SA1B, bottom);
63 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
64 macb_writel(bp, SA1T, top);
67 static void __init macb_get_hwaddr(struct macb *bp)
73 bottom = macb_readl(bp, SA1B);
74 top = macb_readl(bp, SA1T);
76 addr[0] = bottom & 0xff;
77 addr[1] = (bottom >> 8) & 0xff;
78 addr[2] = (bottom >> 16) & 0xff;
79 addr[3] = (bottom >> 24) & 0xff;
81 addr[5] = (top >> 8) & 0xff;
83 if (is_valid_ether_addr(addr)) {
84 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
86 dev_info(&bp->pdev->dev, "invalid hw address, using random\n");
87 random_ether_addr(bp->dev->dev_addr);
91 static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
93 struct macb *bp = bus->priv;
96 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
97 | MACB_BF(RW, MACB_MAN_READ)
98 | MACB_BF(PHYA, mii_id)
99 | MACB_BF(REGA, regnum)
100 | MACB_BF(CODE, MACB_MAN_CODE)));
102 /* wait for end of transfer */
103 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
106 value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
111 static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
114 struct macb *bp = bus->priv;
116 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
117 | MACB_BF(RW, MACB_MAN_WRITE)
118 | MACB_BF(PHYA, mii_id)
119 | MACB_BF(REGA, regnum)
120 | MACB_BF(CODE, MACB_MAN_CODE)
121 | MACB_BF(DATA, value)));
123 /* wait for end of transfer */
124 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
130 static int macb_mdio_reset(struct mii_bus *bus)
135 static void macb_handle_link_change(struct net_device *dev)
137 struct macb *bp = netdev_priv(dev);
138 struct phy_device *phydev = bp->phy_dev;
141 int status_change = 0;
143 spin_lock_irqsave(&bp->lock, flags);
146 if ((bp->speed != phydev->speed) ||
147 (bp->duplex != phydev->duplex)) {
150 reg = macb_readl(bp, NCFGR);
151 reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
155 if (phydev->speed == SPEED_100)
156 reg |= MACB_BIT(SPD);
158 macb_writel(bp, NCFGR, reg);
160 bp->speed = phydev->speed;
161 bp->duplex = phydev->duplex;
166 if (phydev->link != bp->link) {
171 bp->link = phydev->link;
176 spin_unlock_irqrestore(&bp->lock, flags);
180 printk(KERN_INFO "%s: link up (%d/%s)\n",
181 dev->name, phydev->speed,
182 DUPLEX_FULL == phydev->duplex ? "Full":"Half");
184 printk(KERN_INFO "%s: link down\n", dev->name);
188 /* based on au1000_eth. c*/
189 static int macb_mii_probe(struct net_device *dev)
191 struct macb *bp = netdev_priv(dev);
192 struct phy_device *phydev = NULL;
193 struct eth_platform_data *pdata;
196 /* find the first phy */
197 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
198 if (bp->mii_bus->phy_map[phy_addr]) {
199 phydev = bp->mii_bus->phy_map[phy_addr];
205 printk (KERN_ERR "%s: no PHY found\n", dev->name);
209 pdata = bp->pdev->dev.platform_data;
210 /* TODO : add pin_irq */
212 /* attach the mac to the phy */
213 if (pdata && pdata->is_rmii) {
214 phydev = phy_connect(dev, dev_name(&phydev->dev),
215 &macb_handle_link_change, 0, PHY_INTERFACE_MODE_RMII);
217 phydev = phy_connect(dev, dev_name(&phydev->dev),
218 &macb_handle_link_change, 0, PHY_INTERFACE_MODE_MII);
221 if (IS_ERR(phydev)) {
222 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
223 return PTR_ERR(phydev);
226 /* mask with MAC supported features */
227 phydev->supported &= PHY_BASIC_FEATURES;
229 phydev->advertising = phydev->supported;
234 bp->phy_dev = phydev;
239 static int macb_mii_init(struct macb *bp)
241 struct eth_platform_data *pdata;
244 /* Enable managment port */
245 macb_writel(bp, NCR, MACB_BIT(MPE));
247 bp->mii_bus = mdiobus_alloc();
248 if (bp->mii_bus == NULL) {
253 bp->mii_bus->name = "MACB_mii_bus";
254 bp->mii_bus->read = &macb_mdio_read;
255 bp->mii_bus->write = &macb_mdio_write;
256 bp->mii_bus->reset = &macb_mdio_reset;
257 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%x", bp->pdev->id);
258 bp->mii_bus->priv = bp;
259 bp->mii_bus->parent = &bp->dev->dev;
260 pdata = bp->pdev->dev.platform_data;
263 bp->mii_bus->phy_mask = pdata->phy_mask;
265 bp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
266 if (!bp->mii_bus->irq) {
268 goto err_out_free_mdiobus;
271 for (i = 0; i < PHY_MAX_ADDR; i++)
272 bp->mii_bus->irq[i] = PHY_POLL;
274 platform_set_drvdata(bp->dev, bp->mii_bus);
276 if (mdiobus_register(bp->mii_bus))
277 goto err_out_free_mdio_irq;
279 if (macb_mii_probe(bp->dev) != 0) {
280 goto err_out_unregister_bus;
285 err_out_unregister_bus:
286 mdiobus_unregister(bp->mii_bus);
287 err_out_free_mdio_irq:
288 kfree(bp->mii_bus->irq);
289 err_out_free_mdiobus:
290 mdiobus_free(bp->mii_bus);
295 static void macb_update_stats(struct macb *bp)
297 u32 __iomem *reg = bp->regs + MACB_PFR;
298 u32 *p = &bp->hw_stats.rx_pause_frames;
299 u32 *end = &bp->hw_stats.tx_pause_frames + 1;
301 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
303 for(; p < end; p++, reg++)
304 *p += __raw_readl(reg);
307 static void macb_tx(struct macb *bp)
313 status = macb_readl(bp, TSR);
314 macb_writel(bp, TSR, status);
316 dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n",
317 (unsigned long)status);
319 if (status & MACB_BIT(UND)) {
321 printk(KERN_ERR "%s: TX underrun, resetting buffers\n",
324 /* Transfer ongoing, disable transmitter, to avoid confusion */
325 if (status & MACB_BIT(TGO))
326 macb_writel(bp, NCR, macb_readl(bp, NCR) & ~MACB_BIT(TE));
330 /*Mark all the buffer as used to avoid sending a lost buffer*/
331 for (i = 0; i < TX_RING_SIZE; i++)
332 bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
334 /* free transmit buffer in upper layer*/
335 for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) {
336 struct ring_info *rp = &bp->tx_skb[tail];
337 struct sk_buff *skb = rp->skb;
343 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
346 dev_kfree_skb_irq(skb);
349 bp->tx_head = bp->tx_tail = 0;
351 /* Enable the transmitter again */
352 if (status & MACB_BIT(TGO))
353 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TE));
356 if (!(status & MACB_BIT(COMP)))
358 * This may happen when a buffer becomes complete
359 * between reading the ISR and scanning the
360 * descriptors. Nothing to worry about.
365 for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) {
366 struct ring_info *rp = &bp->tx_skb[tail];
367 struct sk_buff *skb = rp->skb;
373 bufstat = bp->tx_ring[tail].ctrl;
375 if (!(bufstat & MACB_BIT(TX_USED)))
378 dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n",
380 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
382 bp->stats.tx_packets++;
383 bp->stats.tx_bytes += skb->len;
385 dev_kfree_skb_irq(skb);
389 if (netif_queue_stopped(bp->dev) &&
390 TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH)
391 netif_wake_queue(bp->dev);
394 static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
395 unsigned int last_frag)
399 unsigned int offset = 0;
402 len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl);
404 dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n",
405 first_frag, last_frag, len);
407 skb = dev_alloc_skb(len + RX_OFFSET);
409 bp->stats.rx_dropped++;
410 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
411 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
412 if (frag == last_frag)
419 skb_reserve(skb, RX_OFFSET);
420 skb->ip_summed = CHECKSUM_NONE;
423 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
424 unsigned int frag_len = RX_BUFFER_SIZE;
426 if (offset + frag_len > len) {
427 BUG_ON(frag != last_frag);
428 frag_len = len - offset;
430 skb_copy_to_linear_data_offset(skb, offset,
432 (RX_BUFFER_SIZE * frag)),
434 offset += RX_BUFFER_SIZE;
435 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
438 if (frag == last_frag)
442 skb->protocol = eth_type_trans(skb, bp->dev);
444 bp->stats.rx_packets++;
445 bp->stats.rx_bytes += len;
446 dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n",
447 skb->len, skb->csum);
448 netif_receive_skb(skb);
453 /* Mark DMA descriptors from begin up to and not including end as unused */
454 static void discard_partial_frame(struct macb *bp, unsigned int begin,
459 for (frag = begin; frag != end; frag = NEXT_RX(frag))
460 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
464 * When this happens, the hardware stats registers for
465 * whatever caused this is updated, so we don't have to record
470 static int macb_rx(struct macb *bp, int budget)
473 unsigned int tail = bp->rx_tail;
476 for (; budget > 0; tail = NEXT_RX(tail)) {
480 addr = bp->rx_ring[tail].addr;
481 ctrl = bp->rx_ring[tail].ctrl;
483 if (!(addr & MACB_BIT(RX_USED)))
486 if (ctrl & MACB_BIT(RX_SOF)) {
487 if (first_frag != -1)
488 discard_partial_frame(bp, first_frag, tail);
492 if (ctrl & MACB_BIT(RX_EOF)) {
494 BUG_ON(first_frag == -1);
496 dropped = macb_rx_frame(bp, first_frag, tail);
505 if (first_frag != -1)
506 bp->rx_tail = first_frag;
513 static int macb_poll(struct napi_struct *napi, int budget)
515 struct macb *bp = container_of(napi, struct macb, napi);
519 status = macb_readl(bp, RSR);
520 macb_writel(bp, RSR, status);
525 * This may happen if an interrupt was pending before
526 * this function was called last time, and no packets
527 * have been received since.
533 dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n",
534 (unsigned long)status, budget);
536 if (!(status & MACB_BIT(REC))) {
537 dev_warn(&bp->pdev->dev,
538 "No RX buffers complete, status = %02lx\n",
539 (unsigned long)status);
544 work_done = macb_rx(bp, budget);
545 if (work_done < budget)
549 * We've done what we can to clean the buffers. Make sure we
550 * get notified when new packets arrive.
553 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
555 /* TODO: Handle errors */
560 static irqreturn_t macb_interrupt(int irq, void *dev_id)
562 struct net_device *dev = dev_id;
563 struct macb *bp = netdev_priv(dev);
566 status = macb_readl(bp, ISR);
568 if (unlikely(!status))
571 spin_lock(&bp->lock);
574 /* close possible race with dev_close */
575 if (unlikely(!netif_running(dev))) {
576 macb_writel(bp, IDR, ~0UL);
580 if (status & MACB_RX_INT_FLAGS) {
581 if (napi_schedule_prep(&bp->napi)) {
583 * There's no point taking any more interrupts
584 * until we have processed the buffers
586 macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
587 dev_dbg(&bp->pdev->dev,
588 "scheduling RX softirq\n");
589 __napi_schedule(&bp->napi);
593 if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND)))
597 * Link change detection isn't possible with RMII, so we'll
598 * add that if/when we get our hands on a full-blown MII PHY.
601 if (status & MACB_BIT(HRESP)) {
603 * TODO: Reset the hardware, and maybe move the printk
604 * to a lower-priority context as well (work queue?)
606 printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n",
610 status = macb_readl(bp, ISR);
613 spin_unlock(&bp->lock);
618 static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
620 struct macb *bp = netdev_priv(dev);
622 unsigned int len, entry;
627 dev_dbg(&bp->pdev->dev,
628 "start_xmit: len %u head %p data %p tail %p end %p\n",
629 skb->len, skb->head, skb->data,
630 skb_tail_pointer(skb), skb_end_pointer(skb));
631 dev_dbg(&bp->pdev->dev,
633 for (i = 0; i < 16; i++)
634 printk(" %02x", (unsigned int)skb->data[i]);
639 spin_lock_irq(&bp->lock);
641 /* This is a hard error, log it. */
642 if (TX_BUFFS_AVAIL(bp) < 1) {
643 netif_stop_queue(dev);
644 spin_unlock_irq(&bp->lock);
645 dev_err(&bp->pdev->dev,
646 "BUG! Tx Ring full when queue awake!\n");
647 dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n",
648 bp->tx_head, bp->tx_tail);
653 dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry);
654 mapping = dma_map_single(&bp->pdev->dev, skb->data,
656 bp->tx_skb[entry].skb = skb;
657 bp->tx_skb[entry].mapping = mapping;
658 dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n",
659 skb->data, (unsigned long)mapping);
661 ctrl = MACB_BF(TX_FRMLEN, len);
662 ctrl |= MACB_BIT(TX_LAST);
663 if (entry == (TX_RING_SIZE - 1))
664 ctrl |= MACB_BIT(TX_WRAP);
666 bp->tx_ring[entry].addr = mapping;
667 bp->tx_ring[entry].ctrl = ctrl;
670 entry = NEXT_TX(entry);
673 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
675 if (TX_BUFFS_AVAIL(bp) < 1)
676 netif_stop_queue(dev);
678 spin_unlock_irq(&bp->lock);
680 dev->trans_start = jiffies;
685 static void macb_free_consistent(struct macb *bp)
692 dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES,
693 bp->rx_ring, bp->rx_ring_dma);
697 dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES,
698 bp->tx_ring, bp->tx_ring_dma);
701 if (bp->rx_buffers) {
702 dma_free_coherent(&bp->pdev->dev,
703 RX_RING_SIZE * RX_BUFFER_SIZE,
704 bp->rx_buffers, bp->rx_buffers_dma);
705 bp->rx_buffers = NULL;
709 static int macb_alloc_consistent(struct macb *bp)
713 size = TX_RING_SIZE * sizeof(struct ring_info);
714 bp->tx_skb = kmalloc(size, GFP_KERNEL);
718 size = RX_RING_BYTES;
719 bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
720 &bp->rx_ring_dma, GFP_KERNEL);
723 dev_dbg(&bp->pdev->dev,
724 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
725 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
727 size = TX_RING_BYTES;
728 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
729 &bp->tx_ring_dma, GFP_KERNEL);
732 dev_dbg(&bp->pdev->dev,
733 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
734 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
736 size = RX_RING_SIZE * RX_BUFFER_SIZE;
737 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
738 &bp->rx_buffers_dma, GFP_KERNEL);
741 dev_dbg(&bp->pdev->dev,
742 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
743 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
748 macb_free_consistent(bp);
752 static void macb_init_rings(struct macb *bp)
757 addr = bp->rx_buffers_dma;
758 for (i = 0; i < RX_RING_SIZE; i++) {
759 bp->rx_ring[i].addr = addr;
760 bp->rx_ring[i].ctrl = 0;
761 addr += RX_BUFFER_SIZE;
763 bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP);
765 for (i = 0; i < TX_RING_SIZE; i++) {
766 bp->tx_ring[i].addr = 0;
767 bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
769 bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP);
771 bp->rx_tail = bp->tx_head = bp->tx_tail = 0;
774 static void macb_reset_hw(struct macb *bp)
776 /* Make sure we have the write buffer for ourselves */
780 * Disable RX and TX (XXX: Should we halt the transmission
783 macb_writel(bp, NCR, 0);
785 /* Clear the stats registers (XXX: Update stats first?) */
786 macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
788 /* Clear all status flags */
789 macb_writel(bp, TSR, ~0UL);
790 macb_writel(bp, RSR, ~0UL);
792 /* Disable all interrupts */
793 macb_writel(bp, IDR, ~0UL);
797 static void macb_init_hw(struct macb *bp)
802 __macb_set_hwaddr(bp);
804 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
805 config |= MACB_BIT(PAE); /* PAuse Enable */
806 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
807 if (bp->dev->flags & IFF_PROMISC)
808 config |= MACB_BIT(CAF); /* Copy All Frames */
809 if (!(bp->dev->flags & IFF_BROADCAST))
810 config |= MACB_BIT(NBC); /* No BroadCast */
811 macb_writel(bp, NCFGR, config);
813 /* Initialize TX and RX buffers */
814 macb_writel(bp, RBQP, bp->rx_ring_dma);
815 macb_writel(bp, TBQP, bp->tx_ring_dma);
817 /* Enable TX and RX */
818 macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
820 /* Enable interrupts */
821 macb_writel(bp, IER, (MACB_BIT(RCOMP)
833 * The hash address register is 64 bits long and takes up two
834 * locations in the memory map. The least significant bits are stored
835 * in EMAC_HSL and the most significant bits in EMAC_HSH.
837 * The unicast hash enable and the multicast hash enable bits in the
838 * network configuration register enable the reception of hash matched
839 * frames. The destination address is reduced to a 6 bit index into
840 * the 64 bit hash register using the following hash function. The
841 * hash function is an exclusive or of every sixth bit of the
842 * destination address.
844 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
845 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
846 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
847 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
848 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
849 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
851 * da[0] represents the least significant bit of the first byte
852 * received, that is, the multicast/unicast indicator, and da[47]
853 * represents the most significant bit of the last byte received. If
854 * the hash index, hi[n], points to a bit that is set in the hash
855 * register then the frame will be matched according to whether the
856 * frame is multicast or unicast. A multicast match will be signalled
857 * if the multicast hash enable bit is set, da[0] is 1 and the hash
858 * index points to a bit set in the hash register. A unicast match
859 * will be signalled if the unicast hash enable bit is set, da[0] is 0
860 * and the hash index points to a bit set in the hash register. To
861 * receive all multicast frames, the hash register should be set with
862 * all ones and the multicast hash enable bit should be set in the
863 * network configuration register.
866 static inline int hash_bit_value(int bitnr, __u8 *addr)
868 if (addr[bitnr / 8] & (1 << (bitnr % 8)))
874 * Return the hash index value for the specified address.
876 static int hash_get_index(__u8 *addr)
881 for (j = 0; j < 6; j++) {
882 for (i = 0, bitval = 0; i < 8; i++)
883 bitval ^= hash_bit_value(i*6 + j, addr);
885 hash_index |= (bitval << j);
892 * Add multicast addresses to the internal multicast-hash table.
894 static void macb_sethashtable(struct net_device *dev)
896 struct dev_mc_list *curr;
897 unsigned long mc_filter[2];
898 unsigned int i, bitnr;
899 struct macb *bp = netdev_priv(dev);
901 mc_filter[0] = mc_filter[1] = 0;
904 for (i = 0; i < dev->mc_count; i++, curr = curr->next) {
905 if (!curr) break; /* unexpected end of list */
907 bitnr = hash_get_index(curr->dmi_addr);
908 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
911 macb_writel(bp, HRB, mc_filter[0]);
912 macb_writel(bp, HRT, mc_filter[1]);
916 * Enable/Disable promiscuous and multicast modes.
918 static void macb_set_rx_mode(struct net_device *dev)
921 struct macb *bp = netdev_priv(dev);
923 cfg = macb_readl(bp, NCFGR);
925 if (dev->flags & IFF_PROMISC)
926 /* Enable promiscuous mode */
927 cfg |= MACB_BIT(CAF);
928 else if (dev->flags & (~IFF_PROMISC))
929 /* Disable promiscuous mode */
930 cfg &= ~MACB_BIT(CAF);
932 if (dev->flags & IFF_ALLMULTI) {
933 /* Enable all multicast mode */
934 macb_writel(bp, HRB, -1);
935 macb_writel(bp, HRT, -1);
936 cfg |= MACB_BIT(NCFGR_MTI);
937 } else if (dev->mc_count > 0) {
938 /* Enable specific multicasts */
939 macb_sethashtable(dev);
940 cfg |= MACB_BIT(NCFGR_MTI);
941 } else if (dev->flags & (~IFF_ALLMULTI)) {
942 /* Disable all multicast mode */
943 macb_writel(bp, HRB, 0);
944 macb_writel(bp, HRT, 0);
945 cfg &= ~MACB_BIT(NCFGR_MTI);
948 macb_writel(bp, NCFGR, cfg);
951 static int macb_open(struct net_device *dev)
953 struct macb *bp = netdev_priv(dev);
956 dev_dbg(&bp->pdev->dev, "open\n");
958 /* if the phy is not yet register, retry later*/
962 if (!is_valid_ether_addr(dev->dev_addr))
963 return -EADDRNOTAVAIL;
965 err = macb_alloc_consistent(bp);
968 "%s: Unable to allocate DMA memory (error %d)\n",
973 napi_enable(&bp->napi);
978 /* schedule a link state check */
979 phy_start(bp->phy_dev);
981 netif_start_queue(dev);
986 static int macb_close(struct net_device *dev)
988 struct macb *bp = netdev_priv(dev);
991 netif_stop_queue(dev);
992 napi_disable(&bp->napi);
995 phy_stop(bp->phy_dev);
997 spin_lock_irqsave(&bp->lock, flags);
999 netif_carrier_off(dev);
1000 spin_unlock_irqrestore(&bp->lock, flags);
1002 macb_free_consistent(bp);
1007 static struct net_device_stats *macb_get_stats(struct net_device *dev)
1009 struct macb *bp = netdev_priv(dev);
1010 struct net_device_stats *nstat = &bp->stats;
1011 struct macb_stats *hwstat = &bp->hw_stats;
1013 /* read stats from hardware */
1014 macb_update_stats(bp);
1016 /* Convert HW stats into netdevice stats */
1017 nstat->rx_errors = (hwstat->rx_fcs_errors +
1018 hwstat->rx_align_errors +
1019 hwstat->rx_resource_errors +
1020 hwstat->rx_overruns +
1021 hwstat->rx_oversize_pkts +
1022 hwstat->rx_jabbers +
1023 hwstat->rx_undersize_pkts +
1024 hwstat->sqe_test_errors +
1025 hwstat->rx_length_mismatch);
1026 nstat->tx_errors = (hwstat->tx_late_cols +
1027 hwstat->tx_excessive_cols +
1028 hwstat->tx_underruns +
1029 hwstat->tx_carrier_errors);
1030 nstat->collisions = (hwstat->tx_single_cols +
1031 hwstat->tx_multiple_cols +
1032 hwstat->tx_excessive_cols);
1033 nstat->rx_length_errors = (hwstat->rx_oversize_pkts +
1034 hwstat->rx_jabbers +
1035 hwstat->rx_undersize_pkts +
1036 hwstat->rx_length_mismatch);
1037 nstat->rx_over_errors = hwstat->rx_resource_errors;
1038 nstat->rx_crc_errors = hwstat->rx_fcs_errors;
1039 nstat->rx_frame_errors = hwstat->rx_align_errors;
1040 nstat->rx_fifo_errors = hwstat->rx_overruns;
1041 /* XXX: What does "missed" mean? */
1042 nstat->tx_aborted_errors = hwstat->tx_excessive_cols;
1043 nstat->tx_carrier_errors = hwstat->tx_carrier_errors;
1044 nstat->tx_fifo_errors = hwstat->tx_underruns;
1045 /* Don't know about heartbeat or window errors... */
1050 static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1052 struct macb *bp = netdev_priv(dev);
1053 struct phy_device *phydev = bp->phy_dev;
1058 return phy_ethtool_gset(phydev, cmd);
1061 static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1063 struct macb *bp = netdev_priv(dev);
1064 struct phy_device *phydev = bp->phy_dev;
1069 return phy_ethtool_sset(phydev, cmd);
1072 static void macb_get_drvinfo(struct net_device *dev,
1073 struct ethtool_drvinfo *info)
1075 struct macb *bp = netdev_priv(dev);
1077 strcpy(info->driver, bp->pdev->dev.driver->name);
1078 strcpy(info->version, "$Revision: 1.14 $");
1079 strcpy(info->bus_info, dev_name(&bp->pdev->dev));
1082 static struct ethtool_ops macb_ethtool_ops = {
1083 .get_settings = macb_get_settings,
1084 .set_settings = macb_set_settings,
1085 .get_drvinfo = macb_get_drvinfo,
1086 .get_link = ethtool_op_get_link,
1089 static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1091 struct macb *bp = netdev_priv(dev);
1092 struct phy_device *phydev = bp->phy_dev;
1094 if (!netif_running(dev))
1100 return phy_mii_ioctl(phydev, if_mii(rq), cmd);
1103 static const struct net_device_ops macb_netdev_ops = {
1104 .ndo_open = macb_open,
1105 .ndo_stop = macb_close,
1106 .ndo_start_xmit = macb_start_xmit,
1107 .ndo_set_multicast_list = macb_set_rx_mode,
1108 .ndo_get_stats = macb_get_stats,
1109 .ndo_do_ioctl = macb_ioctl,
1110 .ndo_validate_addr = eth_validate_addr,
1111 .ndo_change_mtu = eth_change_mtu,
1112 .ndo_set_mac_address = eth_mac_addr,
1115 static int __init macb_probe(struct platform_device *pdev)
1117 struct eth_platform_data *pdata;
1118 struct resource *regs;
1119 struct net_device *dev;
1121 struct phy_device *phydev;
1122 unsigned long pclk_hz;
1126 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1128 dev_err(&pdev->dev, "no mmio resource defined\n");
1133 dev = alloc_etherdev(sizeof(*bp));
1135 dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
1139 SET_NETDEV_DEV(dev, &pdev->dev);
1141 /* TODO: Actually, we have some interesting features... */
1144 bp = netdev_priv(dev);
1148 spin_lock_init(&bp->lock);
1150 #if defined(CONFIG_ARCH_AT91)
1151 bp->pclk = clk_get(&pdev->dev, "macb_clk");
1152 if (IS_ERR(bp->pclk)) {
1153 dev_err(&pdev->dev, "failed to get macb_clk\n");
1154 goto err_out_free_dev;
1156 clk_enable(bp->pclk);
1158 bp->pclk = clk_get(&pdev->dev, "pclk");
1159 if (IS_ERR(bp->pclk)) {
1160 dev_err(&pdev->dev, "failed to get pclk\n");
1161 goto err_out_free_dev;
1163 bp->hclk = clk_get(&pdev->dev, "hclk");
1164 if (IS_ERR(bp->hclk)) {
1165 dev_err(&pdev->dev, "failed to get hclk\n");
1166 goto err_out_put_pclk;
1169 clk_enable(bp->pclk);
1170 clk_enable(bp->hclk);
1173 bp->regs = ioremap(regs->start, regs->end - regs->start + 1);
1175 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
1177 goto err_out_disable_clocks;
1180 dev->irq = platform_get_irq(pdev, 0);
1181 err = request_irq(dev->irq, macb_interrupt, IRQF_SAMPLE_RANDOM,
1185 "%s: Unable to request IRQ %d (error %d)\n",
1186 dev->name, dev->irq, err);
1187 goto err_out_iounmap;
1190 dev->netdev_ops = &macb_netdev_ops;
1191 netif_napi_add(dev, &bp->napi, macb_poll, 64);
1192 dev->ethtool_ops = &macb_ethtool_ops;
1194 dev->base_addr = regs->start;
1196 /* Set MII management clock divider */
1197 pclk_hz = clk_get_rate(bp->pclk);
1198 if (pclk_hz <= 20000000)
1199 config = MACB_BF(CLK, MACB_CLK_DIV8);
1200 else if (pclk_hz <= 40000000)
1201 config = MACB_BF(CLK, MACB_CLK_DIV16);
1202 else if (pclk_hz <= 80000000)
1203 config = MACB_BF(CLK, MACB_CLK_DIV32);
1205 config = MACB_BF(CLK, MACB_CLK_DIV64);
1206 macb_writel(bp, NCFGR, config);
1208 macb_get_hwaddr(bp);
1209 pdata = pdev->dev.platform_data;
1211 if (pdata && pdata->is_rmii)
1212 #if defined(CONFIG_ARCH_AT91)
1213 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
1215 macb_writel(bp, USRIO, 0);
1218 #if defined(CONFIG_ARCH_AT91)
1219 macb_writel(bp, USRIO, MACB_BIT(CLKEN));
1221 macb_writel(bp, USRIO, MACB_BIT(MII));
1224 bp->tx_pending = DEF_TX_RING_PENDING;
1226 err = register_netdev(dev);
1228 dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
1229 goto err_out_free_irq;
1232 if (macb_mii_init(bp) != 0) {
1233 goto err_out_unregister_netdev;
1236 platform_set_drvdata(pdev, dev);
1238 printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d (%pM)\n",
1239 dev->name, dev->base_addr, dev->irq, dev->dev_addr);
1241 phydev = bp->phy_dev;
1242 printk(KERN_INFO "%s: attached PHY driver [%s] "
1243 "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name,
1244 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1248 err_out_unregister_netdev:
1249 unregister_netdev(dev);
1251 free_irq(dev->irq, dev);
1254 err_out_disable_clocks:
1255 #ifndef CONFIG_ARCH_AT91
1256 clk_disable(bp->hclk);
1259 clk_disable(bp->pclk);
1260 #ifndef CONFIG_ARCH_AT91
1267 platform_set_drvdata(pdev, NULL);
1271 static int __exit macb_remove(struct platform_device *pdev)
1273 struct net_device *dev;
1276 dev = platform_get_drvdata(pdev);
1279 bp = netdev_priv(dev);
1281 phy_disconnect(bp->phy_dev);
1282 mdiobus_unregister(bp->mii_bus);
1283 kfree(bp->mii_bus->irq);
1284 mdiobus_free(bp->mii_bus);
1285 unregister_netdev(dev);
1286 free_irq(dev->irq, dev);
1288 #ifndef CONFIG_ARCH_AT91
1289 clk_disable(bp->hclk);
1292 clk_disable(bp->pclk);
1295 platform_set_drvdata(pdev, NULL);
1302 static int macb_suspend(struct platform_device *pdev, pm_message_t state)
1304 struct net_device *netdev = platform_get_drvdata(pdev);
1305 struct macb *bp = netdev_priv(netdev);
1307 netif_device_detach(netdev);
1309 #ifndef CONFIG_ARCH_AT91
1310 clk_disable(bp->hclk);
1312 clk_disable(bp->pclk);
1317 static int macb_resume(struct platform_device *pdev)
1319 struct net_device *netdev = platform_get_drvdata(pdev);
1320 struct macb *bp = netdev_priv(netdev);
1322 clk_enable(bp->pclk);
1323 #ifndef CONFIG_ARCH_AT91
1324 clk_enable(bp->hclk);
1327 netif_device_attach(netdev);
1332 #define macb_suspend NULL
1333 #define macb_resume NULL
1336 static struct platform_driver macb_driver = {
1337 .remove = __exit_p(macb_remove),
1338 .suspend = macb_suspend,
1339 .resume = macb_resume,
1342 .owner = THIS_MODULE,
1346 static int __init macb_init(void)
1348 return platform_driver_probe(&macb_driver, macb_probe);
1351 static void __exit macb_exit(void)
1353 platform_driver_unregister(&macb_driver);
1356 module_init(macb_init);
1357 module_exit(macb_exit);
1359 MODULE_LICENSE("GPL");
1360 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1361 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1362 MODULE_ALIAS("platform:macb");