2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix = mipsel-linux-
26 64bit-tool-prefix = mips64el-linux-
27 32bit-bfd = elf32-tradlittlemips
28 64bit-bfd = elf64-tradlittlemips
29 32bit-emul = elf32ltsmip
30 64bit-emul = elf64ltsmip
32 32bit-tool-prefix = mips-linux-
33 64bit-tool-prefix = mips64-linux-
34 32bit-bfd = elf32-tradbigmips
35 64bit-bfd = elf64-tradbigmips
36 32bit-emul = elf32btsmip
37 64bit-emul = elf64btsmip
42 tool-prefix = $(32bit-tool-prefix)
47 tool-prefix = $(64bit-tool-prefix)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE := $(tool-prefix)
55 CHECKFLAGS-y += -D__linux__ -D__mips__ \
60 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
63 -D__PTRDIFF_TYPE__=int
64 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
67 -D__PTRDIFF_TYPE__="long int"
68 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
69 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
71 CHECKFLAGS = $(CHECKFLAGS-y)
73 ifdef CONFIG_BUILD_ELF64
75 ld-emul = $(64bit-emul)
76 vmlinux-32 = vmlinux.32
80 ld-emul = $(32bit-emul)
82 vmlinux-64 = vmlinux.64
84 cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
88 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
89 # code since it only slows down the whole thing. At some point we might make
90 # use of global pointer optimizations but their use of $28 conflicts with
91 # the current pointer optimization.
93 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
94 # machines may also. Since BFD is incredibly buggy with respect to
95 # crossformat linking we rely on the elf2ecoff tool for format conversion.
97 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
98 cflags-y += -msoft-float
99 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
100 MODFLAGS += -mlong-calls
103 # We explicitly add the endianness specifier if needed, this allows
104 # to compile kernels with a toolchain for the other endianness. We
105 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
106 # when fed the toolchain default!
108 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
109 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
111 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
112 -fno-omit-frame-pointer
115 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
117 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
119 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
120 # with up to the oldest supported tools)
121 # <isa2> -- an ISA designation used as an ABI selector for
122 # gcc versions that do not support "-mabi=32"
123 # (depending on the CPU type, either "mips1" or
126 set_gccflags = $(shell \
128 cpu=$(1); isa=-$(2); \
129 for gcc_opt in -march= -mcpu=; do \
130 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
131 -xc /dev/null > /dev/null 2>&1 && \
134 cpu=$(3); isa=-$(4); \
135 for gcc_opt in -march= -mcpu=; do \
136 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
137 -xc /dev/null > /dev/null 2>&1 && \
142 gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
143 if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
146 gcc_abi=; gcc_isa=-$(5); \
148 gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
150 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
151 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
152 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
155 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
158 if test "$(gcc-abi)" != "$(gas-abi)"; then \
159 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
161 if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
162 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
163 -xc /dev/null > /dev/null 2>&1 && \
166 echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
169 # CPU-dependent compiler/assembler options for optimization.
171 cflags-$(CONFIG_CPU_R3000) += \
172 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
173 CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
175 cflags-$(CONFIG_CPU_TX39XX) += \
176 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
177 CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
179 cflags-$(CONFIG_CPU_R6000) += \
180 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
182 CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
184 cflags-$(CONFIG_CPU_R4300) += \
185 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
187 CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
189 cflags-$(CONFIG_CPU_VR41XX) += \
190 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
192 CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
194 cflags-$(CONFIG_CPU_R4X00) += \
195 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
197 CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
199 cflags-$(CONFIG_CPU_TX49XX) += \
200 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
202 CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
204 cflags-$(CONFIG_CPU_MIPS32_R1) += \
205 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
207 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
209 cflags-$(CONFIG_CPU_MIPS32_R2) += \
210 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
212 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
214 cflags-$(CONFIG_CPU_MIPS64_R1) += \
215 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
217 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
219 cflags-$(CONFIG_CPU_MIPS64_R2) += \
220 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
222 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
224 cflags-$(CONFIG_CPU_R5000) += \
225 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
227 CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
229 cflags-$(CONFIG_CPU_R5432) += \
230 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
232 CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
234 cflags-$(CONFIG_CPU_NEVADA) += \
235 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
237 CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
239 cflags-$(CONFIG_CPU_RM7000) += \
240 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
242 CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
244 cflags-$(CONFIG_CPU_RM9000) += \
245 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
247 CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
250 cflags-$(CONFIG_CPU_SB1) += \
251 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
253 CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
255 cflags-$(CONFIG_CPU_R8000) += \
256 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
258 CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
260 cflags-$(CONFIG_CPU_R10000) += \
261 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
263 CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
266 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
267 MODFLAGS += -msb1-pass1-workarounds
274 libs-$(CONFIG_ARC) += arch/mips/arc/
275 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
278 # Board-dependent options and extra files
282 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
284 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
285 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
286 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
289 # Common Alchemy Au1x00 stuff
291 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
292 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
295 # AMD Alchemy Pb1000 eval board
297 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
298 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
299 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
302 # AMD Alchemy Pb1100 eval board
304 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
305 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
306 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
309 # AMD Alchemy Pb1500 eval board
311 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
312 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
313 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
316 # AMD Alchemy Pb1550 eval board
318 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
319 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
320 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
323 # AMD Alchemy Pb1200 eval board
325 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
326 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
327 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
330 # AMD Alchemy Db1000 eval board
332 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
333 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
334 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
337 # AMD Alchemy Db1100 eval board
339 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
340 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
341 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
344 # AMD Alchemy Db1500 eval board
346 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
347 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
348 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
351 # AMD Alchemy Db1550 eval board
353 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
354 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
355 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
358 # AMD Alchemy Db1200 eval board
360 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
361 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
362 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
365 # AMD Alchemy Bosporus eval board
367 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
368 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
369 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
372 # AMD Alchemy Mirage eval board
374 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
375 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
376 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
379 # 4G-Systems eval board
381 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
382 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
387 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
388 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
393 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
394 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
395 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
400 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
401 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
402 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
403 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
404 CLEAN_FILES += drivers/tc/lk201-map.c
407 # Galileo EV64120 Board
409 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
410 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
411 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
412 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
415 # Galileo EV96100 Board
417 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
418 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
419 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
422 # Globespan IVR eval board with QED 5231 CPU
424 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
425 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
426 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
429 # ITE 8172 eval board with QED 5231 CPU
431 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
432 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
435 # For all MIPS, Inc. eval boards
437 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
442 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
443 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
444 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
445 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
450 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
451 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
452 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
457 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
458 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
463 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
464 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
465 load-$(CONFIG_MIPS_SIM) += 0x80100000
468 # Momentum Ocelot board
470 # The Ocelot setup.o must be linked early - it does the ioremap() for the
473 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
474 arch/mips/gt64120/momenco_ocelot/
475 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
476 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
479 # Momentum Ocelot-G board
481 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
484 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
485 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
488 # Momentum Ocelot-C and -CS boards
490 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
492 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
493 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
496 # PMC-Sierra Yosemite
498 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
499 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
500 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
502 # Qemu simulating MIPS32 4Kc
504 core-$(CONFIG_QEMU) += arch/mips/qemu/
505 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
506 load-$(CONFIG_QEMU) += 0xffffffff80010000
511 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
512 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
513 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
516 # Momentum Jaguar ATX
518 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
519 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
520 #ifdef CONFIG_JAGUAR_DMALOW
521 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
523 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
529 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
534 core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
535 load-$(CONFIG_DDB5074) += 0xffffffff80080000
540 core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
541 load-$(CONFIG_DDB5476) += 0xffffffff80080000
546 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
547 load-$(CONFIG_DDB5477) += 0xffffffff80100000
549 core-$(CONFIG_LASAT) += arch/mips/lasat/
550 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
551 load-$(CONFIG_LASAT) += 0xffffffff80000000
556 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
557 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
562 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
563 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
566 # ZAO Networks Capcella (VR4131)
568 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
571 # Victor MP-C303/304 (VR4122)
573 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
576 # IBM WorkPad z50 (VR4121)
578 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
579 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
582 # CASIO CASSIPEIA E-55/65 (VR4111)
584 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
585 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
588 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
590 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
593 # Common Philips PNX8550
595 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
596 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
599 # Philips PNX8550 JBS board
601 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
602 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
603 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
606 # SGI IP22 (Indy/Indigo2)
608 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
609 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
610 # be aligned to a multiple of the kernel stack size or the handling of the
611 # current variable will break so for 64-bit kernels we have to raise the start
614 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
615 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
617 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
620 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
624 # SGI-IP27 (Origin200/2000)
626 # Set the load address to >= 0xc000000000300000 if you want to leave space for
627 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
628 # be 16kb aligned or the handling of the current variable will break.
630 ifdef CONFIG_SGI_IP27
631 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
632 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
633 ifdef CONFIG_BUILD_ELF64
634 ifdef CONFIG_MAPPED_KERNEL
635 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
636 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
637 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
639 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
640 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
643 ifdef CONFIG_MAPPED_KERNEL
644 load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
645 OBJCOPYFLAGS := --change-addresses=0xc000000080000000
646 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
648 load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
649 OBJCOPYFLAGS := --change-addresses=0xa800000080000000
657 # Set the load address to >= 80069000 if you want to leave space for symmon,
658 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
659 # a multiple of the kernel stack size or the handling of the current variable
662 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
663 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
664 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
669 # This is a LIB so that it links at the end, and initcalls are later
670 # the sequence; but it is built as an object so that modules don't get
671 # removed (as happens, even if they have __initcall/module_init)
673 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
674 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
675 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
677 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
678 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
679 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
681 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
682 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
683 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
685 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
686 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
687 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
690 # Sibyte BCM91120x (Carmel) board
691 # Sibyte BCM91120C (CRhine) board
692 # Sibyte BCM91125C (CRhone) board
693 # Sibyte BCM91125E (Rhone) board
695 # Sibyte BCM91x80 (BigSur) board
697 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
698 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
699 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
700 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
701 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
702 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
703 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
704 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
705 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
706 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
707 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
708 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
709 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
710 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
715 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
716 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
717 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
720 # Toshiba JMR-TX3927 board
722 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
723 arch/mips/jmr3927/common/
724 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
725 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
728 # Toshiba RBTX4927 board or
729 # Toshiba RBTX4937 board
731 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
732 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
733 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
736 # Toshiba RBTX4938 board
738 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
739 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
740 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
742 cflags-y += -Iinclude/asm-mips/mach-generic
743 drivers-$(CONFIG_PCI) += arch/mips/pci/
746 ifdef CONFIG_CPU_LITTLE_ENDIAN
749 JIFFIES = jiffies_64 + 4
755 AFLAGS += $(cflags-y)
756 CFLAGS += $(cflags-y)
758 LDFLAGS += -m $(ld-emul)
760 OBJCOPYFLAGS += --remove-section=.reginfo
763 # Choosing incompatible machines durings configuration will result in
764 # error messages during linking. Select a default linkscript if
765 # none has been choosen above.
768 CPPFLAGS_vmlinux.lds := \
770 -D"LOADADDR=$(load-y)" \
771 -D"JIFFIES=$(JIFFIES)" \
772 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
774 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
776 libs-y += arch/mips/lib/
777 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
778 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
780 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
782 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
785 rom.bin rom.sw: vmlinux
786 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
790 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
791 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
792 # convert to ECOFF using elf2ecoff.
795 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
798 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
799 # ELF files from 32-bit files by conversion.
802 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
804 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
806 ifdef CONFIG_BOOT_ELF32
810 ifdef CONFIG_BOOT_ELF64
814 ifdef CONFIG_MIPS_ATLAS
818 ifdef CONFIG_MIPS_MALTA
822 ifdef CONFIG_MIPS_SEAD
830 ifdef CONFIG_SNI_RM200_PCI
834 vmlinux.bin: $(vmlinux-32)
835 +@$(call makeboot,$@)
837 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
838 +@$(call makeboot,$@)
840 vmlinux.srec: $(vmlinux-32)
841 +@$(call makeboot,$@)
843 CLEAN_FILES += vmlinux.ecoff \
849 @$(MAKE) $(clean)=arch/mips/boot
850 @$(MAKE) $(clean)=arch/mips/lasat
852 CLEAN_FILES += vmlinux.32 \