3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
28 * 04/16/05 Dustin McIntire Initial version
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
59 #include <linux/config.h>
60 #include <linux/init.h>
61 #include <linux/module.h>
62 #include <linux/kernel.h>
63 #include <linux/sched.h>
64 #include <linux/slab.h>
65 #include <linux/delay.h>
66 #include <linux/interrupt.h>
67 #include <linux/errno.h>
68 #include <linux/ioport.h>
69 #include <linux/crc32.h>
70 #include <linux/device.h>
71 #include <linux/platform_device.h>
72 #include <linux/spinlock.h>
73 #include <linux/ethtool.h>
74 #include <linux/mii.h>
75 #include <linux/workqueue.h>
77 #include <linux/netdevice.h>
78 #include <linux/etherdevice.h>
79 #include <linux/skbuff.h>
87 * Transmit timeout, default 5 seconds.
89 static int watchdog = 5000;
90 module_param(watchdog, int, 0400);
91 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
93 static int tx_fifo_kb=8;
94 module_param(tx_fifo_kb, int, 0400);
95 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
97 MODULE_LICENSE("GPL");
100 * The internal workings of the driver. If you are changing anything
101 * here with the SMC stuff, you should have the datasheet and know
102 * what you are doing.
104 #define CARDNAME "smc911x"
107 * Use power-down feature of the chip
112 /* store this information for the driver.. */
113 struct smc911x_local {
115 * If I have to wait until the DMA is finished and ready to reload a
116 * packet, I will store the skbuff here. Then, the DMA will send it
119 struct sk_buff *pending_tx_skb;
122 * these are things that the kernel wants me to keep, so users
123 * can find out semi-useless statistics of how well the card is
126 struct net_device_stats stats;
128 /* version/revision of the SMC911x chip */
138 /* Contains the current active receive/phy mode */
144 struct mii_if_info mii;
147 struct work_struct phy_configure;
154 /* DMA needs the physical address of the chip */
160 struct sk_buff *current_rx_skb;
161 struct sk_buff *current_tx_skb;
167 #define DBG(n, args...) \
169 if (SMC_DEBUG & (n)) \
173 #define PRINTK(args...) printk(args)
175 #define DBG(n, args...) do { } while (0)
176 #define PRINTK(args...) printk(KERN_DEBUG args)
179 #if SMC_DEBUG_PKTS > 0
180 static void PRINT_PKT(u_char *buf, int length)
187 remainder = length % 16;
189 for (i = 0; i < lines ; i ++) {
191 for (cur = 0; cur < 8; cur++) {
195 printk("%02x%02x ", a, b);
199 for (i = 0; i < remainder/2 ; i++) {
203 printk("%02x%02x ", a, b);
208 #define PRINT_PKT(x...) do { } while (0)
212 /* this enables an interrupt in the interrupt mask register */
213 #define SMC_ENABLE_INT(x) do { \
214 unsigned int __mask; \
215 unsigned long __flags; \
216 spin_lock_irqsave(&lp->lock, __flags); \
217 __mask = SMC_GET_INT_EN(); \
219 SMC_SET_INT_EN(__mask); \
220 spin_unlock_irqrestore(&lp->lock, __flags); \
223 /* this disables an interrupt from the interrupt mask register */
224 #define SMC_DISABLE_INT(x) do { \
225 unsigned int __mask; \
226 unsigned long __flags; \
227 spin_lock_irqsave(&lp->lock, __flags); \
228 __mask = SMC_GET_INT_EN(); \
230 SMC_SET_INT_EN(__mask); \
231 spin_unlock_irqrestore(&lp->lock, __flags); \
235 * this does a soft reset on the device
237 static void smc911x_reset(struct net_device *dev)
239 unsigned long ioaddr = dev->base_addr;
240 struct smc911x_local *lp = netdev_priv(dev);
241 unsigned int reg, timeout=0, resets=1;
244 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
246 /* Take out of PM setting first */
247 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
248 /* Write to the bytetest will take out of powerdown */
249 SMC_SET_BYTE_TEST(0);
253 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
254 } while ( timeout-- && !reg);
256 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
261 /* Disable all interrupts */
262 spin_lock_irqsave(&lp->lock, flags);
264 spin_unlock_irqrestore(&lp->lock, flags);
267 SMC_SET_HW_CFG(HW_CFG_SRST_);
271 reg = SMC_GET_HW_CFG();
272 /* If chip indicates reset timeout then try again */
273 if (reg & HW_CFG_SRST_TO_) {
274 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
278 } while ( timeout-- && (reg & HW_CFG_SRST_));
281 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
285 /* make sure EEPROM has finished loading before setting GPIO_CFG */
287 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
291 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
295 /* Initialize interrupts */
299 /* Reset the FIFO level and flow control settings */
300 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
301 //TODO: Figure out what appropriate pause time is
302 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
303 SMC_SET_AFC_CFG(lp->afc_cfg);
306 /* Set to LED outputs */
307 SMC_SET_GPIO_CFG(0x70070000);
310 * Deassert IRQ for 1*10us for edge type interrupts
311 * and drive IRQ pin push-pull
313 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
315 /* clear anything saved */
316 if (lp->pending_tx_skb != NULL) {
317 dev_kfree_skb (lp->pending_tx_skb);
318 lp->pending_tx_skb = NULL;
319 lp->stats.tx_errors++;
320 lp->stats.tx_aborted_errors++;
325 * Enable Interrupts, Receive, and Transmit
327 static void smc911x_enable(struct net_device *dev)
329 unsigned long ioaddr = dev->base_addr;
330 struct smc911x_local *lp = netdev_priv(dev);
331 unsigned mask, cfg, cr;
334 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
336 SMC_SET_MAC_ADDR(dev->dev_addr);
339 cfg = SMC_GET_HW_CFG();
340 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
343 SMC_SET_FIFO_TDA(0xFF);
344 /* Update TX stats on every 64 packets received or every 1 sec */
345 SMC_SET_FIFO_TSL(64);
346 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
348 spin_lock_irqsave(&lp->lock, flags);
350 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
352 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
353 spin_unlock_irqrestore(&lp->lock, flags);
355 /* Add 2 byte padding to start of packets */
356 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
358 /* Turn on receiver and enable RX */
359 if (cr & MAC_CR_RXEN_)
360 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
362 spin_lock_irqsave(&lp->lock, flags);
363 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
364 spin_unlock_irqrestore(&lp->lock, flags);
366 /* Interrupt on every received packet */
367 SMC_SET_FIFO_RSA(0x01);
368 SMC_SET_FIFO_RSL(0x00);
370 /* now, enable interrupts */
371 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
372 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
374 if (IS_REV_A(lp->revision))
375 mask|=INT_EN_RDFL_EN_;
377 mask|=INT_EN_RDFO_EN_;
379 SMC_ENABLE_INT(mask);
383 * this puts the device in an inactive state
385 static void smc911x_shutdown(struct net_device *dev)
387 unsigned long ioaddr = dev->base_addr;
388 struct smc911x_local *lp = netdev_priv(dev);
392 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
397 /* Turn of Rx and TX */
398 spin_lock_irqsave(&lp->lock, flags);
400 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
402 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
403 spin_unlock_irqrestore(&lp->lock, flags);
406 static inline void smc911x_drop_pkt(struct net_device *dev)
408 unsigned long ioaddr = dev->base_addr;
409 unsigned int fifo_count, timeout, reg;
411 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
412 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
413 if (fifo_count <= 4) {
414 /* Manually dump the packet data */
418 /* Fast forward through the bad packet */
419 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
423 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
424 } while ( timeout-- && reg);
426 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
432 * This is the procedure to handle the receipt of a packet.
433 * It should be called after checking for packet presence in
434 * the RX status FIFO. It must be called with the spin lock
437 static inline void smc911x_rcv(struct net_device *dev)
439 struct smc911x_local *lp = netdev_priv(dev);
440 unsigned long ioaddr = dev->base_addr;
441 unsigned int pkt_len, status;
445 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
446 dev->name, __FUNCTION__);
447 status = SMC_GET_RX_STS_FIFO();
448 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
449 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
450 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
451 if (status & RX_STS_ES_) {
452 /* Deal with a bad packet */
453 lp->stats.rx_errors++;
454 if (status & RX_STS_CRC_ERR_)
455 lp->stats.rx_crc_errors++;
457 if (status & RX_STS_LEN_ERR_)
458 lp->stats.rx_length_errors++;
459 if (status & RX_STS_MCAST_)
460 lp->stats.multicast++;
462 /* Remove the bad packet data from the RX FIFO */
463 smc911x_drop_pkt(dev);
465 /* Receive a valid packet */
466 /* Alloc a buffer with extra room for DMA alignment */
467 skb=dev_alloc_skb(pkt_len+32);
468 if (unlikely(skb == NULL)) {
469 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
471 lp->stats.rx_dropped++;
472 smc911x_drop_pkt(dev);
475 /* Align IP header to 32 bits
476 * Note that the device is configured to add a 2
477 * byte padding to the packet start, so we really
478 * want to write to the orignal data pointer */
481 skb_put(skb,pkt_len-4);
485 /* Lower the FIFO threshold if possible */
486 fifo = SMC_GET_FIFO_INT();
487 if (fifo & 0xFF) fifo--;
488 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
489 dev->name, fifo & 0xff);
490 SMC_SET_FIFO_INT(fifo);
492 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
493 lp->rxdma_active = 1;
494 lp->current_rx_skb = skb;
495 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
496 /* Packet processing deferred to DMA RX interrupt */
499 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
500 SMC_PULL_DATA(data, pkt_len+2+3);
502 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,);
503 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
504 dev->last_rx = jiffies;
506 skb->protocol = eth_type_trans(skb, dev);
508 lp->stats.rx_packets++;
509 lp->stats.rx_bytes += pkt_len-4;
515 * This is called to actually send a packet to the chip.
517 static void smc911x_hardware_send_pkt(struct net_device *dev)
519 struct smc911x_local *lp = netdev_priv(dev);
520 unsigned long ioaddr = dev->base_addr;
522 unsigned int cmdA, cmdB, len;
526 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
527 BUG_ON(lp->pending_tx_skb == NULL);
529 skb = lp->pending_tx_skb;
530 lp->pending_tx_skb = NULL;
532 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
533 /* cmdB {31:16] pkt tag [10:0] length */
535 /* 16 byte buffer alignment mode */
536 buf = (char*)((u32)(skb->data) & ~0xF);
537 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
538 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
539 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
542 buf = (char*)((u32)skb->data & ~0x3);
543 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
544 cmdA = (((u32)skb->data & 0x3) << 16) |
545 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
548 /* tag is packet length so we can use this in stats update later */
549 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
551 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
552 dev->name, len, len, buf, cmdA, cmdB);
553 SMC_SET_TX_FIFO(cmdA);
554 SMC_SET_TX_FIFO(cmdB);
556 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
557 PRINT_PKT(buf, len <= 64 ? len : 64);
559 /* Send pkt via PIO or DMA */
561 lp->current_tx_skb = skb;
562 SMC_PUSH_DATA(buf, len);
563 /* DMA complete IRQ will free buffer and set jiffies */
565 SMC_PUSH_DATA(buf, len);
566 dev->trans_start = jiffies;
569 spin_lock_irqsave(&lp->lock, flags);
570 if (!lp->tx_throttle) {
571 netif_wake_queue(dev);
573 spin_unlock_irqrestore(&lp->lock, flags);
574 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
578 * Since I am not sure if I will have enough room in the chip's ram
579 * to store the packet, I call this routine which either sends it
580 * now, or set the card to generates an interrupt when ready
583 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
585 struct smc911x_local *lp = netdev_priv(dev);
586 unsigned long ioaddr = dev->base_addr;
590 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
591 dev->name, __FUNCTION__);
593 BUG_ON(lp->pending_tx_skb != NULL);
595 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
596 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
598 /* Turn off the flow when running out of space in FIFO */
599 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
600 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
602 spin_lock_irqsave(&lp->lock, flags);
603 /* Reenable when at least 1 packet of size MTU present */
604 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
606 netif_stop_queue(dev);
607 spin_unlock_irqrestore(&lp->lock, flags);
610 /* Drop packets when we run out of space in TX FIFO
611 * Account for overhead required for:
613 * Tx command words 8 bytes
614 * Start offset 15 bytes
615 * End padding 15 bytes
617 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
618 printk("%s: No Tx free space %d < %d\n",
619 dev->name, free, skb->len);
620 lp->pending_tx_skb = NULL;
621 lp->stats.tx_errors++;
622 lp->stats.tx_dropped++;
629 /* If the DMA is already running then defer this packet Tx until
630 * the DMA IRQ starts it
632 spin_lock_irqsave(&lp->lock, flags);
633 if (lp->txdma_active) {
634 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
635 lp->pending_tx_skb = skb;
636 netif_stop_queue(dev);
637 spin_unlock_irqrestore(&lp->lock, flags);
640 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
641 lp->txdma_active = 1;
643 spin_unlock_irqrestore(&lp->lock, flags);
646 lp->pending_tx_skb = skb;
647 smc911x_hardware_send_pkt(dev);
653 * This handles a TX status interrupt, which is only called when:
654 * - a TX error occurred, or
655 * - TX of a packet completed.
657 static void smc911x_tx(struct net_device *dev)
659 unsigned long ioaddr = dev->base_addr;
660 struct smc911x_local *lp = netdev_priv(dev);
661 unsigned int tx_status;
663 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
664 dev->name, __FUNCTION__);
666 /* Collect the TX status */
667 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
668 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
670 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
671 tx_status = SMC_GET_TX_STS_FIFO();
672 lp->stats.tx_packets++;
673 lp->stats.tx_bytes+=tx_status>>16;
674 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
675 dev->name, (tx_status & 0xffff0000) >> 16,
676 tx_status & 0x0000ffff);
677 /* count Tx errors, but ignore lost carrier errors when in
678 * full-duplex mode */
679 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
680 !(tx_status & 0x00000306))) {
681 lp->stats.tx_errors++;
683 if (tx_status & TX_STS_MANY_COLL_) {
684 lp->stats.collisions+=16;
685 lp->stats.tx_aborted_errors++;
687 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
689 /* carrier error only has meaning for half-duplex communication */
690 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
692 lp->stats.tx_carrier_errors++;
694 if (tx_status & TX_STS_LATE_COLL_) {
695 lp->stats.collisions++;
696 lp->stats.tx_aborted_errors++;
702 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
704 * Reads a register from the MII Management serial interface
707 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
709 unsigned long ioaddr = dev->base_addr;
710 unsigned int phydata;
712 SMC_GET_MII(phyreg, phyaddr, phydata);
714 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
715 __FUNCTION__, phyaddr, phyreg, phydata);
721 * Writes a register to the MII Management serial interface
723 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
726 unsigned long ioaddr = dev->base_addr;
728 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
729 __FUNCTION__, phyaddr, phyreg, phydata);
731 SMC_SET_MII(phyreg, phyaddr, phydata);
735 * Finds and reports the PHY address (115 and 117 have external
736 * PHY interface 118 has internal only
738 static void smc911x_phy_detect(struct net_device *dev)
740 unsigned long ioaddr = dev->base_addr;
741 struct smc911x_local *lp = netdev_priv(dev);
743 unsigned int cfg, id1, id2;
745 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
750 * Scan all 32 PHY addresses if necessary, starting at
751 * PHY#1 to PHY#31, and then PHY#0 last.
753 switch(lp->version) {
756 cfg = SMC_GET_HW_CFG();
757 if (cfg & HW_CFG_EXT_PHY_DET_) {
758 cfg &= ~HW_CFG_PHY_CLK_SEL_;
759 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
761 udelay(10); /* Wait for clocks to stop */
763 cfg |= HW_CFG_EXT_PHY_EN_;
765 udelay(10); /* Wait for clocks to stop */
767 cfg &= ~HW_CFG_PHY_CLK_SEL_;
768 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
770 udelay(10); /* Wait for clocks to stop */
772 cfg |= HW_CFG_SMI_SEL_;
775 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
777 /* Read the PHY identifiers */
778 SMC_GET_PHY_ID1(phyaddr & 31, id1);
779 SMC_GET_PHY_ID2(phyaddr & 31, id2);
781 /* Make sure it is a valid identifier */
782 if (id1 != 0x0000 && id1 != 0xffff &&
783 id1 != 0x8000 && id2 != 0x0000 &&
784 id2 != 0xffff && id2 != 0x8000) {
785 /* Save the PHY's address */
786 lp->mii.phy_id = phyaddr & 31;
787 lp->phy_type = id1 << 16 | id2;
793 /* Internal media only */
794 SMC_GET_PHY_ID1(1, id1);
795 SMC_GET_PHY_ID2(1, id2);
796 /* Save the PHY's address */
798 lp->phy_type = id1 << 16 | id2;
801 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
802 dev->name, id1, id2, lp->mii.phy_id);
806 * Sets the PHY to a configuration as determined by the user.
807 * Called with spin_lock held.
809 static int smc911x_phy_fixed(struct net_device *dev)
811 struct smc911x_local *lp = netdev_priv(dev);
812 unsigned long ioaddr = dev->base_addr;
813 int phyaddr = lp->mii.phy_id;
816 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
818 /* Enter Link Disable state */
819 SMC_GET_PHY_BMCR(phyaddr, bmcr);
821 SMC_SET_PHY_BMCR(phyaddr, bmcr);
824 * Set our fixed capabilities
825 * Disable auto-negotiation
827 bmcr &= ~BMCR_ANENABLE;
829 bmcr |= BMCR_FULLDPLX;
831 if (lp->ctl_rspeed == 100)
832 bmcr |= BMCR_SPEED100;
834 /* Write our capabilities to the phy control register */
835 SMC_SET_PHY_BMCR(phyaddr, bmcr);
837 /* Re-Configure the Receive/Phy Control register */
839 SMC_SET_PHY_BMCR(phyaddr, bmcr);
845 * smc911x_phy_reset - reset the phy
849 * Issue a software reset for the specified PHY and
850 * wait up to 100ms for the reset to complete. We should
851 * not access the PHY for 50ms after issuing the reset.
853 * The time to wait appears to be dependent on the PHY.
856 static int smc911x_phy_reset(struct net_device *dev, int phy)
858 struct smc911x_local *lp = netdev_priv(dev);
859 unsigned long ioaddr = dev->base_addr;
864 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
866 spin_lock_irqsave(&lp->lock, flags);
867 reg = SMC_GET_PMT_CTRL();
869 reg |= PMT_CTRL_PHY_RST_;
870 SMC_SET_PMT_CTRL(reg);
871 spin_unlock_irqrestore(&lp->lock, flags);
872 for (timeout = 2; timeout; timeout--) {
874 spin_lock_irqsave(&lp->lock, flags);
875 reg = SMC_GET_PMT_CTRL();
876 spin_unlock_irqrestore(&lp->lock, flags);
877 if (!(reg & PMT_CTRL_PHY_RST_)) {
878 /* extra delay required because the phy may
879 * not be completed with its reset
880 * when PHY_BCR_RESET_ is cleared. 256us
881 * should suffice, but use 500us to be safe
888 return reg & PMT_CTRL_PHY_RST_;
892 * smc911x_phy_powerdown - powerdown phy
896 * Power down the specified PHY
898 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
900 unsigned long ioaddr = dev->base_addr;
903 /* Enter Link Disable state */
904 SMC_GET_PHY_BMCR(phy, bmcr);
906 SMC_SET_PHY_BMCR(phy, bmcr);
910 * smc911x_phy_check_media - check the media status and adjust BMCR
912 * @init: set true for initialisation
914 * Select duplex mode depending on negotiation state. This
915 * also updates our carrier state.
917 static void smc911x_phy_check_media(struct net_device *dev, int init)
919 struct smc911x_local *lp = netdev_priv(dev);
920 unsigned long ioaddr = dev->base_addr;
921 int phyaddr = lp->mii.phy_id;
922 unsigned int bmcr, cr;
924 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
926 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
927 /* duplex state has changed */
928 SMC_GET_PHY_BMCR(phyaddr, bmcr);
930 if (lp->mii.full_duplex) {
931 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
932 bmcr |= BMCR_FULLDPLX;
933 cr |= MAC_CR_RCVOWN_;
935 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
936 bmcr &= ~BMCR_FULLDPLX;
937 cr &= ~MAC_CR_RCVOWN_;
939 SMC_SET_PHY_BMCR(phyaddr, bmcr);
945 * Configures the specified PHY through the MII management interface
946 * using Autonegotiation.
947 * Calls smc911x_phy_fixed() if the user has requested a certain config.
948 * If RPC ANEG bit is set, the media selection is dependent purely on
949 * the selection by the MII (either in the MII BMCR reg or the result
950 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
951 * is controlled by the RPC SPEED and RPC DPLX bits.
953 static void smc911x_phy_configure(void *data)
955 struct net_device *dev = data;
956 struct smc911x_local *lp = netdev_priv(dev);
957 unsigned long ioaddr = dev->base_addr;
958 int phyaddr = lp->mii.phy_id;
959 int my_phy_caps; /* My PHY capabilities */
960 int my_ad_caps; /* My Advertised capabilities */
964 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
967 * We should not be called if phy_type is zero.
969 if (lp->phy_type == 0)
970 goto smc911x_phy_configure_exit;
972 if (smc911x_phy_reset(dev, phyaddr)) {
973 printk("%s: PHY reset timed out\n", dev->name);
974 goto smc911x_phy_configure_exit;
976 spin_lock_irqsave(&lp->lock, flags);
979 * Enable PHY Interrupts (for register 18)
980 * Interrupts listed here are enabled
982 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
983 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
984 PHY_INT_MASK_LINK_DOWN_);
986 /* If the user requested no auto neg, then go set his request */
987 if (lp->mii.force_media) {
988 smc911x_phy_fixed(dev);
989 goto smc911x_phy_configure_exit;
992 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
993 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
994 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
995 printk(KERN_INFO "Auto negotiation NOT supported\n");
996 smc911x_phy_fixed(dev);
997 goto smc911x_phy_configure_exit;
1000 /* CSMA capable w/ both pauses */
1001 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1003 if (my_phy_caps & BMSR_100BASE4)
1004 my_ad_caps |= ADVERTISE_100BASE4;
1005 if (my_phy_caps & BMSR_100FULL)
1006 my_ad_caps |= ADVERTISE_100FULL;
1007 if (my_phy_caps & BMSR_100HALF)
1008 my_ad_caps |= ADVERTISE_100HALF;
1009 if (my_phy_caps & BMSR_10FULL)
1010 my_ad_caps |= ADVERTISE_10FULL;
1011 if (my_phy_caps & BMSR_10HALF)
1012 my_ad_caps |= ADVERTISE_10HALF;
1014 /* Disable capabilities not selected by our user */
1015 if (lp->ctl_rspeed != 100)
1016 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1018 if (!lp->ctl_rfduplx)
1019 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1021 /* Update our Auto-Neg Advertisement Register */
1022 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1023 lp->mii.advertising = my_ad_caps;
1026 * Read the register back. Without this, it appears that when
1027 * auto-negotiation is restarted, sometimes it isn't ready and
1028 * the link does not come up.
1031 SMC_GET_PHY_MII_ADV(phyaddr, status);
1033 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1034 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1036 /* Restart auto-negotiation process in order to advertise my caps */
1037 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1039 smc911x_phy_check_media(dev, 1);
1041 smc911x_phy_configure_exit:
1042 spin_unlock_irqrestore(&lp->lock, flags);
1043 lp->work_pending = 0;
1047 * smc911x_phy_interrupt
1049 * Purpose: Handle interrupts relating to PHY register 18. This is
1050 * called from the "hard" interrupt handler under our private spinlock.
1052 static void smc911x_phy_interrupt(struct net_device *dev)
1054 struct smc911x_local *lp = netdev_priv(dev);
1055 unsigned long ioaddr = dev->base_addr;
1056 int phyaddr = lp->mii.phy_id;
1059 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1061 if (lp->phy_type == 0)
1064 smc911x_phy_check_media(dev, 0);
1065 /* read to clear status bits */
1066 SMC_GET_PHY_INT_SRC(phyaddr,status);
1067 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
1068 dev->name, status & 0xffff);
1069 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
1070 dev->name, SMC_GET_AFC_CFG());
1073 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1076 * This is the main routine of the driver, to handle the device when
1077 * it needs some attention.
1079 static irqreturn_t smc911x_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1081 struct net_device *dev = dev_id;
1082 unsigned long ioaddr = dev->base_addr;
1083 struct smc911x_local *lp = netdev_priv(dev);
1084 unsigned int status, mask, timeout;
1085 unsigned int rx_overrun=0, cr, pkts;
1086 unsigned long flags;
1088 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1090 spin_lock_irqsave(&lp->lock, flags);
1092 /* Spurious interrupt check */
1093 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1094 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1095 spin_unlock_irqrestore(&lp->lock, flags);
1099 mask = SMC_GET_INT_EN();
1102 /* set a timeout value, so I don't stay here forever */
1107 status = SMC_GET_INT();
1109 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1110 dev->name, status, mask, status & ~mask);
1116 /* Handle SW interrupt condition */
1117 if (status & INT_STS_SW_INT_) {
1118 SMC_ACK_INT(INT_STS_SW_INT_);
1119 mask &= ~INT_EN_SW_INT_EN_;
1121 /* Handle various error conditions */
1122 if (status & INT_STS_RXE_) {
1123 SMC_ACK_INT(INT_STS_RXE_);
1124 lp->stats.rx_errors++;
1126 if (status & INT_STS_RXDFH_INT_) {
1127 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1128 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1130 /* Undocumented interrupt-what is the right thing to do here? */
1131 if (status & INT_STS_RXDF_INT_) {
1132 SMC_ACK_INT(INT_STS_RXDF_INT_);
1135 /* Rx Data FIFO exceeds set level */
1136 if (status & INT_STS_RDFL_) {
1137 if (IS_REV_A(lp->revision)) {
1140 cr &= ~MAC_CR_RXEN_;
1142 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1143 lp->stats.rx_errors++;
1144 lp->stats.rx_fifo_errors++;
1146 SMC_ACK_INT(INT_STS_RDFL_);
1148 if (status & INT_STS_RDFO_) {
1149 if (!IS_REV_A(lp->revision)) {
1151 cr &= ~MAC_CR_RXEN_;
1154 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1155 lp->stats.rx_errors++;
1156 lp->stats.rx_fifo_errors++;
1158 SMC_ACK_INT(INT_STS_RDFO_);
1160 /* Handle receive condition */
1161 if ((status & INT_STS_RSFL_) || rx_overrun) {
1163 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1164 fifo = SMC_GET_RX_FIFO_INF();
1165 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1166 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1167 dev->name, pkts, fifo & 0xFFFF );
1171 if (lp->rxdma_active){
1172 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1173 "%s: RX DMA active\n", dev->name);
1174 /* The DMA is already running so up the IRQ threshold */
1175 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1176 fifo |= pkts & 0xFF;
1178 "%s: Setting RX stat FIFO threshold to %d\n",
1179 dev->name, fifo & 0xff);
1180 SMC_SET_FIFO_INT(fifo);
1185 SMC_ACK_INT(INT_STS_RSFL_);
1187 /* Handle transmit FIFO available */
1188 if (status & INT_STS_TDFA_) {
1189 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1190 SMC_SET_FIFO_TDA(0xFF);
1191 lp->tx_throttle = 0;
1193 if (!lp->txdma_active)
1195 netif_wake_queue(dev);
1196 SMC_ACK_INT(INT_STS_TDFA_);
1198 /* Handle transmit done condition */
1200 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1201 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1202 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1203 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1205 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1206 SMC_ACK_INT(INT_STS_TSFL_);
1207 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1210 if (status & INT_STS_TSFL_) {
1211 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1213 SMC_ACK_INT(INT_STS_TSFL_);
1216 if (status & INT_STS_GPT_INT_) {
1217 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1222 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1223 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1225 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1226 SMC_GET_RX_FIFO_INF() & 0xffff,
1227 SMC_GET_RX_STS_FIFO_PEEK());
1228 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1229 SMC_ACK_INT(INT_STS_GPT_INT_);
1233 /* Handle PHY interupt condition */
1234 if (status & INT_STS_PHY_INT_) {
1235 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1236 smc911x_phy_interrupt(dev);
1237 SMC_ACK_INT(INT_STS_PHY_INT_);
1239 } while (--timeout);
1241 /* restore mask state */
1242 SMC_SET_INT_EN(mask);
1244 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1245 dev->name, 8-timeout);
1247 spin_unlock_irqrestore(&lp->lock, flags);
1249 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1256 smc911x_tx_dma_irq(int dma, void *data, struct pt_regs *regs)
1258 struct net_device *dev = (struct net_device *)data;
1259 struct smc911x_local *lp = netdev_priv(dev);
1260 struct sk_buff *skb = lp->current_tx_skb;
1261 unsigned long flags;
1263 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1265 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1266 /* Clear the DMA interrupt sources */
1267 SMC_DMA_ACK_IRQ(dev, dma);
1268 BUG_ON(skb == NULL);
1269 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1270 dev->trans_start = jiffies;
1271 dev_kfree_skb_irq(skb);
1272 lp->current_tx_skb = NULL;
1273 if (lp->pending_tx_skb != NULL)
1274 smc911x_hardware_send_pkt(dev);
1276 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1277 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1278 spin_lock_irqsave(&lp->lock, flags);
1279 lp->txdma_active = 0;
1280 if (!lp->tx_throttle) {
1281 netif_wake_queue(dev);
1283 spin_unlock_irqrestore(&lp->lock, flags);
1286 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1287 "%s: TX DMA irq completed\n", dev->name);
1290 smc911x_rx_dma_irq(int dma, void *data, struct pt_regs *regs)
1292 struct net_device *dev = (struct net_device *)data;
1293 unsigned long ioaddr = dev->base_addr;
1294 struct smc911x_local *lp = netdev_priv(dev);
1295 struct sk_buff *skb = lp->current_rx_skb;
1296 unsigned long flags;
1299 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1300 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1301 /* Clear the DMA interrupt sources */
1302 SMC_DMA_ACK_IRQ(dev, dma);
1303 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1304 BUG_ON(skb == NULL);
1305 lp->current_rx_skb = NULL;
1306 PRINT_PKT(skb->data, skb->len);
1307 dev->last_rx = jiffies;
1309 skb->protocol = eth_type_trans(skb, dev);
1311 lp->stats.rx_packets++;
1312 lp->stats.rx_bytes += skb->len;
1314 spin_lock_irqsave(&lp->lock, flags);
1315 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
1319 lp->rxdma_active = 0;
1321 spin_unlock_irqrestore(&lp->lock, flags);
1322 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1323 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1326 #endif /* SMC_USE_DMA */
1328 #ifdef CONFIG_NET_POLL_CONTROLLER
1330 * Polling receive - used by netconsole and other diagnostic tools
1331 * to allow network i/o with interrupts disabled.
1333 static void smc911x_poll_controller(struct net_device *dev)
1335 disable_irq(dev->irq);
1336 smc911x_interrupt(dev->irq, dev, NULL);
1337 enable_irq(dev->irq);
1341 /* Our watchdog timed out. Called by the networking layer */
1342 static void smc911x_timeout(struct net_device *dev)
1344 struct smc911x_local *lp = netdev_priv(dev);
1345 unsigned long ioaddr = dev->base_addr;
1347 unsigned long flags;
1349 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1351 spin_lock_irqsave(&lp->lock, flags);
1352 status = SMC_GET_INT();
1353 mask = SMC_GET_INT_EN();
1354 spin_unlock_irqrestore(&lp->lock, flags);
1355 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1356 dev->name, status, mask);
1358 /* Dump the current TX FIFO contents and restart */
1359 mask = SMC_GET_TX_CFG();
1360 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1362 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1363 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1364 * which calls schedule(). Hence we use a work queue.
1366 if (lp->phy_type != 0) {
1367 if (schedule_work(&lp->phy_configure)) {
1368 lp->work_pending = 1;
1372 /* We can accept TX packets again */
1373 dev->trans_start = jiffies;
1374 netif_wake_queue(dev);
1378 * This routine will, depending on the values passed to it,
1379 * either make it accept multicast packets, go into
1380 * promiscuous mode (for TCPDUMP and cousins) or accept
1381 * a select set of multicast packets
1383 static void smc911x_set_multicast_list(struct net_device *dev)
1385 struct smc911x_local *lp = netdev_priv(dev);
1386 unsigned long ioaddr = dev->base_addr;
1387 unsigned int multicast_table[2];
1388 unsigned int mcr, update_multicast = 0;
1389 unsigned long flags;
1390 /* table for flipping the order of 5 bits */
1391 static const unsigned char invert5[] =
1392 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1393 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1394 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1395 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1398 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1400 spin_lock_irqsave(&lp->lock, flags);
1401 SMC_GET_MAC_CR(mcr);
1402 spin_unlock_irqrestore(&lp->lock, flags);
1404 if (dev->flags & IFF_PROMISC) {
1406 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1407 mcr |= MAC_CR_PRMS_;
1410 * Here, I am setting this to accept all multicast packets.
1411 * I don't need to zero the multicast table, because the flag is
1412 * checked before the table is
1414 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1415 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1416 mcr |= MAC_CR_MCPAS_;
1420 * This sets the internal hardware table to filter out unwanted
1421 * multicast packets before they take up memory.
1423 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1424 * address are the offset into the table. If that bit is 1, then the
1425 * multicast packet is accepted. Otherwise, it's dropped silently.
1427 * To use the 6 bits as an offset into the table, the high 1 bit is
1428 * the number of the 32 bit register, while the low 5 bits are the bit
1429 * within that register.
1431 else if (dev->mc_count) {
1433 struct dev_mc_list *cur_addr;
1435 /* Set the Hash perfec mode */
1436 mcr |= MAC_CR_HPFILT_;
1438 /* start with a table of all zeros: reject all */
1439 memset(multicast_table, 0, sizeof(multicast_table));
1441 cur_addr = dev->mc_list;
1442 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1445 /* do we have a pointer here? */
1448 /* make sure this is a multicast address -
1449 shouldn't this be a given if we have it here ? */
1450 if (!(*cur_addr->dmi_addr & 1))
1453 /* only use the low order bits */
1454 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1456 /* do some messy swapping to put the bit in the right spot */
1457 multicast_table[invert5[position&0x1F]&0x1] |=
1458 (1<<invert5[(position>>1)&0x1F]);
1461 /* be sure I get rid of flags I might have set */
1462 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1464 /* now, the table can be loaded into the chipset */
1465 update_multicast = 1;
1467 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1469 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1472 * since I'm disabling all multicast entirely, I need to
1473 * clear the multicast list
1475 memset(multicast_table, 0, sizeof(multicast_table));
1476 update_multicast = 1;
1479 spin_lock_irqsave(&lp->lock, flags);
1480 SMC_SET_MAC_CR(mcr);
1481 if (update_multicast) {
1483 "%s: update mcast hash table 0x%08x 0x%08x\n",
1484 dev->name, multicast_table[0], multicast_table[1]);
1485 SMC_SET_HASHL(multicast_table[0]);
1486 SMC_SET_HASHH(multicast_table[1]);
1488 spin_unlock_irqrestore(&lp->lock, flags);
1493 * Open and Initialize the board
1495 * Set up everything, reset the card, etc..
1498 smc911x_open(struct net_device *dev)
1500 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1503 * Check that the address is valid. If its not, refuse
1504 * to bring the device up. The user must specify an
1505 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1507 if (!is_valid_ether_addr(dev->dev_addr)) {
1508 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1512 /* reset the hardware */
1515 /* Configure the PHY, initialize the link state */
1516 smc911x_phy_configure(dev);
1518 /* Turn on Tx + Rx */
1519 smc911x_enable(dev);
1521 netif_start_queue(dev);
1529 * this makes the board clean up everything that it can
1530 * and not talk to the outside world. Caused by
1531 * an 'ifconfig ethX down'
1533 static int smc911x_close(struct net_device *dev)
1535 struct smc911x_local *lp = netdev_priv(dev);
1537 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1539 netif_stop_queue(dev);
1540 netif_carrier_off(dev);
1542 /* clear everything */
1543 smc911x_shutdown(dev);
1545 if (lp->phy_type != 0) {
1546 /* We need to ensure that no calls to
1547 * smc911x_phy_configure are pending.
1549 * flush_scheduled_work() cannot be called because we
1550 * are running with the netlink semaphore held (from
1551 * devinet_ioctl()) and the pending work queue
1552 * contains linkwatch_event() (scheduled by
1553 * netif_carrier_off() above). linkwatch_event() also
1554 * wants the netlink semaphore.
1556 while (lp->work_pending)
1558 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1561 if (lp->pending_tx_skb) {
1562 dev_kfree_skb(lp->pending_tx_skb);
1563 lp->pending_tx_skb = NULL;
1570 * Get the current statistics.
1571 * This may be called with the card open or closed.
1573 static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1575 struct smc911x_local *lp = netdev_priv(dev);
1576 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1586 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1588 struct smc911x_local *lp = netdev_priv(dev);
1589 unsigned long ioaddr = dev->base_addr;
1591 unsigned long flags;
1593 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1597 if (lp->phy_type != 0) {
1598 spin_lock_irqsave(&lp->lock, flags);
1599 ret = mii_ethtool_gset(&lp->mii, cmd);
1600 spin_unlock_irqrestore(&lp->lock, flags);
1602 cmd->supported = SUPPORTED_10baseT_Half |
1603 SUPPORTED_10baseT_Full |
1604 SUPPORTED_TP | SUPPORTED_AUI;
1606 if (lp->ctl_rspeed == 10)
1607 cmd->speed = SPEED_10;
1608 else if (lp->ctl_rspeed == 100)
1609 cmd->speed = SPEED_100;
1611 cmd->autoneg = AUTONEG_DISABLE;
1612 if (lp->mii.phy_id==1)
1613 cmd->transceiver = XCVR_INTERNAL;
1615 cmd->transceiver = XCVR_EXTERNAL;
1617 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
1619 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1620 DUPLEX_FULL : DUPLEX_HALF;
1628 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1630 struct smc911x_local *lp = netdev_priv(dev);
1632 unsigned long flags;
1634 if (lp->phy_type != 0) {
1635 spin_lock_irqsave(&lp->lock, flags);
1636 ret = mii_ethtool_sset(&lp->mii, cmd);
1637 spin_unlock_irqrestore(&lp->lock, flags);
1639 if (cmd->autoneg != AUTONEG_DISABLE ||
1640 cmd->speed != SPEED_10 ||
1641 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1642 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1645 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1654 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1656 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1657 strncpy(info->version, version, sizeof(info->version));
1658 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1661 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1663 struct smc911x_local *lp = netdev_priv(dev);
1665 unsigned long flags;
1667 if (lp->phy_type != 0) {
1668 spin_lock_irqsave(&lp->lock, flags);
1669 ret = mii_nway_restart(&lp->mii);
1670 spin_unlock_irqrestore(&lp->lock, flags);
1676 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1678 struct smc911x_local *lp = netdev_priv(dev);
1679 return lp->msg_enable;
1682 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1684 struct smc911x_local *lp = netdev_priv(dev);
1685 lp->msg_enable = level;
1688 static int smc911x_ethtool_getregslen(struct net_device *dev)
1690 /* System regs + MAC regs + PHY regs */
1691 return (((E2P_CMD - ID_REV)/4 + 1) +
1692 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1695 static void smc911x_ethtool_getregs(struct net_device *dev,
1696 struct ethtool_regs* regs, void *buf)
1698 unsigned long ioaddr = dev->base_addr;
1699 struct smc911x_local *lp = netdev_priv(dev);
1700 unsigned long flags;
1702 u32 *data = (u32*)buf;
1704 regs->version = lp->version;
1705 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1706 data[j++] = SMC_inl(ioaddr,i);
1708 for(i=MAC_CR;i<=WUCSR;i++) {
1709 spin_lock_irqsave(&lp->lock, flags);
1710 SMC_GET_MAC_CSR(i, reg);
1711 spin_unlock_irqrestore(&lp->lock, flags);
1714 for(i=0;i<=31;i++) {
1715 spin_lock_irqsave(&lp->lock, flags);
1716 SMC_GET_MII(i, lp->mii.phy_id, reg);
1717 spin_unlock_irqrestore(&lp->lock, flags);
1718 data[j++] = reg & 0xFFFF;
1722 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1724 unsigned long ioaddr = dev->base_addr;
1725 unsigned int timeout;
1728 e2p_cmd = SMC_GET_E2P_CMD();
1729 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1730 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1731 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1732 dev->name, __FUNCTION__);
1736 e2p_cmd = SMC_GET_E2P_CMD();
1739 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1740 dev->name, __FUNCTION__);
1746 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1749 unsigned long ioaddr = dev->base_addr;
1752 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1754 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1755 ((cmd) & (0x7<<28)) |
1760 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1763 unsigned long ioaddr = dev->base_addr;
1766 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1768 *data = SMC_GET_E2P_DATA();
1772 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1775 unsigned long ioaddr = dev->base_addr;
1778 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1780 SMC_SET_E2P_DATA(data);
1784 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1785 struct ethtool_eeprom *eeprom, u8 *data)
1787 u8 eebuf[SMC911X_EEPROM_LEN];
1790 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1791 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1793 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1796 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1800 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1801 struct ethtool_eeprom *eeprom, u8 *data)
1806 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1808 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1810 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1813 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1815 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1821 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1823 return SMC911X_EEPROM_LEN;
1826 static struct ethtool_ops smc911x_ethtool_ops = {
1827 .get_settings = smc911x_ethtool_getsettings,
1828 .set_settings = smc911x_ethtool_setsettings,
1829 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1830 .get_msglevel = smc911x_ethtool_getmsglevel,
1831 .set_msglevel = smc911x_ethtool_setmsglevel,
1832 .nway_reset = smc911x_ethtool_nwayreset,
1833 .get_link = ethtool_op_get_link,
1834 .get_regs_len = smc911x_ethtool_getregslen,
1835 .get_regs = smc911x_ethtool_getregs,
1836 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1837 .get_eeprom = smc911x_ethtool_geteeprom,
1838 .set_eeprom = smc911x_ethtool_seteeprom,
1844 * This routine has a simple purpose -- make the SMC chip generate an
1845 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1847 static int __init smc911x_findirq(unsigned long ioaddr)
1850 unsigned long cookie;
1852 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1854 cookie = probe_irq_on();
1857 * Force a SW interrupt
1860 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1863 * Wait until positive that the interrupt has been generated
1868 int_status = SMC_GET_INT_EN();
1869 if (int_status & INT_EN_SW_INT_EN_)
1870 break; /* got the interrupt */
1871 } while (--timeout);
1874 * there is really nothing that I can do here if timeout fails,
1875 * as autoirq_report will return a 0 anyway, which is what I
1876 * want in this case. Plus, the clean up is needed in both
1880 /* and disable all interrupts again */
1883 /* and return what I found */
1884 return probe_irq_off(cookie);
1888 * Function: smc911x_probe(unsigned long ioaddr)
1891 * Tests to see if a given ioaddr points to an SMC911x chip.
1892 * Returns a 0 on success
1895 * (1) see if the endian word is OK
1896 * (1) see if I recognize the chip ID in the appropriate register
1898 * Here I do typical initialization tasks.
1900 * o Initialize the structure if needed
1901 * o print out my vanity message if not done so already
1902 * o print out what type of hardware is detected
1903 * o print out the ethernet address
1905 * o set up my private data
1906 * o configure the dev structure with my subroutines
1907 * o actually GRAB the irq.
1910 static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1912 struct smc911x_local *lp = netdev_priv(dev);
1914 unsigned int val, chip_id, revision;
1915 const char *version_string;
1917 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1919 /* First, see if the endian word is recognized */
1920 val = SMC_GET_BYTE_TEST();
1921 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1922 if (val != 0x87654321) {
1923 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1929 * check if the revision register is something that I
1930 * recognize. These might need to be added to later,
1931 * as future revisions could be added.
1933 chip_id = SMC_GET_PN();
1934 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1935 for(i=0;chip_ids[i].id != 0; i++) {
1936 if (chip_ids[i].id == chip_id) break;
1938 if (!chip_ids[i].id) {
1939 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1943 version_string = chip_ids[i].name;
1945 revision = SMC_GET_REV();
1946 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1948 /* At this point I'll assume that the chip is an SMC911x. */
1949 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1951 /* Validate the TX FIFO size requested */
1952 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1953 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1958 /* fill in some of the fields */
1959 dev->base_addr = ioaddr;
1960 lp->version = chip_ids[i].id;
1961 lp->revision = revision;
1962 lp->tx_fifo_kb = tx_fifo_kb;
1963 /* Reverse calculate the RX FIFO size from the TX */
1964 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1965 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1967 /* Set the automatic flow control values */
1968 switch(lp->tx_fifo_kb) {
1970 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1971 * AFC_LO is AFC_HI/2
1972 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1974 case 2:/* 13440 Rx Data Fifo Size */
1975 lp->afc_cfg=0x008C46AF;break;
1976 case 3:/* 12480 Rx Data Fifo Size */
1977 lp->afc_cfg=0x0082419F;break;
1978 case 4:/* 11520 Rx Data Fifo Size */
1979 lp->afc_cfg=0x00783C9F;break;
1980 case 5:/* 10560 Rx Data Fifo Size */
1981 lp->afc_cfg=0x006E374F;break;
1982 case 6:/* 9600 Rx Data Fifo Size */
1983 lp->afc_cfg=0x0064328F;break;
1984 case 7:/* 8640 Rx Data Fifo Size */
1985 lp->afc_cfg=0x005A2D7F;break;
1986 case 8:/* 7680 Rx Data Fifo Size */
1987 lp->afc_cfg=0x0050287F;break;
1988 case 9:/* 6720 Rx Data Fifo Size */
1989 lp->afc_cfg=0x0046236F;break;
1990 case 10:/* 5760 Rx Data Fifo Size */
1991 lp->afc_cfg=0x003C1E6F;break;
1992 case 11:/* 4800 Rx Data Fifo Size */
1993 lp->afc_cfg=0x0032195F;break;
1995 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1996 * AFC_LO is AFC_HI/2
1997 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1999 case 12:/* 3840 Rx Data Fifo Size */
2000 lp->afc_cfg=0x0024124F;break;
2001 case 13:/* 2880 Rx Data Fifo Size */
2002 lp->afc_cfg=0x0015073F;break;
2003 case 14:/* 1920 Rx Data Fifo Size */
2004 lp->afc_cfg=0x0006032F;break;
2006 PRINTK("%s: ERROR -- no AFC_CFG setting found",
2011 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2012 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
2013 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2015 spin_lock_init(&lp->lock);
2017 /* Get the MAC address */
2018 SMC_GET_MAC_ADDR(dev->dev_addr);
2020 /* now, reset the chip, and put it into a known state */
2024 * If dev->irq is 0, then the device has to be banged on to see
2027 * Specifying an IRQ is done with the assumption that the user knows
2028 * what (s)he is doing. No checking is done!!!!
2035 dev->irq = smc911x_findirq(ioaddr);
2038 /* kick the card and try again */
2042 if (dev->irq == 0) {
2043 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2048 dev->irq = irq_canonicalize(dev->irq);
2050 /* Fill in the fields of the device structure with ethernet values. */
2053 dev->open = smc911x_open;
2054 dev->stop = smc911x_close;
2055 dev->hard_start_xmit = smc911x_hard_start_xmit;
2056 dev->tx_timeout = smc911x_timeout;
2057 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2058 dev->get_stats = smc911x_query_statistics;
2059 dev->set_multicast_list = smc911x_set_multicast_list;
2060 dev->ethtool_ops = &smc911x_ethtool_ops;
2061 #ifdef CONFIG_NET_POLL_CONTROLLER
2062 dev->poll_controller = smc911x_poll_controller;
2065 INIT_WORK(&lp->phy_configure, smc911x_phy_configure, dev);
2066 lp->mii.phy_id_mask = 0x1f;
2067 lp->mii.reg_num_mask = 0x1f;
2068 lp->mii.force_media = 0;
2069 lp->mii.full_duplex = 0;
2071 lp->mii.mdio_read = smc911x_phy_read;
2072 lp->mii.mdio_write = smc911x_phy_write;
2075 * Locate the phy, if any.
2077 smc911x_phy_detect(dev);
2079 /* Set default parameters */
2080 lp->msg_enable = NETIF_MSG_LINK;
2081 lp->ctl_rfduplx = 1;
2082 lp->ctl_rspeed = 100;
2085 retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
2089 set_irq_type(dev->irq, IRQT_FALLING);
2092 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2093 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2094 lp->rxdma_active = 0;
2095 lp->txdma_active = 0;
2096 dev->dma = lp->rxdma;
2099 retval = register_netdev(dev);
2101 /* now, print out the card info, in a short format.. */
2102 printk("%s: %s (rev %d) at %#lx IRQ %d",
2103 dev->name, version_string, lp->revision,
2104 dev->base_addr, dev->irq);
2107 if (lp->rxdma != -1)
2108 printk(" RXDMA %d ", lp->rxdma);
2110 if (lp->txdma != -1)
2111 printk("TXDMA %d", lp->txdma);
2114 if (!is_valid_ether_addr(dev->dev_addr)) {
2115 printk("%s: Invalid ethernet MAC address. Please "
2116 "set using ifconfig\n", dev->name);
2118 /* Print the Ethernet address */
2119 printk("%s: Ethernet addr: ", dev->name);
2120 for (i = 0; i < 5; i++)
2121 printk("%2.2x:", dev->dev_addr[i]);
2122 printk("%2.2x\n", dev->dev_addr[5]);
2125 if (lp->phy_type == 0) {
2126 PRINTK("%s: No PHY found\n", dev->name);
2127 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2128 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2130 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2137 if (lp->rxdma != -1) {
2138 SMC_DMA_FREE(dev, lp->rxdma);
2140 if (lp->txdma != -1) {
2141 SMC_DMA_FREE(dev, lp->txdma);
2149 * smc911x_init(void)
2152 * 0 --> there is a device
2153 * anything else, error
2155 static int smc911x_drv_probe(struct platform_device *pdev)
2157 struct net_device *ndev;
2158 struct resource *res;
2162 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2163 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2170 * Request the regions.
2172 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2177 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2179 printk("%s: could not allocate device.\n", CARDNAME);
2183 SET_MODULE_OWNER(ndev);
2184 SET_NETDEV_DEV(ndev, &pdev->dev);
2186 ndev->dma = (unsigned char)-1;
2187 ndev->irq = platform_get_irq(pdev, 0);
2189 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2195 platform_set_drvdata(pdev, ndev);
2196 ret = smc911x_probe(ndev, (unsigned long)addr);
2198 platform_set_drvdata(pdev, NULL);
2203 release_mem_region(res->start, SMC911X_IO_EXTENT);
2205 printk("%s: not found (%d).\n", CARDNAME, ret);
2209 struct smc911x_local *lp = netdev_priv(ndev);
2210 lp->physaddr = res->start;
2211 lp->dev = &pdev->dev;
2218 static int smc911x_drv_remove(struct platform_device *pdev)
2220 struct net_device *ndev = platform_get_drvdata(pdev);
2221 struct resource *res;
2223 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2224 platform_set_drvdata(pdev, NULL);
2226 unregister_netdev(ndev);
2228 free_irq(ndev->irq, ndev);
2232 struct smc911x_local *lp = netdev_priv(ndev);
2233 if (lp->rxdma != -1) {
2234 SMC_DMA_FREE(dev, lp->rxdma);
2236 if (lp->txdma != -1) {
2237 SMC_DMA_FREE(dev, lp->txdma);
2241 iounmap((void *)ndev->base_addr);
2242 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2243 release_mem_region(res->start, SMC911X_IO_EXTENT);
2249 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2251 struct net_device *ndev = platform_get_drvdata(dev);
2252 unsigned long ioaddr = ndev->base_addr;
2254 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2256 if (netif_running(ndev)) {
2257 netif_device_detach(ndev);
2258 smc911x_shutdown(ndev);
2260 /* Set D2 - Energy detect only setting */
2261 SMC_SET_PMT_CTRL(2<<12);
2268 static int smc911x_drv_resume(struct platform_device *dev)
2270 struct net_device *ndev = platform_get_drvdata(dev);
2272 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2274 struct smc911x_local *lp = netdev_priv(ndev);
2276 if (netif_running(ndev)) {
2277 smc911x_reset(ndev);
2278 smc911x_enable(ndev);
2279 if (lp->phy_type != 0)
2280 smc911x_phy_configure(ndev);
2281 netif_device_attach(ndev);
2287 static struct platform_driver smc911x_driver = {
2288 .probe = smc911x_drv_probe,
2289 .remove = smc911x_drv_remove,
2290 .suspend = smc911x_drv_suspend,
2291 .resume = smc911x_drv_resume,
2297 static int __init smc911x_init(void)
2299 return platform_driver_register(&smc911x_driver);
2302 static void __exit smc911x_cleanup(void)
2304 platform_driver_unregister(&smc911x_driver);
2307 module_init(smc911x_init);
2308 module_exit(smc911x_cleanup);