git.oblomov.eu Git - linux-2.6/blob - drivers/block/cciss.h

   1 #ifndef CCISS_H
   2 #define CCISS_H
   3
   4 #include <linux/genhd.h>
   5
   6 #include "cciss_cmd.h"
   7
   8
   9 #define NWD             16
  10 #define NWD_SHIFT       4
  11 #define MAX_PART        (1 << NWD_SHIFT)
  12
  13 #define IO_OK           0
  14 #define IO_ERROR        1
  15
  16 struct ctlr_info;
  17 typedef struct ctlr_info ctlr_info_t;
  18
  19 struct access_method {
  20         void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  21         void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  22         unsigned long (*fifo_full)(ctlr_info_t *h);
  23         unsigned long (*intr_pending)(ctlr_info_t *h);
  24         unsigned long (*command_completed)(ctlr_info_t *h);
  25 };
  26 typedef struct _drive_info_struct
  27 {
  28         __u32   LunID;
  29         int     usage_count;
  30         struct request_queue *queue;
  31         sector_t nr_blocks;
  32         int     block_size;
  33         int     heads;
  34         int     sectors;
  35         int     cylinders;
  36         int     raid_level; /* set to -1 to indicate that
  37                              * the drive is not in use/configured
  38                             */
  39         int     busy_configuring; /*This is set when the drive is being removed
  40                                    *to prevent it from being opened or it's queue
  41                                    *from being started.
  42                                   */
  43 } drive_info_struct;
  44
  45 #ifdef CONFIG_CISS_SCSI_TAPE
  46
  47 struct sendcmd_reject_list {
  48         int ncompletions;
  49         unsigned long *complete; /* array of NR_CMDS tags */
  50 };
  51
  52 #endif
  53 struct ctlr_info
  54 {
  55         int     ctlr;
  56         char    devname[8];
  57         char    *product_name;
  58         char    firm_ver[4]; // Firmware version
  59         struct pci_dev *pdev;
  60         __u32   board_id;
  61         void __iomem *vaddr;
  62         unsigned long paddr;
  63         CfgTable_struct __iomem *cfgtable;
  64         int     interrupts_enabled;
  65         int     major;
  66         int     max_commands;
  67         int     commands_outstanding;
  68         int     max_outstanding; /* Debug */
  69         int     num_luns;
  70         int     highest_lun;
  71         int     usage_count;  /* number of opens all all minor devices */
  72 #       define DOORBELL_INT     0
  73 #       define PERF_MODE_INT    1
  74 #       define SIMPLE_MODE_INT  2
  75 #       define MEMQ_MODE_INT    3
  76         unsigned int intr[4];
  77         unsigned int msix_vector;
  78         unsigned int msi_vector;
  79         BYTE    cciss_read;
  80         BYTE    cciss_write;
  81         BYTE    cciss_read_capacity;
  82
  83         // information about each logical volume
  84         drive_info_struct drv[CISS_MAX_LUN];
  85
  86         struct access_method access;
  87
  88         /* queue and queue Info */
  89         CommandList_struct *reqQ;
  90         CommandList_struct  *cmpQ;
  91         unsigned int Qdepth;
  92         unsigned int maxQsinceinit;
  93         unsigned int maxSG;
  94         spinlock_t lock;
  95
  96         //* pointers to command and error info pool */
  97         CommandList_struct      *cmd_pool;
  98         dma_addr_t              cmd_pool_dhandle;
  99         ErrorInfo_struct        *errinfo_pool;
 100         dma_addr_t              errinfo_pool_dhandle;
 101         unsigned long           *cmd_pool_bits;
 102         int                     nr_allocs;
 103         int                     nr_frees;
 104         int                     busy_configuring;
 105         int                     busy_initializing;
 106
 107         /* This element holds the zero based queue number of the last
 108          * queue to be started.  It is used for fairness.
 109         */
 110         int                     next_to_run;
 111
 112         // Disk structures we need to pass back
 113         struct gendisk   *gendisk[NWD];
 114 #ifdef CONFIG_CISS_SCSI_TAPE
 115         void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
 116         /* list of block side commands the scsi error handling sucked up */
 117         /* and saved for later processing */
 118         struct sendcmd_reject_list scsi_rejects;
 119 #endif
 120         unsigned char alive;
 121 };
 122
 123 /*  Defining the diffent access_menthods */
 124 /*
 125  * Memory mapped FIFO interface (SMART 53xx cards)
 126  */
 127 #define SA5_DOORBELL    0x20
 128 #define SA5_REQUEST_PORT_OFFSET 0x40
 129 #define SA5_REPLY_INTR_MASK_OFFSET      0x34
 130 #define SA5_REPLY_PORT_OFFSET           0x44
 131 #define SA5_INTR_STATUS         0x30
 132 #define SA5_SCRATCHPAD_OFFSET   0xB0
 133
 134 #define SA5_CTCFG_OFFSET        0xB4
 135 #define SA5_CTMEM_OFFSET        0xB8
 136
 137 #define SA5_INTR_OFF            0x08
 138 #define SA5B_INTR_OFF           0x04
 139 #define SA5_INTR_PENDING        0x08
 140 #define SA5B_INTR_PENDING       0x04
 141 #define FIFO_EMPTY              0xffffffff
 142 #define CCISS_FIRMWARE_READY    0xffff0000 /* value in scratchpad register */
 143
 144 #define  CISS_ERROR_BIT         0x02
 145
 146 #define CCISS_INTR_ON   1
 147 #define CCISS_INTR_OFF  0
 148 /*
 149         Send the command to the hardware
 150 */
 151 static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
 152 {
 153 #ifdef CCISS_DEBUG
 154          printk("Sending %x - down to controller\n", c->busaddr );
 155 #endif /* CCISS_DEBUG */
 156          writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 157          h->commands_outstanding++;
 158          if ( h->commands_outstanding > h->max_outstanding)
 159                 h->max_outstanding = h->commands_outstanding;
 160 }
 161
 162 /*
 163  *  This card is the opposite of the other cards.
 164  *   0 turns interrupts on...
 165  *   0x08 turns them off...
 166  */
 167 static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
 168 {
 169         if (val)
 170         { /* Turn interrupts on */
 171                 h->interrupts_enabled = 1;
 172                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 173         } else /* Turn them off */
 174         {
 175                 h->interrupts_enabled = 0;
 176                 writel( SA5_INTR_OFF,
 177                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 178         }
 179 }
 180 /*
 181  *  This card is the opposite of the other cards.
 182  *   0 turns interrupts on...
 183  *   0x04 turns them off...
 184  */
 185 static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
 186 {
 187         if (val)
 188         { /* Turn interrupts on */
 189                 h->interrupts_enabled = 1;
 190                 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 191         } else /* Turn them off */
 192         {
 193                 h->interrupts_enabled = 0;
 194                 writel( SA5B_INTR_OFF,
 195                         h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
 196         }
 197 }
 198 /*
 199  *  Returns true if fifo is full.
 200  *
 201  */
 202 static unsigned long SA5_fifo_full(ctlr_info_t *h)
 203 {
 204         if( h->commands_outstanding >= h->max_commands)
 205                 return(1);
 206         else
 207                 return(0);
 208
 209 }
 210 /*
 211  *   returns value read from hardware.
 212  *     returns FIFO_EMPTY if there is nothing to read
 213  */
 214 static unsigned long SA5_completed(ctlr_info_t *h)
 215 {
 216         unsigned long register_value
 217                 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
 218         if(register_value != FIFO_EMPTY)
 219         {
 220                 h->commands_outstanding--;
 221 #ifdef CCISS_DEBUG
 222                 printk("cciss:  Read %lx back from board\n", register_value);
 223 #endif /* CCISS_DEBUG */
 224         }
 225 #ifdef CCISS_DEBUG
 226         else
 227         {
 228                 printk("cciss:  FIFO Empty read\n");
 229         }
 230 #endif
 231         return ( register_value);
 232
 233 }
 234 /*
 235  *      Returns true if an interrupt is pending..
 236  */
 237 static unsigned long SA5_intr_pending(ctlr_info_t *h)
 238 {
 239         unsigned long register_value  =
 240                 readl(h->vaddr + SA5_INTR_STATUS);
 241 #ifdef CCISS_DEBUG
 242         printk("cciss: intr_pending %lx\n", register_value);
 243 #endif  /* CCISS_DEBUG */
 244         if( register_value &  SA5_INTR_PENDING)
 245                 return  1;
 246         return 0 ;
 247 }
 248
 249 /*
 250  *      Returns true if an interrupt is pending..
 251  */
 252 static unsigned long SA5B_intr_pending(ctlr_info_t *h)
 253 {
 254         unsigned long register_value  =
 255                 readl(h->vaddr + SA5_INTR_STATUS);
 256 #ifdef CCISS_DEBUG
 257         printk("cciss: intr_pending %lx\n", register_value);
 258 #endif  /* CCISS_DEBUG */
 259         if( register_value &  SA5B_INTR_PENDING)
 260                 return  1;
 261         return 0 ;
 262 }
 263
 264
 265 static struct access_method SA5_access = {
 266         SA5_submit_command,
 267         SA5_intr_mask,
 268         SA5_fifo_full,
 269         SA5_intr_pending,
 270         SA5_completed,
 271 };
 272
 273 static struct access_method SA5B_access = {
 274         SA5_submit_command,
 275         SA5B_intr_mask,
 276         SA5_fifo_full,
 277         SA5B_intr_pending,
 278         SA5_completed,
 279 };
 280
 281 struct board_type {
 282         __u32   board_id;
 283         char    *product_name;
 284         struct access_method *access;
 285 };
 286
 287 #define CCISS_LOCK(i)   (&hba[i]->lock)
 288
 289 #endif /* CCISS_H */
 290