2 * MPC8641 HPCN Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
14 model = "MPC8641HPCN";
15 compatible = "mpc86xx";
37 d-cache-line-size = <20>; // 32 bytes
38 i-cache-line-size = <20>; // 32 bytes
39 d-cache-size = <8000>; // L1, 32K
40 i-cache-size = <8000>; // L1, 32K
41 timebase-frequency = <0>; // 33 MHz, from uboot
42 bus-frequency = <0>; // From uboot
43 clock-frequency = <0>; // From uboot
48 d-cache-line-size = <20>; // 32 bytes
49 i-cache-line-size = <20>; // 32 bytes
50 d-cache-size = <8000>; // L1, 32K
51 i-cache-size = <8000>; // L1, 32K
52 timebase-frequency = <0>; // 33 MHz, from uboot
53 bus-frequency = <0>; // From uboot
54 clock-frequency = <0>; // From uboot
59 device_type = "memory";
60 reg = <00000000 40000000>; // 1G at 0x0
66 compatible = "fsl,mpc8641-localbus", "simple-bus";
67 reg = <f8005000 1000>;
69 interrupt-parent = <&mpic>;
71 ranges = <0 0 ff800000 00800000
74 3 0 f8100000 00100000>;
77 compatible = "cfi-flash";
85 reg = <00000000 00300000>;
89 reg = <00300000 00100000>;
94 reg = <00400000 00300000>;
98 reg = <00700000 00100000>;
105 #address-cells = <1>;
108 compatible = "simple-bus";
109 ranges = <00000000 f8000000 00100000>;
110 reg = <f8000000 00001000>; // CCSRBAR
114 #address-cells = <1>;
117 compatible = "fsl-i2c";
120 interrupt-parent = <&mpic>;
125 #address-cells = <1>;
128 compatible = "fsl-i2c";
131 interrupt-parent = <&mpic>;
136 #address-cells = <1>;
138 compatible = "fsl,gianfar-mdio";
141 phy0: ethernet-phy@0 {
142 interrupt-parent = <&mpic>;
145 device_type = "ethernet-phy";
147 phy1: ethernet-phy@1 {
148 interrupt-parent = <&mpic>;
151 device_type = "ethernet-phy";
153 phy2: ethernet-phy@2 {
154 interrupt-parent = <&mpic>;
157 device_type = "ethernet-phy";
159 phy3: ethernet-phy@3 {
160 interrupt-parent = <&mpic>;
163 device_type = "ethernet-phy";
167 enet0: ethernet@24000 {
169 device_type = "network";
171 compatible = "gianfar";
173 local-mac-address = [ 00 00 00 00 00 00 ];
174 interrupts = <1d 2 1e 2 22 2>;
175 interrupt-parent = <&mpic>;
176 phy-handle = <&phy0>;
177 phy-connection-type = "rgmii-id";
180 enet1: ethernet@25000 {
182 device_type = "network";
184 compatible = "gianfar";
186 local-mac-address = [ 00 00 00 00 00 00 ];
187 interrupts = <23 2 24 2 28 2>;
188 interrupt-parent = <&mpic>;
189 phy-handle = <&phy1>;
190 phy-connection-type = "rgmii-id";
193 enet2: ethernet@26000 {
195 device_type = "network";
197 compatible = "gianfar";
199 local-mac-address = [ 00 00 00 00 00 00 ];
200 interrupts = <1F 2 20 2 21 2>;
201 interrupt-parent = <&mpic>;
202 phy-handle = <&phy2>;
203 phy-connection-type = "rgmii-id";
206 enet3: ethernet@27000 {
208 device_type = "network";
210 compatible = "gianfar";
212 local-mac-address = [ 00 00 00 00 00 00 ];
213 interrupts = <25 2 26 2 27 2>;
214 interrupt-parent = <&mpic>;
215 phy-handle = <&phy3>;
216 phy-connection-type = "rgmii-id";
219 serial0: serial@4500 {
221 device_type = "serial";
222 compatible = "ns16550";
224 clock-frequency = <0>;
226 interrupt-parent = <&mpic>;
229 serial1: serial@4600 {
231 device_type = "serial";
232 compatible = "ns16550";
234 clock-frequency = <0>;
236 interrupt-parent = <&mpic>;
240 clock-frequency = <0>;
241 interrupt-controller;
242 #address-cells = <0>;
243 #interrupt-cells = <2>;
245 compatible = "chrp,open-pic";
246 device_type = "open-pic";
250 global-utilities@e0000 {
251 compatible = "fsl,mpc8641-guts";
257 pci0: pcie@f8008000 {
259 compatible = "fsl,mpc8641-pcie";
261 #interrupt-cells = <1>;
263 #address-cells = <3>;
264 reg = <f8008000 1000>;
266 ranges = <02000000 0 80000000 80000000 0 20000000
267 01000000 0 00000000 e2000000 0 00100000>;
268 clock-frequency = <1fca055>;
269 interrupt-parent = <&mpic>;
271 interrupt-map-mask = <ff00 0 0 7>;
273 /* IDSEL 0x11 func 0 - PCI slot 1 */
279 /* IDSEL 0x11 func 1 - PCI slot 1 */
285 /* IDSEL 0x11 func 2 - PCI slot 1 */
291 /* IDSEL 0x11 func 3 - PCI slot 1 */
297 /* IDSEL 0x11 func 4 - PCI slot 1 */
303 /* IDSEL 0x11 func 5 - PCI slot 1 */
309 /* IDSEL 0x11 func 6 - PCI slot 1 */
315 /* IDSEL 0x11 func 7 - PCI slot 1 */
321 /* IDSEL 0x12 func 0 - PCI slot 2 */
327 /* IDSEL 0x12 func 1 - PCI slot 2 */
333 /* IDSEL 0x12 func 2 - PCI slot 2 */
339 /* IDSEL 0x12 func 3 - PCI slot 2 */
345 /* IDSEL 0x12 func 4 - PCI slot 2 */
351 /* IDSEL 0x12 func 5 - PCI slot 2 */
357 /* IDSEL 0x12 func 6 - PCI slot 2 */
363 /* IDSEL 0x12 func 7 - PCI slot 2 */
370 e000 0 0 1 &i8259 c 2
371 e100 0 0 2 &i8259 9 2
372 e200 0 0 3 &i8259 a 2
373 e300 0 0 4 &i8259 b 2
376 e800 0 0 1 &i8259 6 2
379 f000 0 0 1 &i8259 7 2
380 f100 0 0 1 &i8259 7 2
382 // IDSEL 0x1f IDE/SATA
383 f800 0 0 1 &i8259 e 2
384 f900 0 0 1 &i8259 5 2
390 #address-cells = <3>;
392 ranges = <02000000 0 80000000
402 #address-cells = <3>;
403 ranges = <02000000 0 80000000
411 #interrupt-cells = <2>;
413 #address-cells = <2>;
414 reg = <f000 0 0 0 0>;
415 ranges = <1 0 01000000 0 0
417 interrupt-parent = <&i8259>;
419 i8259: interrupt-controller@20 {
423 interrupt-controller;
424 device_type = "interrupt-controller";
425 #address-cells = <0>;
426 #interrupt-cells = <2>;
427 compatible = "chrp,iic";
429 interrupt-parent = <&mpic>;
434 #address-cells = <1>;
435 reg = <1 60 1 1 64 1>;
436 interrupts = <1 3 c 3>;
442 compatible = "pnpPNP,303";
447 compatible = "pnpPNP,f03";
466 pci1: pcie@f8009000 {
468 compatible = "fsl,mpc8641-pcie";
470 #interrupt-cells = <1>;
472 #address-cells = <3>;
473 reg = <f8009000 1000>;
475 ranges = <02000000 0 a0000000 a0000000 0 20000000
476 01000000 0 00000000 e3000000 0 00100000>;
477 clock-frequency = <1fca055>;
478 interrupt-parent = <&mpic>;
480 interrupt-map-mask = <f800 0 0 7>;
491 #address-cells = <3>;
493 ranges = <02000000 0 a0000000