6 #include <linux/futex.h>
8 #include <asm/uaccess.h>
12 #define __FUTEX_SMP_SYNC " sync \n"
14 #define __FUTEX_SMP_SYNC
17 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
19 if (cpu_has_llsc && R10000_LLSC_WAR) { \
20 __asm__ __volatile__( \
24 "1: ll %1, %4 # __futex_atomic_op \n" \
34 " .section .fixup,\"ax\" \n" \
38 " .section __ex_table,\"a\" \n" \
39 " "__UA_ADDR "\t1b, 4b \n" \
40 " "__UA_ADDR "\t2b, 4b \n" \
42 : "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \
43 : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \
45 } else if (cpu_has_llsc) { \
46 __asm__ __volatile__( \
50 "1: ll %1, %4 # __futex_atomic_op \n" \
60 " .section .fixup,\"ax\" \n" \
64 " .section __ex_table,\"a\" \n" \
65 " "__UA_ADDR "\t1b, 4b \n" \
66 " "__UA_ADDR "\t2b, 4b \n" \
68 : "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \
69 : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \
76 futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
78 int op = (encoded_op >> 28) & 7;
79 int cmp = (encoded_op >> 24) & 15;
80 int oparg = (encoded_op << 8) >> 20;
81 int cmparg = (encoded_op << 20) >> 20;
83 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
86 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
93 __futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg);
97 __futex_atomic_op("addu $1, %1, %z5",
98 ret, oldval, uaddr, oparg);
101 __futex_atomic_op("or $1, %1, %z5",
102 ret, oldval, uaddr, oparg);
105 __futex_atomic_op("and $1, %1, %z5",
106 ret, oldval, uaddr, ~oparg);
109 __futex_atomic_op("xor $1, %1, %z5",
110 ret, oldval, uaddr, oparg);
120 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
121 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
122 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
123 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
124 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
125 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
126 default: ret = -ENOSYS;
133 futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
137 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
140 if (cpu_has_llsc && R10000_LLSC_WAR) {
141 __asm__ __volatile__(
142 "# futex_atomic_cmpxchg_inatomic \n"
147 " bne %0, %z3, 3f \n"
156 " .section .fixup,\"ax\" \n"
160 " .section __ex_table,\"a\" \n"
161 " "__UA_ADDR "\t1b, 4b \n"
162 " "__UA_ADDR "\t2b, 4b \n"
164 : "=&r" (retval), "=R" (*uaddr)
165 : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
167 } else if (cpu_has_llsc) {
168 __asm__ __volatile__(
169 "# futex_atomic_cmpxchg_inatomic \n"
174 " bne %0, %z3, 3f \n"
183 " .section .fixup,\"ax\" \n"
187 " .section __ex_table,\"a\" \n"
188 " "__UA_ADDR "\t1b, 4b \n"
189 " "__UA_ADDR "\t2b, 4b \n"
191 : "=&r" (retval), "=R" (*uaddr)
192 : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)