2 * C-Media CMI8788 driver - helper functions
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <sound/core.h>
23 #include <sound/mpu401.h>
27 u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
29 return inb(chip->addr + reg);
31 EXPORT_SYMBOL(oxygen_read8);
33 u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
35 return inw(chip->addr + reg);
37 EXPORT_SYMBOL(oxygen_read16);
39 u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
41 return inl(chip->addr + reg);
43 EXPORT_SYMBOL(oxygen_read32);
45 void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
47 outb(value, chip->addr + reg);
48 chip->saved_registers._8[reg] = value;
50 EXPORT_SYMBOL(oxygen_write8);
52 void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
54 outw(value, chip->addr + reg);
55 chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
57 EXPORT_SYMBOL(oxygen_write16);
59 void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
61 outl(value, chip->addr + reg);
62 chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
64 EXPORT_SYMBOL(oxygen_write32);
66 void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
69 u8 tmp = inb(chip->addr + reg);
72 outb(tmp, chip->addr + reg);
73 chip->saved_registers._8[reg] = tmp;
75 EXPORT_SYMBOL(oxygen_write8_masked);
77 void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
80 u16 tmp = inw(chip->addr + reg);
83 outw(tmp, chip->addr + reg);
84 chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
86 EXPORT_SYMBOL(oxygen_write16_masked);
88 void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
91 u32 tmp = inl(chip->addr + reg);
94 outl(tmp, chip->addr + reg);
95 chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
97 EXPORT_SYMBOL(oxygen_write32_masked);
99 static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
104 * Reading the status register also clears the bits, so we have to save
105 * the read bits in status.
107 wait_event_timeout(chip->ac97_waitqueue,
108 ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
110 msecs_to_jiffies(1) + 1);
112 * Check even after a timeout because this function should not require
113 * the AC'97 interrupt to be enabled.
115 status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
116 return status & mask ? 0 : -EIO;
120 * About 10% of AC'97 register reads or writes fail to complete, but even those
121 * where the controller indicates completion aren't guaranteed to have actually
124 * It's hard to assign blame to either the controller or the codec because both
125 * were made by C-Media ...
128 void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
129 unsigned int index, u16 data)
131 unsigned int count, succeeded;
135 reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
136 reg |= OXYGEN_AC97_REG_DIR_WRITE;
137 reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
139 for (count = 5; count > 0; --count) {
141 oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
142 /* require two "completed" writes, just to be sure */
143 if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
145 chip->saved_ac97_registers[codec][index / 2] = data;
149 snd_printk(KERN_ERR "AC'97 write timeout\n");
151 EXPORT_SYMBOL(oxygen_write_ac97);
153 u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
157 unsigned int last_read = UINT_MAX;
160 reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
161 reg |= OXYGEN_AC97_REG_DIR_READ;
162 reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
163 for (count = 5; count > 0; --count) {
165 oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
167 if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) {
168 u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
169 /* we require two consecutive reads of the same value */
170 if (value == last_read)
174 * Invert the register value bits to make sure that two
175 * consecutive unsuccessful reads do not return the same
181 snd_printk(KERN_ERR "AC'97 read timeout on codec %u\n", codec);
184 EXPORT_SYMBOL(oxygen_read_ac97);
186 void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
187 unsigned int index, u16 data, u16 mask)
189 u16 value = oxygen_read_ac97(chip, codec, index);
191 value |= data & mask;
192 oxygen_write_ac97(chip, codec, index, value);
194 EXPORT_SYMBOL(oxygen_write_ac97_masked);
196 void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
200 /* should not need more than 7.68 us (24 * 320 ns) */
202 while ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & OXYGEN_SPI_BUSY)
208 oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
209 oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
210 if (control & OXYGEN_SPI_DATA_LENGTH_3)
211 oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
212 oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
214 EXPORT_SYMBOL(oxygen_write_spi);
216 void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data)
218 unsigned long timeout;
220 /* should not need more than about 300 us */
221 timeout = jiffies + msecs_to_jiffies(1);
223 if (!(oxygen_read16(chip, OXYGEN_2WIRE_BUS_STATUS)
224 & OXYGEN_2WIRE_BUSY))
228 } while (time_after_eq(timeout, jiffies));
230 oxygen_write8(chip, OXYGEN_2WIRE_MAP, map);
231 oxygen_write8(chip, OXYGEN_2WIRE_DATA, data);
232 oxygen_write8(chip, OXYGEN_2WIRE_CONTROL,
233 device | OXYGEN_2WIRE_DIR_WRITE);
235 EXPORT_SYMBOL(oxygen_write_i2c);
237 static void _write_uart(struct oxygen *chip, unsigned int port, u8 data)
239 if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL)
241 oxygen_write8(chip, OXYGEN_MPU401 + port, data);
244 void oxygen_reset_uart(struct oxygen *chip)
246 _write_uart(chip, 1, MPU401_RESET);
247 msleep(1); /* wait for ACK */
248 _write_uart(chip, 1, MPU401_ENTER_UART);
250 EXPORT_SYMBOL(oxygen_reset_uart);
252 void oxygen_write_uart(struct oxygen *chip, u8 data)
254 _write_uart(chip, 0, data);
256 EXPORT_SYMBOL(oxygen_write_uart);
258 u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index)
260 unsigned int timeout;
262 oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
263 index | OXYGEN_EEPROM_DIR_READ);
264 for (timeout = 0; timeout < 100; ++timeout) {
266 if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
267 & OXYGEN_EEPROM_BUSY))
270 return oxygen_read16(chip, OXYGEN_EEPROM_DATA);
273 void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value)
275 unsigned int timeout;
277 oxygen_write16(chip, OXYGEN_EEPROM_DATA, value);
278 oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
279 index | OXYGEN_EEPROM_DIR_WRITE);
280 for (timeout = 0; timeout < 10; ++timeout) {
282 if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
283 & OXYGEN_EEPROM_BUSY))
286 snd_printk(KERN_ERR "EEPROM write timeout\n");