2 * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers
4 * Copyright 2000,1 Compaq Computer Corporation.
6 * Use consistent with the GNU GPL is permitted,
7 * provided that this copyright notice is
8 * preserved in its entirety in all copies and derived works.
10 * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
11 * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
12 * FITNESS FOR ANY PARTICULAR PURPOSE.
14 * Author: Jamey Hicks.
18 * 2001-10-?? Andrew Christian Added support for iPAQ H3800
19 * and abstracted EGPIO interface.
22 #include <linux/config.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/kernel.h>
26 #include <linux/tty.h>
28 #include <linux/device.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/serial_core.h>
34 #include <asm/hardware.h>
35 #include <asm/mach-types.h>
36 #include <asm/setup.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/flash.h>
41 #include <asm/mach/irda.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/serial_sa1100.h>
45 #include <asm/arch/h3600.h>
47 #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100)
48 #include <asm/arch/h3600_gpio.h>
51 #ifdef CONFIG_SA1100_H3800
52 #include <asm/arch/h3600_asic.h>
57 struct ipaq_model_ops ipaq_model_ops;
58 EXPORT_SYMBOL(ipaq_model_ops);
60 static struct mtd_partition h3xxx_partitions[] = {
62 .name = "H3XXX boot firmware",
65 .mask_flags = MTD_WRITEABLE, /* force read-only */
67 #ifdef CONFIG_MTD_2PARTS_IPAQ
68 .name = "H3XXX root jffs2",
69 .size = MTDPART_SIZ_FULL,
72 .name = "H3XXX kernel",
76 .name = "H3XXX params",
80 #ifdef CONFIG_JFFS2_FS
81 .name = "H3XXX root jffs2",
82 .size = MTDPART_SIZ_FULL,
85 .name = "H3XXX initrd",
89 .name = "H3XXX root cramfs",
93 .name = "H3XXX usr cramfs",
97 .name = "H3XXX usr local",
98 .size = MTDPART_SIZ_FULL,
105 static void h3xxx_set_vpp(int vpp)
107 assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp);
110 static struct flash_platform_data h3xxx_flash_data = {
111 .map_name = "cfi_probe",
112 .set_vpp = h3xxx_set_vpp,
113 .parts = h3xxx_partitions,
114 .nr_parts = ARRAY_SIZE(h3xxx_partitions),
117 static struct resource h3xxx_flash_resource = {
118 .start = SA1100_CS0_PHYS,
119 .end = SA1100_CS0_PHYS + SZ_32M - 1,
120 .flags = IORESOURCE_MEM,
124 * This turns the IRDA power on or off on the Compaq H3600
126 static int h3600_irda_set_power(struct device *dev, unsigned int state)
128 assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state );
133 static void h3600_irda_set_speed(struct device *dev, unsigned int speed)
135 if (speed < 4000000) {
136 clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
138 set_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
142 static struct irda_platform_data h3600_irda_data = {
143 .set_power = h3600_irda_set_power,
144 .set_speed = h3600_irda_set_speed,
147 static void h3xxx_mach_init(void)
149 sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1);
150 sa11x0_set_irda_data(&h3600_irda_data);
154 * low-level UART features
157 static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl)
159 if (port->mapbase == _Ser3UTCR0) {
160 if (mctrl & TIOCM_RTS)
161 GPCR = GPIO_H3600_COM_RTS;
163 GPSR = GPIO_H3600_COM_RTS;
167 static u_int h3600_uart_get_mctrl(struct uart_port *port)
169 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
171 if (port->mapbase == _Ser3UTCR0) {
173 /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */
174 if (gplr & GPIO_H3600_COM_DCD)
176 if (gplr & GPIO_H3600_COM_CTS)
183 static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
185 if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */
186 assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state);
187 } else if (port->mapbase == _Ser3UTCR0) {
188 assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state);
193 * Enable/Disable wake up events for this serial port.
194 * Obviously, we only support this on the normal COM port.
196 static int h3600_uart_set_wake(struct uart_port *port, u_int enable)
200 if (port->mapbase == _Ser3UTCR0) {
202 PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */
204 PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */
210 static struct sa1100_port_fns h3600_port_fns __initdata = {
211 .set_mctrl = h3600_uart_set_mctrl,
212 .get_mctrl = h3600_uart_get_mctrl,
214 .set_wake = h3600_uart_set_wake,
218 * helper for sa1100fb
220 static void h3xxx_lcd_power(int enable)
222 assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable);
225 static struct map_desc h3600_io_desc[] __initdata = {
226 { /* static memory bank 2 CS#2 */
227 .virtual = H3600_BANK_2_VIRT,
228 .pfn = __phys_to_pfn(SA1100_CS2_PHYS),
229 .length = 0x02800000,
231 }, { /* static memory bank 4 CS#4 */
232 .virtual = H3600_BANK_4_VIRT,
233 .pfn = __phys_to_pfn(SA1100_CS4_PHYS),
234 .length = 0x00800000,
236 }, { /* EGPIO 0 CS#5 */
237 .virtual = H3600_EGPIO_VIRT,
238 .pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
239 .length = 0x01000000,
245 * Common map_io initialization
248 static void __init h3xxx_map_io(void)
251 iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc));
253 sa1100_register_uart_fns(&h3600_port_fns);
254 sa1100_register_uart(0, 3); /* Common serial port */
255 // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */
257 /* Ensure those pins are outputs and driving low */
258 PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
259 PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
261 /* Configure suspend conditions */
263 PWER = PWER_GPIO0 | PWER_RTC;
267 sa1100fb_lcd_power = h3xxx_lcd_power;
270 static __inline__ void do_blank(int setp)
272 if (ipaq_model_ops.blank_callback)
273 ipaq_model_ops.blank_callback(1-setp);
276 /************************* H3100 *************************/
278 #ifdef CONFIG_SA1100_H3100
280 #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
281 static unsigned int h3100_egpio = 0;
283 static void h3100_control_egpio(enum ipaq_egpio_type x, int setp)
285 unsigned int egpio = 0;
290 case IPAQ_EGPIO_LCD_POWER:
291 egpio |= EGPIO_H3600_LCD_ON;
292 gpio |= GPIO_H3100_LCD_3V_ON;
295 case IPAQ_EGPIO_LCD_ENABLE:
297 case IPAQ_EGPIO_CODEC_NRESET:
298 egpio |= EGPIO_H3600_CODEC_NRESET;
300 case IPAQ_EGPIO_AUDIO_ON:
301 gpio |= GPIO_H3100_AUD_PWR_ON
304 case IPAQ_EGPIO_QMUTE:
305 gpio |= GPIO_H3100_QMUTE;
307 case IPAQ_EGPIO_OPT_NVRAM_ON:
308 egpio |= EGPIO_H3600_OPT_NVRAM_ON;
310 case IPAQ_EGPIO_OPT_ON:
311 egpio |= EGPIO_H3600_OPT_ON;
313 case IPAQ_EGPIO_CARD_RESET:
314 egpio |= EGPIO_H3600_CARD_RESET;
316 case IPAQ_EGPIO_OPT_RESET:
317 egpio |= EGPIO_H3600_OPT_RESET;
319 case IPAQ_EGPIO_IR_ON:
320 gpio |= GPIO_H3100_IR_ON;
322 case IPAQ_EGPIO_IR_FSEL:
323 gpio |= GPIO_H3100_IR_FSEL;
325 case IPAQ_EGPIO_RS232_ON:
326 egpio |= EGPIO_H3600_RS232_ON;
328 case IPAQ_EGPIO_VPP_ON:
329 egpio |= EGPIO_H3600_VPP_ON;
334 local_irq_save(flags);
336 h3100_egpio |= egpio;
339 h3100_egpio &= ~egpio;
342 H3100_EGPIO = h3100_egpio;
343 local_irq_restore(flags);
347 static unsigned long h3100_read_egpio(void)
352 static int h3100_pm_callback(int req)
354 if (ipaq_model_ops.pm_callback_aux)
355 return ipaq_model_ops.pm_callback_aux(req);
359 static struct ipaq_model_ops h3100_model_ops __initdata = {
360 .generic_name = "3100",
361 .control = h3100_control_egpio,
362 .read = h3100_read_egpio,
363 .pm_callback = h3100_pm_callback
366 #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \
369 | GPIO_H3100_LCD_3V_ON \
370 | GPIO_H3100_AUD_ON \
371 | GPIO_H3100_AUD_PWR_ON \
373 | GPIO_H3100_IR_FSEL)
375 static void __init h3100_map_io(void)
379 /* Initialize h3100-specific values here */
380 GPCR = 0x0fffffff; /* All outputs are set low by default */
381 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
382 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
383 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
386 /* Older bootldrs put GPIO2-9 in alternate mode on the
387 assumption that they are used for video */
388 GAFR &= ~H3100_DIRECT_EGPIO;
390 H3100_EGPIO = h3100_egpio;
391 ipaq_model_ops = h3100_model_ops;
394 MACHINE_START(H3100, "Compaq iPAQ H3100")
395 .phys_ram = 0xc0000000,
396 .phys_io = 0x80000000,
397 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
398 .boot_params = 0xc0000100,
399 .map_io = h3100_map_io,
400 .init_irq = sa1100_init_irq,
401 .timer = &sa1100_timer,
402 .init_machine = h3xxx_mach_init,
405 #endif /* CONFIG_SA1100_H3100 */
407 /************************* H3600 *************************/
409 #ifdef CONFIG_SA1100_H3600
411 #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
412 static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON;
414 static void h3600_control_egpio(enum ipaq_egpio_type x, int setp)
416 unsigned int egpio = 0;
420 case IPAQ_EGPIO_LCD_POWER:
421 egpio |= EGPIO_H3600_LCD_ON |
422 EGPIO_H3600_LCD_PCI |
423 EGPIO_H3600_LCD_5V_ON |
427 case IPAQ_EGPIO_LCD_ENABLE:
429 case IPAQ_EGPIO_CODEC_NRESET:
430 egpio |= EGPIO_H3600_CODEC_NRESET;
432 case IPAQ_EGPIO_AUDIO_ON:
433 egpio |= EGPIO_H3600_AUD_AMP_ON |
434 EGPIO_H3600_AUD_PWR_ON;
436 case IPAQ_EGPIO_QMUTE:
437 egpio |= EGPIO_H3600_QMUTE;
439 case IPAQ_EGPIO_OPT_NVRAM_ON:
440 egpio |= EGPIO_H3600_OPT_NVRAM_ON;
442 case IPAQ_EGPIO_OPT_ON:
443 egpio |= EGPIO_H3600_OPT_ON;
445 case IPAQ_EGPIO_CARD_RESET:
446 egpio |= EGPIO_H3600_CARD_RESET;
448 case IPAQ_EGPIO_OPT_RESET:
449 egpio |= EGPIO_H3600_OPT_RESET;
451 case IPAQ_EGPIO_IR_ON:
452 egpio |= EGPIO_H3600_IR_ON;
454 case IPAQ_EGPIO_IR_FSEL:
455 egpio |= EGPIO_H3600_IR_FSEL;
457 case IPAQ_EGPIO_RS232_ON:
458 egpio |= EGPIO_H3600_RS232_ON;
460 case IPAQ_EGPIO_VPP_ON:
461 egpio |= EGPIO_H3600_VPP_ON;
466 local_irq_save(flags);
468 h3600_egpio |= egpio;
470 h3600_egpio &= ~egpio;
471 H3600_EGPIO = h3600_egpio;
472 local_irq_restore(flags);
476 static unsigned long h3600_read_egpio(void)
481 static int h3600_pm_callback(int req)
483 if (ipaq_model_ops.pm_callback_aux)
484 return ipaq_model_ops.pm_callback_aux(req);
488 static struct ipaq_model_ops h3600_model_ops __initdata = {
489 .generic_name = "3600",
490 .control = h3600_control_egpio,
491 .read = h3600_read_egpio,
492 .pm_callback = h3600_pm_callback
495 static void __init h3600_map_io(void)
499 /* Initialize h3600-specific values here */
501 GPCR = 0x0fffffff; /* All outputs are set low by default */
502 GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
503 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
504 GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
505 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
506 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
508 H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */
509 ipaq_model_ops = h3600_model_ops;
512 MACHINE_START(H3600, "Compaq iPAQ H3600")
513 .phys_ram = 0xc0000000,
514 .phys_io = 0x80000000,
515 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
516 .boot_params = 0xc0000100,
517 .map_io = h3600_map_io,
518 .init_irq = sa1100_init_irq,
519 .timer = &sa1100_timer,
520 .init_machine = h3xxx_mach_init,
523 #endif /* CONFIG_SA1100_H3600 */
525 #ifdef CONFIG_SA1100_H3800
527 #define SET_ASIC1(x) \
528 do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0)
530 #define SET_ASIC2(x) \
531 do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0)
533 #define CLEAR_ASIC1(x) \
534 do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0)
536 #define CLEAR_ASIC2(x) \
537 do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0)
541 On screen enable, we get
543 h3800_video_power_on(1)
544 LCD controller starts
545 h3800_video_lcd_enable(1)
547 On screen disable, we get
549 h3800_video_lcd_enable(0)
551 h3800_video_power_on(0)
555 static void h3800_video_power_on(int setp)
558 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON;
560 H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON;
562 H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON;
564 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON;
568 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON;
570 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON;
572 H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON;
574 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON;
578 static void h3800_video_lcd_enable(int setp)
581 msleep(17); // Wait one from before turning on
582 H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI;
584 H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI;
585 msleep(30); // Wait before turning off
590 static void h3800_control_egpio(enum ipaq_egpio_type x, int setp)
593 case IPAQ_EGPIO_LCD_POWER:
594 h3800_video_power_on(setp);
596 case IPAQ_EGPIO_LCD_ENABLE:
597 h3800_video_lcd_enable(setp);
599 case IPAQ_EGPIO_CODEC_NRESET:
600 case IPAQ_EGPIO_AUDIO_ON:
601 case IPAQ_EGPIO_QMUTE:
602 printk("%s: error - should not be called\n", __FUNCTION__);
604 case IPAQ_EGPIO_OPT_NVRAM_ON:
605 SET_ASIC2(GPIO2_OPT_ON_NVRAM);
607 case IPAQ_EGPIO_OPT_ON:
608 SET_ASIC2(GPIO2_OPT_ON);
610 case IPAQ_EGPIO_CARD_RESET:
611 SET_ASIC2(GPIO2_OPT_PCM_RESET);
613 case IPAQ_EGPIO_OPT_RESET:
614 SET_ASIC2(GPIO2_OPT_RESET);
616 case IPAQ_EGPIO_IR_ON:
617 CLEAR_ASIC1(GPIO1_IR_ON_N);
619 case IPAQ_EGPIO_IR_FSEL:
621 case IPAQ_EGPIO_RS232_ON:
622 SET_ASIC1(GPIO1_RS232_ON);
624 case IPAQ_EGPIO_VPP_ON:
625 H3800_ASIC2_FlashWP_VPP_ON = setp;
630 static unsigned long h3800_read_egpio(void)
632 return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16);
635 /* We need to fix ASIC2 GPIO over suspend/resume. At the moment,
636 it doesn't appear that ASIC1 GPIO has the same problem */
638 static int h3800_pm_callback(int req)
640 static u16 asic1_data;
641 static u16 asic2_data;
644 printk("%s %d\n", __FUNCTION__, req);
648 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */
650 H3800_ASIC2_GPIOPIOD = asic2_data;
651 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
657 H3800_ASIC1_GPIO_OUT = asic1_data;
659 if (ipaq_model_ops.pm_callback_aux)
660 result = ipaq_model_ops.pm_callback_aux(req);
664 if (ipaq_model_ops.pm_callback_aux &&
665 ((result = ipaq_model_ops.pm_callback_aux(req)) != 0))
668 asic1_data = H3800_ASIC1_GPIO_OUT;
669 asic2_data = H3800_ASIC2_GPIOPIOD;
672 printk("%s: unrecognized PM callback\n", __FUNCTION__);
678 static struct ipaq_model_ops h3800_model_ops __initdata = {
679 .generic_name = "3800",
680 .control = h3800_control_egpio,
681 .read = h3800_read_egpio,
682 .pm_callback = h3800_pm_callback
685 #define MAX_ASIC_ISR_LOOPS 20
687 /* The order of these is important - see #include <asm/arch/irqs.h> */
688 static u32 kpio_irq_mask[] = {
700 static u32 gpio_irq_mask[] = {
708 static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
712 if (0) printk("%s: interrupt received\n", __FUNCTION__);
714 desc->chip->ack(irq);
716 for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) {
721 irq = H3800_ASIC2_KPIINTFLAG;
722 if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
723 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
724 if (irq & kpio_irq_mask[j])
725 do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j, regs);
728 irq = H3800_ASIC2_GPIINTFLAG;
729 if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
730 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
731 if (irq & gpio_irq_mask[j])
732 do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j , regs);
735 if (i >= MAX_ASIC_ISR_LOOPS)
736 printk("%s: interrupt processing overrun\n", __FUNCTION__);
738 /* For level-based interrupts */
739 desc->chip->unmask(irq);
743 static struct irqaction h3800_irq = {
744 .name = "h3800_asic",
745 .handler = h3800_IRQ_demux,
746 .flags = SA_INTERRUPT | SA_TIMER,
749 u32 kpio_int_shadow = 0;
752 /* mask_ack <- IRQ is first serviced.
753 mask <- IRQ is disabled.
754 unmask <- IRQ is enabled
756 The INTCLR registers are poorly documented. I believe that writing
757 a "1" to the register clears the specific interrupt, but the documentation
758 indicates writing a "0" clears the interrupt. In any case, they shouldn't
759 be read (that's the INTFLAG register)
762 static void h3800_mask_ack_kpio_irq(unsigned int irq)
764 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
765 kpio_int_shadow &= ~mask;
766 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
767 H3800_ASIC2_KPIINTCLR = mask;
770 static void h3800_mask_kpio_irq(unsigned int irq)
772 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
773 kpio_int_shadow &= ~mask;
774 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
777 static void h3800_unmask_kpio_irq(unsigned int irq)
779 u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
780 kpio_int_shadow |= mask;
781 H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
784 static void h3800_mask_ack_gpio_irq(unsigned int irq)
786 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
787 H3800_ASIC2_GPIINTSTAT &= ~mask;
788 H3800_ASIC2_GPIINTCLR = mask;
791 static void h3800_mask_gpio_irq(unsigned int irq)
793 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
794 H3800_ASIC2_GPIINTSTAT &= ~mask;
797 static void h3800_unmask_gpio_irq(unsigned int irq)
799 u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
800 H3800_ASIC2_GPIINTSTAT |= mask;
803 static void __init h3800_init_irq(void)
807 /* Initialize standard IRQs */
810 /* Disable all IRQs and set up clock */
811 H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */
812 H3800_ASIC2_GPIINTSTAT = 0;
814 H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */
815 H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */
817 // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */
818 // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */
820 H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */
821 H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET;
822 H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET;
823 H3800_ASIC2_INTR_TimerSet = 1;
826 for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) {
827 int irq = i + H3800_KPIO_IRQ_START;
828 irq_desc[irq].valid = 1;
829 irq_desc[irq].probe_ok = 1;
830 set_irq_chip(irq, &h3800_kpio_irqchip);
833 for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) {
834 int irq = i + H3800_GPIO_IRQ_START;
835 irq_desc[irq].valid = 1;
836 irq_desc[irq].probe_ok = 1;
837 set_irq_chip(irq, &h3800_gpio_irqchip);
840 set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING);
841 set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux);
845 #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */
847 static void __init h3800_map_io(void)
851 /* Add wakeup on AC plug/unplug */
854 /* Initialize h3800-specific values here */
855 GPCR = 0x0fffffff; /* All outputs are set low by default */
856 GAFR = GPIO_H3800_CLK_OUT |
857 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
858 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
859 GPDR = GPIO_H3800_CLK_OUT |
860 GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
861 GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
862 GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
863 GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
864 TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */
866 /* Fix the memory bus */
867 MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000;
870 H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */
871 H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */
872 H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS;
873 H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS;
874 H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N;
875 H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS;
876 H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N;
878 H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N
883 H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
884 H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
886 H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
892 /* TODO : Set sleep states & battery fault states */
894 /* Clear VPP Enable */
895 H3800_ASIC2_FlashWP_VPP_ON = 0;
896 ipaq_model_ops = h3800_model_ops;
899 MACHINE_START(H3800, "Compaq iPAQ H3800")
900 .phys_ram = 0xc0000000,
901 .phys_io = 0x80000000,
902 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
903 .boot_params = 0xc0000100,
904 .map_io = h3800_map_io,
905 .init_irq = h3800_init_irq,
906 .timer = &sa1100_timer,
907 .init_machine = h3xxx_mach_init,
910 #endif /* CONFIG_SA1100_H3800 */