2 * include/asm-xtensa/processor.h
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 #ifndef _XTENSA_PROCESSOR_H
12 #define _XTENSA_PROCESSOR_H
14 #include <asm/variant/core.h>
15 #include <asm/coprocessor.h>
17 #include <linux/compiler.h>
18 #include <asm/ptrace.h>
19 #include <asm/types.h>
24 #if (XCHAL_HAVE_WINDOWED != 1)
25 # error Linux requires the Xtensa Windowed Registers Option.
29 * User space process size: 1 GB.
30 * Windowed call ABI requires caller and callee to be located within the same
31 * 1 GB region. The C compiler places trampoline code on the stack for sources
32 * that take the address of a nested C function (a feature used by glibc), so
33 * the 1 GB requirement applies to the stack as well.
36 #define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
37 #define STACK_TOP TASK_SIZE
38 #define STACK_TOP_MAX STACK_TOP
41 * General exception cause assigned to debug exceptions. Debug exceptions go
42 * to their own vector, rather than the general exception vectors (user,
43 * kernel, double); and their specific causes are reported via DEBUGCAUSE
44 * rather than EXCCAUSE. However it is sometimes convenient to redirect debug
45 * exceptions to the general exception mechanism. To do this, an otherwise
46 * unused EXCCAUSE value was assigned to debug exceptions for this purpose.
49 #define EXCCAUSE_MAPPED_DEBUG 63
52 * We use DEPC also as a flag to distinguish between double and regular
53 * exceptions. For performance reasons, DEPC might contain the value of
54 * EXCCAUSE for regular exceptions, so we use this definition to mark a
55 * valid double exception address.
56 * (Note: We use it in bgeui, so it should be 64, 128, or 256)
59 #define VALID_DOUBLE_EXCEPTION_ADDRESS 64
61 /* LOCKLEVEL defines the interrupt level that masks all
62 * general-purpose interrupts.
66 /* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
69 #define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
70 #define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
74 /* Build a valid return address for the specified call winsize.
75 * winsize must be 1 (call4), 2 (call8), or 3 (call12)
77 #define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
79 /* Convert return address to a valid pc
80 * Note: We assume that the stack pointer is in the same 1GB ranges as the ra
82 #define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
88 struct thread_struct {
90 /* kernel's return address and stack pointer for context switching */
91 unsigned long ra; /* kernel's a0: return address and window call size */
92 unsigned long sp; /* kernel's a1: stack pointer */
94 mm_segment_t current_ds; /* see uaccess.h for example uses */
96 /* struct xtensa_cpuinfo info; */
98 unsigned long bad_vaddr; /* last user fault */
99 unsigned long bad_uaddr; /* last kernel fault accessing user space */
100 unsigned long error_code;
102 unsigned long ibreak[XCHAL_NUM_IBREAK];
103 unsigned long dbreaka[XCHAL_NUM_DBREAK];
104 unsigned long dbreakc[XCHAL_NUM_DBREAK];
106 /* Allocate storage for extra state and coprocessor state. */
107 unsigned char cp_save[XTENSA_CP_EXTRA_SIZE]
108 __attribute__ ((aligned(XTENSA_CP_EXTRA_ALIGN)));
110 /* Make structure 16 bytes aligned. */
111 int align[0] __attribute__ ((aligned(16)));
116 * Default implementation of macro that returns current
117 * instruction pointer ("program counter").
119 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
122 /* This decides where the kernel will search for a free chunk of vm
123 * space during mmap's.
125 #define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
127 #define INIT_THREAD \
130 sp: sizeof(init_stack) + (long) &init_stack, \
140 * Do necessary setup to start up a newly executed thread.
141 * Note: We set-up ps as if we did a call4 to the new pc.
142 * set_thread_state in signal.c depends on it.
144 #define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
145 (1 << PS_CALLINC_SHIFT) | \
146 (USER_RING << PS_RING_SHIFT) | \
150 /* Clearing a0 terminates the backtrace. */
151 #define start_thread(regs, new_pc, new_sp) \
153 regs->ps = USER_PS_VALUE; \
154 regs->areg[1] = new_sp; \
158 regs->windowbase = 0; \
159 regs->windowstart = 1;
161 /* Forward declaration */
165 // FIXME: do we need release_thread for CP??
166 /* Free all resources held by a thread. */
167 #define release_thread(thread) do { } while(0)
169 // FIXME: do we need prepare_to_copy (lazy status) for CP??
170 /* Prepare to copy thread state - unlazy all lazy status */
171 #define prepare_to_copy(tsk) do { } while (0)
174 * create a kernel thread without removing it from tasklists
176 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
178 /* Copy and release all segment info associated with a VM */
180 #define copy_segments(p, mm) do { } while(0)
181 #define release_segments(mm) do { } while(0)
182 #define forget_segments() do { } while (0)
184 #define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
186 extern unsigned long get_wchan(struct task_struct *p);
188 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
189 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
191 #define cpu_relax() barrier()
193 /* Special register access. */
195 #define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
196 #define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
198 #define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
199 #define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
201 #endif /* __ASSEMBLY__ */
202 #endif /* _XTENSA_PROCESSOR_H */