2 * Lite5200 board Device Tree Source
4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
20 model = "fsl,lite5200";
22 compatible = "fsl,lite5200\0generic-mpc5200";
33 d-cache-line-size = <20>;
34 i-cache-line-size = <20>;
35 d-cache-size = <4000>; // L1, 16K
36 i-cache-size = <4000>; // L1, 16K
37 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <00000000 04000000>; // 64MB
50 model = "fsl,mpc5200";
51 revision = "" // from bootloader
52 #interrupt-cells = <3>;
54 ranges = <0 f0000000 f0010000>;
55 reg = <f0000000 00010000>;
56 bus-frequency = <0>; // from bootloader
57 system-frequency = <0>; // from bootloader
60 compatible = "mpc5200-cdm";
65 // 5200 interrupts are encoded into two levels;
66 linux,phandle = <500>;
68 #interrupt-cells = <3>;
69 device_type = "interrupt-controller";
70 compatible = "mpc5200-pic";
75 gpt@600 { // General Purpose Timer
76 compatible = "mpc5200-gpt";
81 interrupt-parent = <500>;
85 gpt@610 { // General Purpose Timer
86 compatible = "mpc5200-gpt";
91 interrupt-parent = <500>;
94 gpt@620 { // General Purpose Timer
95 compatible = "mpc5200-gpt";
100 interrupt-parent = <500>;
103 gpt@630 { // General Purpose Timer
104 compatible = "mpc5200-gpt";
108 interrupts = <1 c 0>;
109 interrupt-parent = <500>;
112 gpt@640 { // General Purpose Timer
113 compatible = "mpc5200-gpt";
117 interrupts = <1 d 0>;
118 interrupt-parent = <500>;
121 gpt@650 { // General Purpose Timer
122 compatible = "mpc5200-gpt";
126 interrupts = <1 e 0>;
127 interrupt-parent = <500>;
130 gpt@660 { // General Purpose Timer
131 compatible = "mpc5200-gpt";
135 interrupts = <1 f 0>;
136 interrupt-parent = <500>;
139 gpt@670 { // General Purpose Timer
140 compatible = "mpc5200-gpt";
144 interrupts = <1 10 0>;
145 interrupt-parent = <500>;
148 rtc@800 { // Real time clock
149 compatible = "mpc5200-rtc";
152 interrupts = <1 5 0 1 6 0>;
153 interrupt-parent = <500>;
157 device_type = "mscan";
158 compatible = "mpc5200-mscan";
160 interrupts = <2 11 0>;
161 interrupt-parent = <500>;
166 device_type = "mscan";
167 compatible = "mpc5200-mscan";
169 interrupts = <1 12 0>;
170 interrupt-parent = <500>;
175 compatible = "mpc5200-gpio";
177 interrupts = <1 7 0>;
178 interrupt-parent = <500>;
182 compatible = "mpc5200-gpio-wkup";
184 interrupts = <1 8 0 0 3 0>;
185 interrupt-parent = <500>;
189 #interrupt-cells = <1>;
191 #address-cells = <3>;
193 compatible = "mpc5200-pci";
195 interrupt-map-mask = <f800 0 0 7>;
196 interrupt-map = <c000 0 0 1 500 0 0 3
199 c000 0 0 4 500 0 0 3>;
200 clock-frequency = <0>; // From boot loader
201 interrupts = <2 8 0 2 9 0 2 a 0>;
202 interrupt-parent = <500>;
204 ranges = <42000000 0 80000000 80000000 0 20000000
205 02000000 0 a0000000 a0000000 0 10000000
206 01000000 0 00000000 b0000000 0 01000000>;
211 compatible = "mpc5200-spi";
213 interrupts = <2 d 0 2 e 0>;
214 interrupt-parent = <500>;
218 device_type = "usb-ohci-be";
219 compatible = "mpc5200-ohci\0ohci-be";
221 interrupts = <2 6 0>;
222 interrupt-parent = <500>;
226 device_type = "dma-controller";
227 compatible = "mpc5200-bestcomm";
229 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
230 3 4 0 3 5 0 3 6 0 3 7 0
231 3 8 0 3 9 0 3 a 0 3 b 0
232 3 c 0 3 d 0 3 e 0 3 f 0>;
233 interrupt-parent = <500>;
237 compatible = "mpc5200-xlb";
241 serial@2000 { // PSC1
242 device_type = "serial";
243 compatible = "mpc5200-psc-uart";
244 port-number = <0>; // Logical port assignment
247 interrupts = <2 1 0>;
248 interrupt-parent = <500>;
251 // PSC2 in ac97 mode example
252 //ac97@2200 { // PSC2
253 // device_type = "sound";
254 // compatible = "mpc5200-psc-ac97";
257 // interrupts = <2 2 0>;
258 // interrupt-parent = <500>;
261 // PSC3 in CODEC mode example
263 // device_type = "sound";
264 // compatible = "mpc5200-psc-i2s";
267 // interrupts = <2 3 0>;
268 // interrupt-parent = <500>;
271 // PSC4 in uart mode example
272 //serial@2600 { // PSC4
273 // device_type = "serial";
274 // compatible = "mpc5200-psc-uart";
277 // interrupts = <2 b 0>;
278 // interrupt-parent = <500>;
281 // PSC5 in uart mode example
282 //serial@2800 { // PSC5
283 // device_type = "serial";
284 // compatible = "mpc5200-psc-uart";
287 // interrupts = <2 c 0>;
288 // interrupt-parent = <500>;
291 // PSC6 in spi mode example
293 // device_type = "spi";
294 // compatible = "mpc5200-psc-spi";
297 // interrupts = <2 4 0>;
298 // interrupt-parent = <500>;
302 device_type = "network";
303 compatible = "mpc5200-fec";
305 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
306 interrupts = <2 5 0>;
307 interrupt-parent = <500>;
312 compatible = "mpc5200-ata";
314 interrupts = <2 7 0>;
315 interrupt-parent = <500>;
320 compatible = "mpc5200-i2c";
323 interrupts = <2 f 0>;
324 interrupt-parent = <500>;
329 compatible = "mpc5200-i2c";
332 interrupts = <2 10 0>;
333 interrupt-parent = <500>;
336 device_type = "sram";
337 compatible = "mpc5200-sram\0sram";