1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions whereever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/version.h>
169 #include <linux/string.h>
170 #include <linux/errno.h>
171 #include <linux/kernel.h>
172 #include <linux/ioport.h>
173 #include <linux/slab.h>
174 #include <linux/delay.h>
175 #include <linux/pci.h>
176 #include <linux/proc_fs.h>
177 #include <linux/reboot.h>
178 #include <linux/interrupt.h>
180 #include <linux/blkdev.h>
181 #include <linux/types.h>
182 #include <linux/dma-mapping.h>
186 #include <scsi/scsi_host.h>
190 #include <linux/module.h>
192 #include <linux/stat.h>
194 #include <linux/spinlock.h>
195 #include <linux/init.h>
197 #include <linux/smp.h>
200 static char *ips = NULL;
201 module_param(ips, charp, 0);
207 #define IPS_VERSION_HIGH "7.12"
208 #define IPS_VERSION_LOW ".05 "
210 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
211 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
214 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
215 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
216 PCI_DMA_BIDIRECTIONAL : \
217 scb->scsi_cmd->sc_data_direction)
220 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
221 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
222 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
224 #define METHOD_TRACE(s, i)
226 #define DEBUG_VAR(i, s, v...)
230 * Function prototypes
232 static int ips_detect(struct scsi_host_template *);
233 static int ips_release(struct Scsi_Host *);
234 static int ips_eh_abort(struct scsi_cmnd *);
235 static int ips_eh_reset(struct scsi_cmnd *);
236 static int ips_queue(struct scsi_cmnd *, void (*)(struct scsi_cmnd *));
237 static const char *ips_info(struct Scsi_Host *);
238 static irqreturn_t do_ipsintr(int, void *);
239 static int ips_hainit(ips_ha_t *);
240 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
241 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
242 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
243 static int ips_online(ips_ha_t *, ips_scb_t *);
244 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
245 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
246 static int ips_msense(ips_ha_t *, ips_scb_t *);
247 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
248 static int ips_deallocatescbs(ips_ha_t *, int);
249 static int ips_allocatescbs(ips_ha_t *);
250 static int ips_reset_copperhead(ips_ha_t *);
251 static int ips_reset_copperhead_memio(ips_ha_t *);
252 static int ips_reset_morpheus(ips_ha_t *);
253 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
254 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
255 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
256 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
257 static int ips_isintr_copperhead(ips_ha_t *);
258 static int ips_isintr_copperhead_memio(ips_ha_t *);
259 static int ips_isintr_morpheus(ips_ha_t *);
260 static int ips_wait(ips_ha_t *, int, int);
261 static int ips_write_driver_status(ips_ha_t *, int);
262 static int ips_read_adapter_status(ips_ha_t *, int);
263 static int ips_read_subsystem_parameters(ips_ha_t *, int);
264 static int ips_read_config(ips_ha_t *, int);
265 static int ips_clear_adapter(ips_ha_t *, int);
266 static int ips_readwrite_page5(ips_ha_t *, int, int);
267 static int ips_init_copperhead(ips_ha_t *);
268 static int ips_init_copperhead_memio(ips_ha_t *);
269 static int ips_init_morpheus(ips_ha_t *);
270 static int ips_isinit_copperhead(ips_ha_t *);
271 static int ips_isinit_copperhead_memio(ips_ha_t *);
272 static int ips_isinit_morpheus(ips_ha_t *);
273 static int ips_erase_bios(ips_ha_t *);
274 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
275 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
276 static int ips_erase_bios_memio(ips_ha_t *);
277 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
278 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
279 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
280 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
281 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
282 static void ips_free_flash_copperhead(ips_ha_t * ha);
283 static void ips_get_bios_version(ips_ha_t *, int);
284 static void ips_identify_controller(ips_ha_t *);
285 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
286 static void ips_enable_int_copperhead(ips_ha_t *);
287 static void ips_enable_int_copperhead_memio(ips_ha_t *);
288 static void ips_enable_int_morpheus(ips_ha_t *);
289 static int ips_intr_copperhead(ips_ha_t *);
290 static int ips_intr_morpheus(ips_ha_t *);
291 static void ips_next(ips_ha_t *, int);
292 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
293 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
294 static void ips_done(ips_ha_t *, ips_scb_t *);
295 static void ips_free(ips_ha_t *);
296 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
297 static void ips_freescb(ips_ha_t *, ips_scb_t *);
298 static void ips_setup_funclist(ips_ha_t *);
299 static void ips_statinit(ips_ha_t *);
300 static void ips_statinit_memio(ips_ha_t *);
301 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
302 static void ips_ffdc_reset(ips_ha_t *, int);
303 static void ips_ffdc_time(ips_ha_t *);
304 static uint32_t ips_statupd_copperhead(ips_ha_t *);
305 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
306 static uint32_t ips_statupd_morpheus(ips_ha_t *);
307 static ips_scb_t *ips_getscb(ips_ha_t *);
308 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
309 static void ips_putq_wait_tail(ips_wait_queue_t *, struct scsi_cmnd *);
310 static void ips_putq_copp_tail(ips_copp_queue_t *,
311 ips_copp_wait_item_t *);
312 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
313 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
314 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
315 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *,
317 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
318 ips_copp_wait_item_t *);
319 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
321 static int ips_is_passthru(struct scsi_cmnd *);
322 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
323 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
324 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
325 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
327 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
330 static int ips_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int);
331 static int ips_host_info(ips_ha_t *, char *, off_t, int);
332 static void copy_mem_info(IPS_INFOSTR *, char *, int);
333 static int copy_info(IPS_INFOSTR *, char *, ...);
334 static int ips_abort_init(ips_ha_t * ha, int index);
335 static int ips_init_phase2(int index);
337 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
338 static int ips_register_scsi(int index);
340 static int ips_poll_for_flush_complete(ips_ha_t * ha);
341 static void ips_flush_and_reset(ips_ha_t *ha);
346 static const char ips_name[] = "ips";
347 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS]; /* Array of host controller structures */
348 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS]; /* Array of HA structures */
349 static unsigned int ips_next_controller;
350 static unsigned int ips_num_controllers;
351 static unsigned int ips_released_controllers;
352 static int ips_hotplug;
353 static int ips_cmd_timeout = 60;
354 static int ips_reset_timeout = 60 * 5;
355 static int ips_force_memio = 1; /* Always use Memory Mapped I/O */
356 static int ips_force_i2o = 1; /* Always use I2O command delivery */
357 static int ips_ioctlsize = IPS_IOCTL_SIZE; /* Size of the ioctl buffer */
358 static int ips_cd_boot; /* Booting from Manager CD */
359 static char *ips_FlashData = NULL; /* CD Boot - Flash Data Buffer */
360 static dma_addr_t ips_flashbusaddr;
361 static long ips_FlashDataInUse; /* CD Boot - Flash Data In Use Flag */
362 static uint32_t MaxLiteCmds = 32; /* Max Active Cmds for a Lite Adapter */
363 static struct scsi_host_template ips_driver_template = {
364 .detect = ips_detect,
365 .release = ips_release,
367 .queuecommand = ips_queue,
368 .eh_abort_handler = ips_eh_abort,
369 .eh_host_reset_handler = ips_eh_reset,
371 .proc_info = ips_proc_info,
372 .slave_configure = ips_slave_configure,
373 .bios_param = ips_biosparam,
375 .sg_tablesize = IPS_MAX_SG,
377 .use_clustering = ENABLE_CLUSTERING,
381 /* This table describes all ServeRAID Adapters */
382 static struct pci_device_id ips_pci_table[] = {
383 { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
384 { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
385 { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
389 MODULE_DEVICE_TABLE( pci, ips_pci_table );
391 static char ips_hot_plug_name[] = "ips";
393 static int __devinit ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
394 static void __devexit ips_remove_device(struct pci_dev *pci_dev);
396 static struct pci_driver ips_pci_driver = {
397 .name = ips_hot_plug_name,
398 .id_table = ips_pci_table,
399 .probe = ips_insert_device,
400 .remove = __devexit_p(ips_remove_device),
405 * Necessary forward function protoypes
407 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
409 #define MAX_ADAPTER_NAME 15
411 static char ips_adapter_name[][30] = {
414 "ServeRAID on motherboard",
415 "ServeRAID on motherboard",
432 static struct notifier_block ips_notifier = {
439 static char ips_command_direction[] = {
440 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
441 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
442 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
443 IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
444 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
445 IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
446 IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
447 IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
448 IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
449 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
450 IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
451 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
452 IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
453 IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
454 IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
455 IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
456 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
457 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
458 IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
459 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
460 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
461 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
462 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
463 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
464 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
465 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
466 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
467 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
468 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
469 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
470 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
471 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
472 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
473 IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
474 IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
475 IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
476 IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
477 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
478 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
479 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
480 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
481 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
482 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
483 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
484 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
485 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
486 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
487 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
488 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
489 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
490 IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
494 /****************************************************************************/
496 /* Routine Name: ips_setup */
498 /* Routine Description: */
500 /* setup parameters to the driver */
502 /****************************************************************************/
504 ips_setup(char *ips_str)
510 IPS_OPTION options[] = {
511 {"noi2o", &ips_force_i2o, 0},
512 {"nommap", &ips_force_memio, 0},
513 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
514 {"cdboot", &ips_cd_boot, 0},
515 {"maxcmds", &MaxLiteCmds, 32},
518 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
519 /* Search for value */
520 while ((key = strsep(&ips_str, ",."))) {
523 value = strchr(key, ':');
527 * We now have key/value pairs.
528 * Update the variables
530 for (i = 0; i < ARRAY_SIZE(options); i++) {
532 (key, options[i].option_name,
533 strlen(options[i].option_name)) == 0) {
535 *options[i].option_flag =
536 simple_strtoul(value, NULL, 0);
538 *options[i].option_flag =
539 options[i].option_value;
548 __setup("ips=", ips_setup);
550 /****************************************************************************/
552 /* Routine Name: ips_detect */
554 /* Routine Description: */
556 /* Detect and initialize the driver */
558 /* NOTE: this routine is called under the io_request_lock spinlock */
560 /****************************************************************************/
562 ips_detect(struct scsi_host_template * SHT)
566 METHOD_TRACE("ips_detect", 1);
573 for (i = 0; i < ips_num_controllers; i++) {
574 if (ips_register_scsi(i))
576 ips_released_controllers++;
579 return (ips_num_controllers);
582 /****************************************************************************/
583 /* configure the function pointers to use the functions that will work */
584 /* with the found version of the adapter */
585 /****************************************************************************/
587 ips_setup_funclist(ips_ha_t * ha)
593 if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
594 /* morpheus / marco / sebring */
595 ha->func.isintr = ips_isintr_morpheus;
596 ha->func.isinit = ips_isinit_morpheus;
597 ha->func.issue = ips_issue_i2o_memio;
598 ha->func.init = ips_init_morpheus;
599 ha->func.statupd = ips_statupd_morpheus;
600 ha->func.reset = ips_reset_morpheus;
601 ha->func.intr = ips_intr_morpheus;
602 ha->func.enableint = ips_enable_int_morpheus;
603 } else if (IPS_USE_MEMIO(ha)) {
604 /* copperhead w/MEMIO */
605 ha->func.isintr = ips_isintr_copperhead_memio;
606 ha->func.isinit = ips_isinit_copperhead_memio;
607 ha->func.init = ips_init_copperhead_memio;
608 ha->func.statupd = ips_statupd_copperhead_memio;
609 ha->func.statinit = ips_statinit_memio;
610 ha->func.reset = ips_reset_copperhead_memio;
611 ha->func.intr = ips_intr_copperhead;
612 ha->func.erasebios = ips_erase_bios_memio;
613 ha->func.programbios = ips_program_bios_memio;
614 ha->func.verifybios = ips_verify_bios_memio;
615 ha->func.enableint = ips_enable_int_copperhead_memio;
616 if (IPS_USE_I2O_DELIVER(ha))
617 ha->func.issue = ips_issue_i2o_memio;
619 ha->func.issue = ips_issue_copperhead_memio;
622 ha->func.isintr = ips_isintr_copperhead;
623 ha->func.isinit = ips_isinit_copperhead;
624 ha->func.init = ips_init_copperhead;
625 ha->func.statupd = ips_statupd_copperhead;
626 ha->func.statinit = ips_statinit;
627 ha->func.reset = ips_reset_copperhead;
628 ha->func.intr = ips_intr_copperhead;
629 ha->func.erasebios = ips_erase_bios;
630 ha->func.programbios = ips_program_bios;
631 ha->func.verifybios = ips_verify_bios;
632 ha->func.enableint = ips_enable_int_copperhead;
634 if (IPS_USE_I2O_DELIVER(ha))
635 ha->func.issue = ips_issue_i2o;
637 ha->func.issue = ips_issue_copperhead;
641 /****************************************************************************/
643 /* Routine Name: ips_release */
645 /* Routine Description: */
647 /* Remove a driver */
649 /****************************************************************************/
651 ips_release(struct Scsi_Host *sh)
657 METHOD_TRACE("ips_release", 1);
659 for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
661 if (i == IPS_MAX_ADAPTERS) {
663 "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
673 /* flush the cache on the controller */
674 scb = &ha->scbs[ha->max_cmds - 1];
676 ips_init_scb(ha, scb);
678 scb->timeout = ips_cmd_timeout;
679 scb->cdb[0] = IPS_CMD_FLUSH;
681 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
682 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
683 scb->cmd.flush_cache.state = IPS_NORM_STATE;
684 scb->cmd.flush_cache.reserved = 0;
685 scb->cmd.flush_cache.reserved2 = 0;
686 scb->cmd.flush_cache.reserved3 = 0;
687 scb->cmd.flush_cache.reserved4 = 0;
689 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
692 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
693 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
695 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
700 /* free extra memory */
703 /* Free I/O Region */
705 release_region(ha->io_addr, ha->io_len);
708 free_irq(ha->irq, ha);
710 scsi_remove_host(sh);
713 ips_released_controllers++;
718 /****************************************************************************/
720 /* Routine Name: ips_halt */
722 /* Routine Description: */
724 /* Perform cleanup when the system reboots */
726 /****************************************************************************/
728 ips_halt(struct notifier_block *nb, ulong event, void *buf)
734 if ((event != SYS_RESTART) && (event != SYS_HALT) &&
735 (event != SYS_POWER_OFF))
736 return (NOTIFY_DONE);
738 for (i = 0; i < ips_next_controller; i++) {
739 ha = (ips_ha_t *) ips_ha[i];
747 /* flush the cache on the controller */
748 scb = &ha->scbs[ha->max_cmds - 1];
750 ips_init_scb(ha, scb);
752 scb->timeout = ips_cmd_timeout;
753 scb->cdb[0] = IPS_CMD_FLUSH;
755 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
756 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
757 scb->cmd.flush_cache.state = IPS_NORM_STATE;
758 scb->cmd.flush_cache.reserved = 0;
759 scb->cmd.flush_cache.reserved2 = 0;
760 scb->cmd.flush_cache.reserved3 = 0;
761 scb->cmd.flush_cache.reserved4 = 0;
763 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
766 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
768 IPS_PRINTK(KERN_WARNING, ha->pcidev,
769 "Incomplete Flush.\n");
771 IPS_PRINTK(KERN_WARNING, ha->pcidev,
772 "Flushing Complete.\n");
778 /****************************************************************************/
780 /* Routine Name: ips_eh_abort */
782 /* Routine Description: */
784 /* Abort a command (using the new error code stuff) */
785 /* Note: this routine is called under the io_request_lock */
786 /****************************************************************************/
787 int ips_eh_abort(struct scsi_cmnd *SC)
790 ips_copp_wait_item_t *item;
792 struct Scsi_Host *host;
794 METHOD_TRACE("ips_eh_abort", 1);
799 host = SC->device->host;
800 ha = (ips_ha_t *) SC->device->host->hostdata;
808 spin_lock(host->host_lock);
810 /* See if the command is on the copp queue */
811 item = ha->copp_waitlist.head;
812 while ((item) && (item->scsi_cmd != SC))
817 ips_removeq_copp(&ha->copp_waitlist, item);
820 /* See if the command is on the wait queue */
821 } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
822 /* command not sent yet */
825 /* command must have already been sent */
829 spin_unlock(host->host_lock);
833 /****************************************************************************/
835 /* Routine Name: ips_eh_reset */
837 /* Routine Description: */
839 /* Reset the controller (with new eh error code) */
841 /* NOTE: this routine is called under the io_request_lock spinlock */
843 /****************************************************************************/
844 static int __ips_eh_reset(struct scsi_cmnd *SC)
850 ips_copp_wait_item_t *item;
852 METHOD_TRACE("ips_eh_reset", 1);
859 DEBUG(1, "Reset called with NULL scsi command");
864 ha = (ips_ha_t *) SC->device->host->hostdata;
867 DEBUG(1, "Reset called with NULL ha struct");
875 /* See if the command is on the copp queue */
876 item = ha->copp_waitlist.head;
877 while ((item) && (item->scsi_cmd != SC))
882 ips_removeq_copp(&ha->copp_waitlist, item);
886 /* See if the command is on the wait queue */
887 if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
888 /* command not sent yet */
892 /* An explanation for the casual observer: */
893 /* Part of the function of a RAID controller is automatic error */
894 /* detection and recovery. As such, the only problem that physically */
895 /* resetting an adapter will ever fix is when, for some reason, */
896 /* the driver is not successfully communicating with the adapter. */
897 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
898 /* then there's no real purpose in a physical reset. This will complete */
899 /* much faster and avoids any problems that might be caused by a */
900 /* physical reset ( such as having to fail all the outstanding I/O's ). */
902 if (ha->ioctl_reset == 0) { /* IF Not an IOCTL Requested Reset */
903 scb = &ha->scbs[ha->max_cmds - 1];
905 ips_init_scb(ha, scb);
907 scb->timeout = ips_cmd_timeout;
908 scb->cdb[0] = IPS_CMD_FLUSH;
910 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
911 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
912 scb->cmd.flush_cache.state = IPS_NORM_STATE;
913 scb->cmd.flush_cache.reserved = 0;
914 scb->cmd.flush_cache.reserved2 = 0;
915 scb->cmd.flush_cache.reserved3 = 0;
916 scb->cmd.flush_cache.reserved4 = 0;
918 /* Attempt the flush command */
919 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
920 if (ret == IPS_SUCCESS) {
921 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
922 "Reset Request - Flushed Cache\n");
927 /* Either we can't communicate with the adapter or it's an IOCTL request */
928 /* from a utility. A physical reset is needed at this point. */
930 ha->ioctl_reset = 0; /* Reset the IOCTL Requested Reset Flag */
933 * command must have already been sent
934 * reset the controller
936 IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
937 ret = (*ha->func.reset) (ha);
940 struct scsi_cmnd *scsi_cmd;
942 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
943 "Controller reset failed - controller now offline.\n");
945 /* Now fail all of the active commands */
946 DEBUG_VAR(1, "(%s%d) Failing active commands",
947 ips_name, ha->host_num);
949 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
950 scb->scsi_cmd->result = DID_ERROR << 16;
951 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
952 ips_freescb(ha, scb);
955 /* Now fail all of the pending commands */
956 DEBUG_VAR(1, "(%s%d) Failing pending commands",
957 ips_name, ha->host_num);
959 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
960 scsi_cmd->result = DID_ERROR;
961 scsi_cmd->scsi_done(scsi_cmd);
968 if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
969 struct scsi_cmnd *scsi_cmd;
971 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
972 "Controller reset failed - controller now offline.\n");
974 /* Now fail all of the active commands */
975 DEBUG_VAR(1, "(%s%d) Failing active commands",
976 ips_name, ha->host_num);
978 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
979 scb->scsi_cmd->result = DID_ERROR << 16;
980 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
981 ips_freescb(ha, scb);
984 /* Now fail all of the pending commands */
985 DEBUG_VAR(1, "(%s%d) Failing pending commands",
986 ips_name, ha->host_num);
988 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
989 scsi_cmd->result = DID_ERROR << 16;
990 scsi_cmd->scsi_done(scsi_cmd);
998 if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
1001 do_gettimeofday(&tv);
1002 ha->last_ffdc = tv.tv_sec;
1004 ips_ffdc_reset(ha, IPS_INTR_IORL);
1007 /* Now fail all of the active commands */
1008 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1010 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1011 scb->scsi_cmd->result =
1012 (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1013 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1014 ips_freescb(ha, scb);
1017 /* Reset DCDB active command bits */
1018 for (i = 1; i < ha->nbus; i++)
1019 ha->dcdb_active[i - 1] = 0;
1021 /* Reset the number of active IOCTLs */
1024 ips_next(ha, IPS_INTR_IORL);
1027 #endif /* NO_IPS_RESET */
1031 static int ips_eh_reset(struct scsi_cmnd *SC)
1035 spin_lock_irq(SC->device->host->host_lock);
1036 rc = __ips_eh_reset(SC);
1037 spin_unlock_irq(SC->device->host->host_lock);
1042 /****************************************************************************/
1044 /* Routine Name: ips_queue */
1046 /* Routine Description: */
1048 /* Send a command to the controller */
1051 /* Linux obtains io_request_lock before calling this function */
1053 /****************************************************************************/
1054 static int ips_queue(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1059 METHOD_TRACE("ips_queue", 1);
1061 ha = (ips_ha_t *) SC->device->host->hostdata;
1069 if (ips_is_passthru(SC)) {
1070 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1071 SC->result = DID_BUS_BUSY << 16;
1076 } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1077 SC->result = DID_BUS_BUSY << 16;
1083 SC->scsi_done = done;
1085 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1089 SC->device->channel, SC->device->id, SC->device->lun);
1091 /* Check for command to initiator IDs */
1092 if ((scmd_channel(SC) > 0)
1093 && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1094 SC->result = DID_NO_CONNECT << 16;
1100 if (ips_is_passthru(SC)) {
1102 ips_copp_wait_item_t *scratch;
1104 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1105 /* There can never be any system activity ( network or disk ), but check */
1106 /* anyway just as a good practice. */
1107 pt = (ips_passthru_t *) SC->request_buffer;
1108 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1109 (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1110 if (ha->scb_activelist.count != 0) {
1111 SC->result = DID_BUS_BUSY << 16;
1115 ha->ioctl_reset = 1; /* This reset request is from an IOCTL */
1117 SC->result = DID_OK << 16;
1122 /* allocate space for the scribble */
1123 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1126 SC->result = DID_ERROR << 16;
1132 scratch->scsi_cmd = SC;
1133 scratch->next = NULL;
1135 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1137 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1140 ips_next(ha, IPS_INTR_IORL);
1145 /****************************************************************************/
1147 /* Routine Name: ips_biosparam */
1149 /* Routine Description: */
1151 /* Set bios geometry for the controller */
1153 /****************************************************************************/
1154 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1155 sector_t capacity, int geom[])
1157 ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1162 METHOD_TRACE("ips_biosparam", 1);
1165 /* ?!?! host adater info invalid */
1171 if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1172 /* ?!?! Enquiry command failed */
1175 if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1176 heads = IPS_NORM_HEADS;
1177 sectors = IPS_NORM_SECTORS;
1179 heads = IPS_COMP_HEADS;
1180 sectors = IPS_COMP_SECTORS;
1183 cylinders = (unsigned long) capacity / (heads * sectors);
1185 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1186 heads, sectors, cylinders);
1190 geom[2] = cylinders;
1195 /****************************************************************************/
1197 /* Routine Name: ips_slave_configure */
1199 /* Routine Description: */
1201 /* Set queue depths on devices once scan is complete */
1203 /****************************************************************************/
1205 ips_slave_configure(struct scsi_device * SDptr)
1210 ha = IPS_HA(SDptr->host);
1211 if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1212 min = ha->max_cmds / 2;
1213 if (ha->enq->ucLogDriveCount <= 2)
1214 min = ha->max_cmds - 1;
1215 scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1218 SDptr->skip_ms_page_8 = 1;
1219 SDptr->skip_ms_page_3f = 1;
1223 /****************************************************************************/
1225 /* Routine Name: do_ipsintr */
1227 /* Routine Description: */
1229 /* Wrapper for the interrupt handler */
1231 /****************************************************************************/
1233 do_ipsintr(int irq, void *dev_id)
1236 struct Scsi_Host *host;
1239 METHOD_TRACE("do_ipsintr", 2);
1241 ha = (ips_ha_t *) dev_id;
1244 host = ips_sh[ha->host_num];
1245 /* interrupt during initialization */
1247 (*ha->func.intr) (ha);
1251 spin_lock(host->host_lock);
1254 spin_unlock(host->host_lock);
1258 irqstatus = (*ha->func.intr) (ha);
1260 spin_unlock(host->host_lock);
1262 /* start the next command */
1263 ips_next(ha, IPS_INTR_ON);
1264 return IRQ_RETVAL(irqstatus);
1267 /****************************************************************************/
1269 /* Routine Name: ips_intr_copperhead */
1271 /* Routine Description: */
1273 /* Polling interrupt handler */
1275 /* ASSUMES interrupts are disabled */
1277 /****************************************************************************/
1279 ips_intr_copperhead(ips_ha_t * ha)
1286 METHOD_TRACE("ips_intr", 2);
1294 intrstatus = (*ha->func.isintr) (ha);
1298 * Unexpected/Shared interrupt
1307 intrstatus = (*ha->func.isintr) (ha);
1312 cstatus.value = (*ha->func.statupd) (ha);
1314 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1315 /* Spurious Interupt ? */
1319 ips_chkstatus(ha, &cstatus);
1320 scb = (ips_scb_t *) sp->scb_addr;
1323 * use the callback function to finish things up
1324 * NOTE: interrupts are OFF for this
1326 (*scb->callback) (ha, scb);
1331 /****************************************************************************/
1333 /* Routine Name: ips_intr_morpheus */
1335 /* Routine Description: */
1337 /* Polling interrupt handler */
1339 /* ASSUMES interrupts are disabled */
1341 /****************************************************************************/
1343 ips_intr_morpheus(ips_ha_t * ha)
1350 METHOD_TRACE("ips_intr_morpheus", 2);
1358 intrstatus = (*ha->func.isintr) (ha);
1362 * Unexpected/Shared interrupt
1371 intrstatus = (*ha->func.isintr) (ha);
1376 cstatus.value = (*ha->func.statupd) (ha);
1378 if (cstatus.value == 0xffffffff)
1379 /* No more to process */
1382 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1383 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1384 "Spurious interrupt; no ccb.\n");
1389 ips_chkstatus(ha, &cstatus);
1390 scb = (ips_scb_t *) sp->scb_addr;
1393 * use the callback function to finish things up
1394 * NOTE: interrupts are OFF for this
1396 (*scb->callback) (ha, scb);
1401 /****************************************************************************/
1403 /* Routine Name: ips_info */
1405 /* Routine Description: */
1407 /* Return info about the driver */
1409 /****************************************************************************/
1411 ips_info(struct Scsi_Host *SH)
1413 static char buffer[256];
1417 METHOD_TRACE("ips_info", 1);
1425 memset(bp, 0, sizeof (buffer));
1427 sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1428 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1430 if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1432 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1439 /****************************************************************************/
1441 /* Routine Name: ips_proc_info */
1443 /* Routine Description: */
1445 /* The passthru interface for the driver */
1447 /****************************************************************************/
1449 ips_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
1450 int length, int func)
1454 ips_ha_t *ha = NULL;
1456 METHOD_TRACE("ips_proc_info", 1);
1458 /* Find our host structure */
1459 for (i = 0; i < ips_next_controller; i++) {
1461 if (ips_sh[i] == host) {
1462 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1479 ret = ips_host_info(ha, buffer, offset, length);
1485 /*--------------------------------------------------------------------------*/
1486 /* Helper Functions */
1487 /*--------------------------------------------------------------------------*/
1489 /****************************************************************************/
1491 /* Routine Name: ips_is_passthru */
1493 /* Routine Description: */
1495 /* Determine if the specified SCSI command is really a passthru command */
1497 /****************************************************************************/
1498 static int ips_is_passthru(struct scsi_cmnd *SC)
1500 unsigned long flags;
1502 METHOD_TRACE("ips_is_passthru", 1);
1507 if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1508 (SC->device->channel == 0) &&
1509 (SC->device->id == IPS_ADAPTER_ID) &&
1510 (SC->device->lun == 0) && SC->request_buffer) {
1511 if ((!SC->use_sg) && SC->request_bufflen &&
1512 (((char *) SC->request_buffer)[0] == 'C') &&
1513 (((char *) SC->request_buffer)[1] == 'O') &&
1514 (((char *) SC->request_buffer)[2] == 'P') &&
1515 (((char *) SC->request_buffer)[3] == 'P'))
1517 else if (SC->use_sg) {
1518 struct scatterlist *sg = SC->request_buffer;
1521 /* kmap_atomic() ensures addressability of the user buffer.*/
1522 /* local_irq_save() protects the KM_IRQ0 address slot. */
1523 local_irq_save(flags);
1524 buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1525 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1526 buffer[2] == 'P' && buffer[3] == 'P') {
1527 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1528 local_irq_restore(flags);
1531 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1532 local_irq_restore(flags);
1538 /****************************************************************************/
1540 /* Routine Name: ips_alloc_passthru_buffer */
1542 /* Routine Description: */
1543 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1544 /* is too small or doesn't exist */
1545 /****************************************************************************/
1547 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1550 dma_addr_t dma_busaddr;
1552 if (ha->ioctl_data && length <= ha->ioctl_len)
1554 /* there is no buffer or it's not big enough, allocate a new one */
1555 bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1557 /* free the old memory */
1558 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1560 /* use the new memory */
1561 ha->ioctl_data = (char *) bigger_buf;
1562 ha->ioctl_len = length;
1563 ha->ioctl_busaddr = dma_busaddr;
1570 /****************************************************************************/
1572 /* Routine Name: ips_make_passthru */
1574 /* Routine Description: */
1576 /* Make a passthru command out of the info in the Scsi block */
1578 /****************************************************************************/
1580 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1586 METHOD_TRACE("ips_make_passthru", 1);
1589 length = SC->request_bufflen;
1591 struct scatterlist *sg = SC->request_buffer;
1593 for (i = 0; i < SC->use_sg; i++)
1594 length += sg[i].length;
1596 if (length < sizeof (ips_passthru_t)) {
1598 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1599 ips_name, ha->host_num);
1600 return (IPS_FAILURE);
1602 if (ips_alloc_passthru_buffer(ha, length)) {
1603 /* allocation failure! If ha->ioctl_data exists, use it to return
1604 some error codes. Return a failed command to the scsi layer. */
1605 if (ha->ioctl_data) {
1606 pt = (ips_passthru_t *) ha->ioctl_data;
1607 ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1608 pt->BasicStatus = 0x0B;
1609 pt->ExtendedStatus = 0x00;
1610 ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1614 ha->ioctl_datasize = length;
1616 ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1617 pt = (ips_passthru_t *) ha->ioctl_data;
1620 * Some notes about the passthru interface used
1622 * IF the scsi op_code == 0x0d then we assume
1623 * that the data came along with/goes with the
1624 * packet we received from the sg driver. In this
1625 * case the CmdBSize field of the pt structure is
1626 * used for the size of the buffer.
1629 switch (pt->CoppCmd) {
1631 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1632 &ips_num_controllers, sizeof (int));
1633 ips_scmd_buf_write(SC, ha->ioctl_data,
1634 sizeof (ips_passthru_t) + sizeof (int));
1635 SC->result = DID_OK << 16;
1637 return (IPS_SUCCESS_IMM);
1639 case IPS_COPPUSRCMD:
1640 case IPS_COPPIOCCMD:
1641 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1642 if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1645 "(%s%d) Passthru structure wrong size",
1646 ips_name, ha->host_num);
1648 return (IPS_FAILURE);
1651 if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
1652 pt->CoppCP.cmd.flashfw.op_code ==
1653 IPS_CMD_RW_BIOSFW) {
1654 ret = ips_flash_copperhead(ha, pt, scb);
1655 ips_scmd_buf_write(SC, ha->ioctl_data,
1656 sizeof (ips_passthru_t));
1659 if (ips_usrcmd(ha, pt, scb))
1660 return (IPS_SUCCESS);
1662 return (IPS_FAILURE);
1669 return (IPS_FAILURE);
1672 /****************************************************************************/
1673 /* Routine Name: ips_flash_copperhead */
1674 /* Routine Description: */
1675 /* Flash the BIOS/FW on a Copperhead style controller */
1676 /****************************************************************************/
1678 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1682 /* Trombone is the only copperhead that can do packet flash, but only
1683 * for firmware. No one said it had to make sence. */
1684 if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1685 if (ips_usrcmd(ha, pt, scb))
1690 pt->BasicStatus = 0x0B;
1691 pt->ExtendedStatus = 0;
1692 scb->scsi_cmd->result = DID_OK << 16;
1693 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1694 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1695 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1696 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1697 pt->BasicStatus = 0;
1698 return ips_flash_bios(ha, pt, scb);
1699 } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1700 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1701 ha->flash_data = ips_FlashData;
1702 ha->flash_busaddr = ips_flashbusaddr;
1703 ha->flash_len = PAGE_SIZE << 7;
1704 ha->flash_datasize = 0;
1705 } else if (!ha->flash_data) {
1706 datasize = pt->CoppCP.cmd.flashfw.total_packets *
1707 pt->CoppCP.cmd.flashfw.count;
1708 ha->flash_data = pci_alloc_consistent(ha->pcidev,
1710 &ha->flash_busaddr);
1711 if (!ha->flash_data){
1712 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1715 ha->flash_datasize = 0;
1716 ha->flash_len = datasize;
1720 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1722 ips_free_flash_copperhead(ha);
1723 IPS_PRINTK(KERN_WARNING, ha->pcidev,
1724 "failed size sanity check\n");
1728 if (!ha->flash_data)
1730 pt->BasicStatus = 0;
1731 memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1732 pt->CoppCP.cmd.flashfw.count);
1733 ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1734 if (pt->CoppCP.cmd.flashfw.packet_num ==
1735 pt->CoppCP.cmd.flashfw.total_packets - 1) {
1736 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1737 return ips_flash_bios(ha, pt, scb);
1738 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1739 return ips_flash_firmware(ha, pt, scb);
1741 return IPS_SUCCESS_IMM;
1744 /****************************************************************************/
1745 /* Routine Name: ips_flash_bios */
1746 /* Routine Description: */
1747 /* flashes the bios of a copperhead adapter */
1748 /****************************************************************************/
1750 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1753 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1754 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1755 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1756 (!ha->func.verifybios))
1758 if ((*ha->func.erasebios) (ha)) {
1760 "(%s%d) flash bios failed - unable to erase flash",
1761 ips_name, ha->host_num);
1764 if ((*ha->func.programbios) (ha,
1767 ha->flash_datasize -
1768 IPS_BIOS_HEADER, 0)) {
1770 "(%s%d) flash bios failed - unable to flash",
1771 ips_name, ha->host_num);
1774 if ((*ha->func.verifybios) (ha,
1777 ha->flash_datasize -
1778 IPS_BIOS_HEADER, 0)) {
1780 "(%s%d) flash bios failed - unable to verify flash",
1781 ips_name, ha->host_num);
1784 ips_free_flash_copperhead(ha);
1785 return IPS_SUCCESS_IMM;
1786 } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1787 pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1788 if (!ha->func.erasebios)
1790 if ((*ha->func.erasebios) (ha)) {
1792 "(%s%d) flash bios failed - unable to erase flash",
1793 ips_name, ha->host_num);
1796 return IPS_SUCCESS_IMM;
1799 pt->BasicStatus = 0x0B;
1800 pt->ExtendedStatus = 0x00;
1801 ips_free_flash_copperhead(ha);
1805 /****************************************************************************/
1807 /* Routine Name: ips_fill_scb_sg_single */
1809 /* Routine Description: */
1810 /* Fill in a single scb sg_list element from an address */
1811 /* return a -1 if a breakup occurred */
1812 /****************************************************************************/
1814 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1815 ips_scb_t * scb, int indx, unsigned int e_len)
1820 if ((scb->data_len + e_len) > ha->max_xfer) {
1821 e_len = ha->max_xfer - scb->data_len;
1822 scb->breakup = indx;
1829 if (IPS_USE_ENH_SGLIST(ha)) {
1830 scb->sg_list.enh_list[indx].address_lo =
1831 cpu_to_le32(pci_dma_lo32(busaddr));
1832 scb->sg_list.enh_list[indx].address_hi =
1833 cpu_to_le32(pci_dma_hi32(busaddr));
1834 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1836 scb->sg_list.std_list[indx].address =
1837 cpu_to_le32(pci_dma_lo32(busaddr));
1838 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1842 scb->data_len += e_len;
1846 /****************************************************************************/
1847 /* Routine Name: ips_flash_firmware */
1848 /* Routine Description: */
1849 /* flashes the firmware of a copperhead adapter */
1850 /****************************************************************************/
1852 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1854 IPS_SG_LIST sg_list;
1855 uint32_t cmd_busaddr;
1857 if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1858 pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1859 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1860 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1861 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1863 pt->BasicStatus = 0x0B;
1864 pt->ExtendedStatus = 0x00;
1865 ips_free_flash_copperhead(ha);
1868 /* Save the S/G list pointer so it doesn't get clobbered */
1869 sg_list.list = scb->sg_list.list;
1870 cmd_busaddr = scb->scb_busaddr;
1871 /* copy in the CP */
1872 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1873 /* FIX stuff that might be wrong */
1874 scb->sg_list.list = sg_list.list;
1875 scb->scb_busaddr = cmd_busaddr;
1876 scb->bus = scb->scsi_cmd->device->channel;
1877 scb->target_id = scb->scsi_cmd->device->id;
1878 scb->lun = scb->scsi_cmd->device->lun;
1883 scb->callback = ipsintr_done;
1884 scb->timeout = ips_cmd_timeout;
1886 scb->data_len = ha->flash_datasize;
1888 pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1890 scb->flags |= IPS_SCB_MAP_SINGLE;
1891 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1892 scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1894 scb->timeout = pt->TimeOut;
1895 scb->scsi_cmd->result = DID_OK << 16;
1899 /****************************************************************************/
1900 /* Routine Name: ips_free_flash_copperhead */
1901 /* Routine Description: */
1902 /* release the memory resources used to hold the flash image */
1903 /****************************************************************************/
1905 ips_free_flash_copperhead(ips_ha_t * ha)
1907 if (ha->flash_data == ips_FlashData)
1908 test_and_clear_bit(0, &ips_FlashDataInUse);
1909 else if (ha->flash_data)
1910 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
1912 ha->flash_data = NULL;
1915 /****************************************************************************/
1917 /* Routine Name: ips_usrcmd */
1919 /* Routine Description: */
1921 /* Process a user command and make it ready to send */
1923 /****************************************************************************/
1925 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1927 IPS_SG_LIST sg_list;
1928 uint32_t cmd_busaddr;
1930 METHOD_TRACE("ips_usrcmd", 1);
1932 if ((!scb) || (!pt) || (!ha))
1935 /* Save the S/G list pointer so it doesn't get clobbered */
1936 sg_list.list = scb->sg_list.list;
1937 cmd_busaddr = scb->scb_busaddr;
1938 /* copy in the CP */
1939 memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1940 memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1942 /* FIX stuff that might be wrong */
1943 scb->sg_list.list = sg_list.list;
1944 scb->scb_busaddr = cmd_busaddr;
1945 scb->bus = scb->scsi_cmd->device->channel;
1946 scb->target_id = scb->scsi_cmd->device->id;
1947 scb->lun = scb->scsi_cmd->device->lun;
1952 scb->callback = ipsintr_done;
1953 scb->timeout = ips_cmd_timeout;
1954 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1956 /* we don't support DCDB/READ/WRITE Scatter Gather */
1957 if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1958 (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1959 (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1963 scb->data_len = pt->CmdBSize;
1964 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1966 scb->data_busaddr = 0L;
1969 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1970 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1971 (unsigned long) &scb->
1973 (unsigned long) scb);
1976 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1977 scb->dcdb.buffer_pointer =
1978 cpu_to_le32(scb->data_busaddr);
1980 scb->cmd.basic_io.sg_addr =
1981 cpu_to_le32(scb->data_busaddr);
1986 scb->timeout = pt->TimeOut;
1988 if (pt->TimeOut <= 10)
1989 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1990 else if (pt->TimeOut <= 60)
1991 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1993 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1996 /* assume success */
1997 scb->scsi_cmd->result = DID_OK << 16;
2003 /****************************************************************************/
2005 /* Routine Name: ips_cleanup_passthru */
2007 /* Routine Description: */
2009 /* Cleanup after a passthru command */
2011 /****************************************************************************/
2013 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
2017 METHOD_TRACE("ips_cleanup_passthru", 1);
2019 if ((!scb) || (!scb->scsi_cmd) || (!scb->scsi_cmd->request_buffer)) {
2020 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2021 ips_name, ha->host_num);
2025 pt = (ips_passthru_t *) ha->ioctl_data;
2027 /* Copy data back to the user */
2028 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB) /* Copy DCDB Back to Caller's Area */
2029 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2031 pt->BasicStatus = scb->basic_status;
2032 pt->ExtendedStatus = scb->extended_status;
2033 pt->AdapterType = ha->ad_type;
2035 if (ha->device_id == IPS_DEVICEID_COPPERHEAD &&
2036 (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2037 scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2038 ips_free_flash_copperhead(ha);
2040 ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2043 /****************************************************************************/
2045 /* Routine Name: ips_host_info */
2047 /* Routine Description: */
2049 /* The passthru interface for the driver */
2051 /****************************************************************************/
2053 ips_host_info(ips_ha_t * ha, char *ptr, off_t offset, int len)
2057 METHOD_TRACE("ips_host_info", 1);
2061 info.offset = offset;
2065 copy_info(&info, "\nIBM ServeRAID General Information:\n\n");
2067 if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2068 (le16_to_cpu(ha->nvram->adapter_type) != 0))
2069 copy_info(&info, "\tController Type : %s\n",
2070 ips_adapter_name[ha->ad_type - 1]);
2073 "\tController Type : Unknown\n");
2077 "\tIO region : 0x%lx (%d bytes)\n",
2078 ha->io_addr, ha->io_len);
2082 "\tMemory region : 0x%lx (%d bytes)\n",
2083 ha->mem_addr, ha->mem_len);
2085 "\tShared memory address : 0x%lx\n",
2089 copy_info(&info, "\tIRQ number : %d\n", ha->irq);
2091 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2092 /* That keeps everything happy for "text" operations on the proc file. */
2094 if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2095 if (ha->nvram->bios_low[3] == 0) {
2097 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2098 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2099 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2100 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2101 ha->nvram->bios_low[2]);
2105 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2106 ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2107 ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2108 ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2109 ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2114 if (ha->enq->CodeBlkVersion[7] == 0) {
2116 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2117 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2118 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2119 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2120 ha->enq->CodeBlkVersion[6]);
2123 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2124 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2125 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2126 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2127 ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2130 if (ha->enq->BootBlkVersion[7] == 0) {
2132 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2133 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2134 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2135 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2136 ha->enq->BootBlkVersion[6]);
2139 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2140 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2141 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2142 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2143 ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2146 copy_info(&info, "\tDriver Version : %s%s\n",
2147 IPS_VERSION_HIGH, IPS_VERSION_LOW);
2149 copy_info(&info, "\tDriver Build : %d\n",
2152 copy_info(&info, "\tMax Physical Devices : %d\n",
2153 ha->enq->ucMaxPhysicalDevices);
2154 copy_info(&info, "\tMax Active Commands : %d\n",
2156 copy_info(&info, "\tCurrent Queued Commands : %d\n",
2157 ha->scb_waitlist.count);
2158 copy_info(&info, "\tCurrent Active Commands : %d\n",
2159 ha->scb_activelist.count - ha->num_ioctl);
2160 copy_info(&info, "\tCurrent Queued PT Commands : %d\n",
2161 ha->copp_waitlist.count);
2162 copy_info(&info, "\tCurrent Active PT Commands : %d\n",
2165 copy_info(&info, "\n");
2167 return (info.localpos);
2170 /****************************************************************************/
2172 /* Routine Name: copy_mem_info */
2174 /* Routine Description: */
2176 /* Copy data into an IPS_INFOSTR structure */
2178 /****************************************************************************/
2180 copy_mem_info(IPS_INFOSTR * info, char *data, int len)
2182 METHOD_TRACE("copy_mem_info", 1);
2184 if (info->pos + len < info->offset) {
2189 if (info->pos < info->offset) {
2190 data += (info->offset - info->pos);
2191 len -= (info->offset - info->pos);
2192 info->pos += (info->offset - info->pos);
2195 if (info->localpos + len > info->length)
2196 len = info->length - info->localpos;
2199 memcpy(info->buffer + info->localpos, data, len);
2201 info->localpos += len;
2205 /****************************************************************************/
2207 /* Routine Name: copy_info */
2209 /* Routine Description: */
2211 /* printf style wrapper for an info structure */
2213 /****************************************************************************/
2215 copy_info(IPS_INFOSTR * info, char *fmt, ...)
2221 METHOD_TRACE("copy_info", 1);
2223 va_start(args, fmt);
2224 len = vsprintf(buf, fmt, args);
2227 copy_mem_info(info, buf, len);
2232 /****************************************************************************/
2234 /* Routine Name: ips_identify_controller */
2236 /* Routine Description: */
2238 /* Identify this controller */
2240 /****************************************************************************/
2242 ips_identify_controller(ips_ha_t * ha)
2244 METHOD_TRACE("ips_identify_controller", 1);
2246 switch (ha->device_id) {
2247 case IPS_DEVICEID_COPPERHEAD:
2248 if (ha->revision_id <= IPS_REVID_SERVERAID) {
2249 ha->ad_type = IPS_ADTYPE_SERVERAID;
2250 } else if (ha->revision_id == IPS_REVID_SERVERAID2) {
2251 ha->ad_type = IPS_ADTYPE_SERVERAID2;
2252 } else if (ha->revision_id == IPS_REVID_NAVAJO) {
2253 ha->ad_type = IPS_ADTYPE_NAVAJO;
2254 } else if ((ha->revision_id == IPS_REVID_SERVERAID2)
2255 && (ha->slot_num == 0)) {
2256 ha->ad_type = IPS_ADTYPE_KIOWA;
2257 } else if ((ha->revision_id >= IPS_REVID_CLARINETP1) &&
2258 (ha->revision_id <= IPS_REVID_CLARINETP3)) {
2259 if (ha->enq->ucMaxPhysicalDevices == 15)
2260 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2262 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2263 } else if ((ha->revision_id >= IPS_REVID_TROMBONE32) &&
2264 (ha->revision_id <= IPS_REVID_TROMBONE64)) {
2265 ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2269 case IPS_DEVICEID_MORPHEUS:
2270 switch (ha->subdevice_id) {
2271 case IPS_SUBDEVICEID_4L:
2272 ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2275 case IPS_SUBDEVICEID_4M:
2276 ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2279 case IPS_SUBDEVICEID_4MX:
2280 ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2283 case IPS_SUBDEVICEID_4LX:
2284 ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2287 case IPS_SUBDEVICEID_5I2:
2288 ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2291 case IPS_SUBDEVICEID_5I1:
2292 ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2298 case IPS_DEVICEID_MARCO:
2299 switch (ha->subdevice_id) {
2300 case IPS_SUBDEVICEID_6M:
2301 ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2303 case IPS_SUBDEVICEID_6I:
2304 ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2306 case IPS_SUBDEVICEID_7k:
2307 ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2309 case IPS_SUBDEVICEID_7M:
2310 ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2317 /****************************************************************************/
2319 /* Routine Name: ips_get_bios_version */
2321 /* Routine Description: */
2323 /* Get the BIOS revision number */
2325 /****************************************************************************/
2327 ips_get_bios_version(ips_ha_t * ha, int intr)
2336 { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2339 METHOD_TRACE("ips_get_bios_version", 1);
2344 strncpy(ha->bios_version, " ?", 8);
2346 if (ha->device_id == IPS_DEVICEID_COPPERHEAD) {
2347 if (IPS_USE_MEMIO(ha)) {
2348 /* Memory Mapped I/O */
2351 writel(0, ha->mem_ptr + IPS_REG_FLAP);
2352 if (ha->revision_id == IPS_REVID_TROMBONE64)
2353 udelay(25); /* 25 us */
2355 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2358 writel(1, ha->mem_ptr + IPS_REG_FLAP);
2359 if (ha->revision_id == IPS_REVID_TROMBONE64)
2360 udelay(25); /* 25 us */
2362 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2365 /* Get Major version */
2366 writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2367 if (ha->revision_id == IPS_REVID_TROMBONE64)
2368 udelay(25); /* 25 us */
2370 major = readb(ha->mem_ptr + IPS_REG_FLDP);
2372 /* Get Minor version */
2373 writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2374 if (ha->revision_id == IPS_REVID_TROMBONE64)
2375 udelay(25); /* 25 us */
2376 minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2378 /* Get SubMinor version */
2379 writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2380 if (ha->revision_id == IPS_REVID_TROMBONE64)
2381 udelay(25); /* 25 us */
2382 subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2385 /* Programmed I/O */
2388 outl(0, ha->io_addr + IPS_REG_FLAP);
2389 if (ha->revision_id == IPS_REVID_TROMBONE64)
2390 udelay(25); /* 25 us */
2392 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2395 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
2396 if (ha->revision_id == IPS_REVID_TROMBONE64)
2397 udelay(25); /* 25 us */
2399 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2402 /* Get Major version */
2403 outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
2404 if (ha->revision_id == IPS_REVID_TROMBONE64)
2405 udelay(25); /* 25 us */
2407 major = inb(ha->io_addr + IPS_REG_FLDP);
2409 /* Get Minor version */
2410 outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
2411 if (ha->revision_id == IPS_REVID_TROMBONE64)
2412 udelay(25); /* 25 us */
2414 minor = inb(ha->io_addr + IPS_REG_FLDP);
2416 /* Get SubMinor version */
2417 outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
2418 if (ha->revision_id == IPS_REVID_TROMBONE64)
2419 udelay(25); /* 25 us */
2421 subminor = inb(ha->io_addr + IPS_REG_FLDP);
2425 /* Morpheus Family - Send Command to the card */
2427 buffer = ha->ioctl_data;
2429 memset(buffer, 0, 0x1000);
2431 scb = &ha->scbs[ha->max_cmds - 1];
2433 ips_init_scb(ha, scb);
2435 scb->timeout = ips_cmd_timeout;
2436 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2438 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2439 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2440 scb->cmd.flashfw.type = 1;
2441 scb->cmd.flashfw.direction = 0;
2442 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2443 scb->cmd.flashfw.total_packets = 1;
2444 scb->cmd.flashfw.packet_num = 0;
2445 scb->data_len = 0x1000;
2446 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2448 /* issue the command */
2450 ips_send_wait(ha, scb, ips_cmd_timeout,
2451 intr)) == IPS_FAILURE)
2452 || (ret == IPS_SUCCESS_IMM)
2453 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2454 /* Error occurred */
2459 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2460 major = buffer[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2461 minor = buffer[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2462 subminor = buffer[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2468 ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2469 ha->bios_version[1] = '.';
2470 ha->bios_version[2] = hexDigits[major & 0x0F];
2471 ha->bios_version[3] = hexDigits[subminor];
2472 ha->bios_version[4] = '.';
2473 ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2474 ha->bios_version[6] = hexDigits[minor & 0x0F];
2475 ha->bios_version[7] = 0;
2478 /****************************************************************************/
2480 /* Routine Name: ips_hainit */
2482 /* Routine Description: */
2484 /* Initialize the controller */
2486 /* NOTE: Assumes to be called from with a lock */
2488 /****************************************************************************/
2490 ips_hainit(ips_ha_t * ha)
2495 METHOD_TRACE("ips_hainit", 1);
2500 if (ha->func.statinit)
2501 (*ha->func.statinit) (ha);
2503 if (ha->func.enableint)
2504 (*ha->func.enableint) (ha);
2507 ha->reset_count = 1;
2508 do_gettimeofday(&tv);
2509 ha->last_ffdc = tv.tv_sec;
2510 ips_ffdc_reset(ha, IPS_INTR_IORL);
2512 if (!ips_read_config(ha, IPS_INTR_IORL)) {
2513 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2514 "unable to read config from controller.\n");
2519 if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2520 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2521 "unable to read controller status.\n");
2526 /* Identify this controller */
2527 ips_identify_controller(ha);
2529 if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2530 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2531 "unable to read subsystem parameters.\n");
2536 /* write nvram user page 5 */
2537 if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2538 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2539 "unable to write driver info to controller.\n");
2544 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2545 if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2546 ips_clear_adapter(ha, IPS_INTR_IORL);
2548 /* set limits on SID, LUN, BUS */
2549 ha->ntargets = IPS_MAX_TARGETS + 1;
2551 ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2553 switch (ha->conf->logical_drive[0].ucStripeSize) {
2555 ha->max_xfer = 0x10000;
2559 ha->max_xfer = 0x20000;
2563 ha->max_xfer = 0x40000;
2568 ha->max_xfer = 0x80000;
2572 /* setup max concurrent commands */
2573 if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2574 /* Use the new method */
2575 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2577 /* use the old method */
2578 switch (ha->conf->logical_drive[0].ucStripeSize) {
2598 /* Limit the Active Commands on a Lite Adapter */
2599 if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2600 (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2601 (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2602 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2603 ha->max_cmds = MaxLiteCmds;
2606 /* set controller IDs */
2607 ha->ha_id[0] = IPS_ADAPTER_ID;
2608 for (i = 1; i < ha->nbus; i++) {
2609 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2610 ha->dcdb_active[i - 1] = 0;
2616 /****************************************************************************/
2618 /* Routine Name: ips_next */
2620 /* Routine Description: */
2622 /* Take the next command off the queue and send it to the controller */
2624 /****************************************************************************/
2626 ips_next(ips_ha_t * ha, int intr)
2629 struct scsi_cmnd *SC;
2630 struct scsi_cmnd *p;
2631 struct scsi_cmnd *q;
2632 ips_copp_wait_item_t *item;
2634 struct Scsi_Host *host;
2635 METHOD_TRACE("ips_next", 1);
2639 host = ips_sh[ha->host_num];
2641 * Block access to the queue function so
2642 * this command won't time out
2644 if (intr == IPS_INTR_ON)
2645 spin_lock(host->host_lock);
2647 if ((ha->subsys->param[3] & 0x300000)
2648 && (ha->scb_activelist.count == 0)) {
2651 do_gettimeofday(&tv);
2653 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2654 ha->last_ffdc = tv.tv_sec;
2660 * Send passthru commands
2661 * These have priority over normal I/O
2662 * but shouldn't affect performance too much
2663 * since we limit the number that can be active
2664 * on the card at any one time
2666 while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2667 (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2669 item = ips_removeq_copp_head(&ha->copp_waitlist);
2671 if (intr == IPS_INTR_ON)
2672 spin_unlock(host->host_lock);
2673 scb->scsi_cmd = item->scsi_cmd;
2676 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2678 if (intr == IPS_INTR_ON)
2679 spin_lock(host->host_lock);
2682 if (scb->scsi_cmd) {
2683 scb->scsi_cmd->result = DID_ERROR << 16;
2684 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2687 ips_freescb(ha, scb);
2689 case IPS_SUCCESS_IMM:
2690 if (scb->scsi_cmd) {
2691 scb->scsi_cmd->result = DID_OK << 16;
2692 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2695 ips_freescb(ha, scb);
2701 if (ret != IPS_SUCCESS) {
2706 ret = ips_send_cmd(ha, scb);
2708 if (ret == IPS_SUCCESS)
2709 ips_putq_scb_head(&ha->scb_activelist, scb);
2715 if (scb->scsi_cmd) {
2716 scb->scsi_cmd->result = DID_ERROR << 16;
2719 ips_freescb(ha, scb);
2721 case IPS_SUCCESS_IMM:
2722 ips_freescb(ha, scb);
2731 * Send "Normal" I/O commands
2734 p = ha->scb_waitlist.head;
2735 while ((p) && (scb = ips_getscb(ha))) {
2736 if ((scmd_channel(p) > 0)
2738 dcdb_active[scmd_channel(p) -
2739 1] & (1 << scmd_id(p)))) {
2740 ips_freescb(ha, scb);
2741 p = (struct scsi_cmnd *) p->host_scribble;
2746 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2748 if (intr == IPS_INTR_ON)
2749 spin_unlock(host->host_lock); /* Unlock HA after command is taken off queue */
2751 SC->result = DID_OK;
2752 SC->host_scribble = NULL;
2754 memset(SC->sense_buffer, 0, sizeof (SC->sense_buffer));
2756 scb->target_id = SC->device->id;
2757 scb->lun = SC->device->lun;
2758 scb->bus = SC->device->channel;
2762 scb->callback = ipsintr_done;
2763 scb->timeout = ips_cmd_timeout;
2764 memset(&scb->cmd, 0, 16);
2766 /* copy in the CDB */
2767 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2769 /* Now handle the data buffer */
2771 struct scatterlist *sg;
2774 sg = SC->request_buffer;
2775 scb->sg_count = pci_map_sg(ha->pcidev, sg, SC->use_sg,
2776 SC->sc_data_direction);
2777 scb->flags |= IPS_SCB_MAP_SG;
2778 for (i = 0; i < scb->sg_count; i++) {
2779 if (ips_fill_scb_sg_single
2780 (ha, sg_dma_address(&sg[i]), scb, i,
2781 sg_dma_len(&sg[i])) < 0)
2784 scb->dcdb.transfer_length = scb->data_len;
2786 if (SC->request_bufflen) {
2788 pci_map_single(ha->pcidev,
2790 SC->request_bufflen,
2791 SC->sc_data_direction);
2792 scb->flags |= IPS_SCB_MAP_SINGLE;
2793 ips_fill_scb_sg_single(ha, scb->data_busaddr,
2795 SC->request_bufflen);
2796 scb->dcdb.transfer_length = scb->data_len;
2798 scb->data_busaddr = 0L;
2801 scb->dcdb.transfer_length = 0;
2806 scb->dcdb.cmd_attribute =
2807 ips_command_direction[scb->scsi_cmd->cmnd[0]];
2809 /* Allow a WRITE BUFFER Command to Have no Data */
2810 /* This is Used by Tape Flash Utilites */
2811 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) && (scb->data_len == 0))
2812 scb->dcdb.cmd_attribute = 0;
2814 if (!(scb->dcdb.cmd_attribute & 0x3))
2815 scb->dcdb.transfer_length = 0;
2817 if (scb->data_len >= IPS_MAX_XFER) {
2818 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2819 scb->dcdb.transfer_length = 0;
2821 if (intr == IPS_INTR_ON)
2822 spin_lock(host->host_lock);
2824 ret = ips_send_cmd(ha, scb);
2828 ips_putq_scb_head(&ha->scb_activelist, scb);
2831 if (scb->scsi_cmd) {
2832 scb->scsi_cmd->result = DID_ERROR << 16;
2833 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2837 ha->dcdb_active[scb->bus - 1] &=
2838 ~(1 << scb->target_id);
2840 ips_freescb(ha, scb);
2842 case IPS_SUCCESS_IMM:
2844 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2847 ha->dcdb_active[scb->bus - 1] &=
2848 ~(1 << scb->target_id);
2850 ips_freescb(ha, scb);
2856 p = (struct scsi_cmnd *) p->host_scribble;
2860 if (intr == IPS_INTR_ON)
2861 spin_unlock(host->host_lock);
2864 /****************************************************************************/
2866 /* Routine Name: ips_putq_scb_head */
2868 /* Routine Description: */
2870 /* Add an item to the head of the queue */
2872 /* ASSUMED to be called from within the HA lock */
2874 /****************************************************************************/
2876 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2878 METHOD_TRACE("ips_putq_scb_head", 1);
2883 item->q_next = queue->head;
2892 /****************************************************************************/
2894 /* Routine Name: ips_removeq_scb_head */
2896 /* Routine Description: */
2898 /* Remove the head of the queue */
2900 /* ASSUMED to be called from within the HA lock */
2902 /****************************************************************************/
2904 ips_removeq_scb_head(ips_scb_queue_t * queue)
2908 METHOD_TRACE("ips_removeq_scb_head", 1);
2916 queue->head = item->q_next;
2917 item->q_next = NULL;
2919 if (queue->tail == item)
2927 /****************************************************************************/
2929 /* Routine Name: ips_removeq_scb */
2931 /* Routine Description: */
2933 /* Remove an item from a queue */
2935 /* ASSUMED to be called from within the HA lock */
2937 /****************************************************************************/
2939 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2943 METHOD_TRACE("ips_removeq_scb", 1);
2948 if (item == queue->head) {
2949 return (ips_removeq_scb_head(queue));
2954 while ((p) && (item != p->q_next))
2959 p->q_next = item->q_next;
2964 item->q_next = NULL;
2973 /****************************************************************************/
2975 /* Routine Name: ips_putq_wait_tail */
2977 /* Routine Description: */
2979 /* Add an item to the tail of the queue */
2981 /* ASSUMED to be called from within the HA lock */
2983 /****************************************************************************/
2984 static void ips_putq_wait_tail(ips_wait_queue_t *queue, struct scsi_cmnd *item)
2986 METHOD_TRACE("ips_putq_wait_tail", 1);
2991 item->host_scribble = NULL;
2994 queue->tail->host_scribble = (char *) item;
3004 /****************************************************************************/
3006 /* Routine Name: ips_removeq_wait_head */
3008 /* Routine Description: */
3010 /* Remove the head of the queue */
3012 /* ASSUMED to be called from within the HA lock */
3014 /****************************************************************************/
3015 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *queue)
3017 struct scsi_cmnd *item;
3019 METHOD_TRACE("ips_removeq_wait_head", 1);
3027 queue->head = (struct scsi_cmnd *) item->host_scribble;
3028 item->host_scribble = NULL;
3030 if (queue->tail == item)
3038 /****************************************************************************/
3040 /* Routine Name: ips_removeq_wait */
3042 /* Routine Description: */
3044 /* Remove an item from a queue */
3046 /* ASSUMED to be called from within the HA lock */
3048 /****************************************************************************/
3049 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *queue,
3050 struct scsi_cmnd *item)
3052 struct scsi_cmnd *p;
3054 METHOD_TRACE("ips_removeq_wait", 1);
3059 if (item == queue->head) {
3060 return (ips_removeq_wait_head(queue));
3065 while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
3066 p = (struct scsi_cmnd *) p->host_scribble;
3070 p->host_scribble = item->host_scribble;
3072 if (!item->host_scribble)
3075 item->host_scribble = NULL;
3084 /****************************************************************************/
3086 /* Routine Name: ips_putq_copp_tail */
3088 /* Routine Description: */
3090 /* Add an item to the tail of the queue */
3092 /* ASSUMED to be called from within the HA lock */
3094 /****************************************************************************/
3096 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3098 METHOD_TRACE("ips_putq_copp_tail", 1);
3106 queue->tail->next = item;
3116 /****************************************************************************/
3118 /* Routine Name: ips_removeq_copp_head */
3120 /* Routine Description: */
3122 /* Remove the head of the queue */
3124 /* ASSUMED to be called from within the HA lock */
3126 /****************************************************************************/
3127 static ips_copp_wait_item_t *
3128 ips_removeq_copp_head(ips_copp_queue_t * queue)
3130 ips_copp_wait_item_t *item;
3132 METHOD_TRACE("ips_removeq_copp_head", 1);
3140 queue->head = item->next;
3143 if (queue->tail == item)
3151 /****************************************************************************/
3153 /* Routine Name: ips_removeq_copp */
3155 /* Routine Description: */
3157 /* Remove an item from a queue */
3159 /* ASSUMED to be called from within the HA lock */
3161 /****************************************************************************/
3162 static ips_copp_wait_item_t *
3163 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3165 ips_copp_wait_item_t *p;
3167 METHOD_TRACE("ips_removeq_copp", 1);
3172 if (item == queue->head) {
3173 return (ips_removeq_copp_head(queue));
3178 while ((p) && (item != p->next))
3183 p->next = item->next;
3197 /****************************************************************************/
3199 /* Routine Name: ipsintr_blocking */
3201 /* Routine Description: */
3203 /* Finalize an interrupt for internal commands */
3205 /****************************************************************************/
3207 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3209 METHOD_TRACE("ipsintr_blocking", 2);
3211 ips_freescb(ha, scb);
3212 if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3213 ha->waitflag = FALSE;
3219 /****************************************************************************/
3221 /* Routine Name: ipsintr_done */
3223 /* Routine Description: */
3225 /* Finalize an interrupt for non-internal commands */
3227 /****************************************************************************/
3229 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3231 METHOD_TRACE("ipsintr_done", 2);
3234 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3235 "Spurious interrupt; scb NULL.\n");
3240 if (scb->scsi_cmd == NULL) {
3241 /* unexpected interrupt */
3242 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3243 "Spurious interrupt; scsi_cmd not set.\n");
3251 /****************************************************************************/
3253 /* Routine Name: ips_done */
3255 /* Routine Description: */
3257 /* Do housekeeping on completed commands */
3258 /* ASSUMED to be called form within the request lock */
3259 /****************************************************************************/
3261 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3265 METHOD_TRACE("ips_done", 1);
3270 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3271 ips_cleanup_passthru(ha, scb);
3275 * Check to see if this command had too much
3276 * data and had to be broke up. If so, queue
3277 * the rest of the data and continue.
3279 if ((scb->breakup) || (scb->sg_break)) {
3280 /* we had a data breakup */
3283 if (scb->sg_count) {
3285 struct scatterlist *sg;
3286 int ips_sg_index = 0;
3289 sg = scb->scsi_cmd->request_buffer;
3291 /* Spin forward to last dma chunk */
3292 sg_dma_index = scb->breakup;
3294 /* Take care of possible partial on last chunk */
3295 ips_fill_scb_sg_single(ha,
3298 scb, ips_sg_index++,
3302 for (; sg_dma_index < scb->sg_count;
3304 if (ips_fill_scb_sg_single
3306 sg_dma_address(&sg[sg_dma_index]),
3307 scb, ips_sg_index++,
3308 sg_dma_len(&sg[sg_dma_index])) < 0)
3314 /* Non S/G Request */
3315 (void) ips_fill_scb_sg_single(ha,
3327 scb->dcdb.transfer_length = scb->data_len;
3328 scb->dcdb.cmd_attribute |=
3329 ips_command_direction[scb->scsi_cmd->cmnd[0]];
3331 if (!(scb->dcdb.cmd_attribute & 0x3))
3332 scb->dcdb.transfer_length = 0;
3334 if (scb->data_len >= IPS_MAX_XFER) {
3335 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3336 scb->dcdb.transfer_length = 0;
3339 ret = ips_send_cmd(ha, scb);
3343 if (scb->scsi_cmd) {
3344 scb->scsi_cmd->result = DID_ERROR << 16;
3345 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3348 ips_freescb(ha, scb);
3350 case IPS_SUCCESS_IMM:
3351 if (scb->scsi_cmd) {
3352 scb->scsi_cmd->result = DID_ERROR << 16;
3353 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3356 ips_freescb(ha, scb);
3364 } /* end if passthru */
3367 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3370 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3372 ips_freescb(ha, scb);
3375 /****************************************************************************/
3377 /* Routine Name: ips_map_status */
3379 /* Routine Description: */
3381 /* Map Controller Error codes to Linux Error Codes */
3383 /****************************************************************************/
3385 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3389 uint32_t transfer_len;
3390 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3391 IPS_SCSI_INQ_DATA inquiryData;
3393 METHOD_TRACE("ips_map_status", 1);
3397 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3398 ips_name, ha->host_num,
3399 scb->scsi_cmd->device->channel,
3400 scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3401 scb->basic_status, scb->extended_status,
3402 scb->extended_status ==
3403 IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3404 scb->extended_status ==
3405 IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3406 scb->extended_status ==
3407 IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3410 /* default driver error */
3411 errcode = DID_ERROR;
3414 switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3415 case IPS_CMD_TIMEOUT:
3416 errcode = DID_TIME_OUT;
3419 case IPS_INVAL_OPCO:
3420 case IPS_INVAL_CMD_BLK:
3421 case IPS_INVAL_PARM_BLK:
3423 case IPS_CMD_CMPLT_WERROR:
3426 case IPS_PHYS_DRV_ERROR:
3427 switch (scb->extended_status) {
3428 case IPS_ERR_SEL_TO:
3430 errcode = DID_NO_CONNECT;
3434 case IPS_ERR_OU_RUN:
3435 if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3436 (scb->cmd.dcdb.op_code ==
3437 IPS_CMD_EXTENDED_DCDB_SG)) {
3438 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3439 transfer_len = tapeDCDB->transfer_length;
3442 (uint32_t) scb->dcdb.transfer_length;
3445 if ((scb->bus) && (transfer_len < scb->data_len)) {
3446 /* Underrun - set default to no error */
3449 /* Restrict access to physical DASD */
3450 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3451 ips_scmd_buf_read(scb->scsi_cmd,
3452 &inquiryData, sizeof (inquiryData));
3453 if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3454 errcode = DID_TIME_OUT;
3459 errcode = DID_ERROR;
3463 case IPS_ERR_RECOVERY:
3464 /* don't fail recovered errors */
3470 case IPS_ERR_HOST_RESET:
3471 case IPS_ERR_DEV_RESET:
3472 errcode = DID_RESET;
3475 case IPS_ERR_CKCOND:
3477 if ((scb->cmd.dcdb.op_code ==
3478 IPS_CMD_EXTENDED_DCDB)
3479 || (scb->cmd.dcdb.op_code ==
3480 IPS_CMD_EXTENDED_DCDB_SG)) {
3482 (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3483 memcpy(scb->scsi_cmd->sense_buffer,
3484 tapeDCDB->sense_info,
3485 sizeof (scb->scsi_cmd->
3488 memcpy(scb->scsi_cmd->sense_buffer,
3489 scb->dcdb.sense_info,
3490 sizeof (scb->scsi_cmd->
3493 device_error = 2; /* check condition */
3501 errcode = DID_ERROR;
3507 scb->scsi_cmd->result = device_error | (errcode << 16);
3512 /****************************************************************************/
3514 /* Routine Name: ips_send_wait */
3516 /* Routine Description: */
3518 /* Send a command to the controller and wait for it to return */
3520 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3521 /* actually need to wait. */
3522 /****************************************************************************/
3524 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3528 METHOD_TRACE("ips_send_wait", 1);
3530 if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3531 ha->waitflag = TRUE;
3532 ha->cmd_in_progress = scb->cdb[0];
3534 scb->callback = ipsintr_blocking;
3535 ret = ips_send_cmd(ha, scb);
3537 if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3540 if (intr != IPS_FFDC) /* Don't Wait around if this is a Time Stamp */
3541 ret = ips_wait(ha, timeout, intr);
3546 /****************************************************************************/
3548 /* Routine Name: ips_scmd_buf_write */
3550 /* Routine Description: */
3551 /* Write data to struct scsi_cmnd request_buffer at proper offsets */
3552 /****************************************************************************/
3554 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3558 unsigned int min_cnt, xfer_cnt;
3559 char *cdata = (char *) data;
3560 unsigned char *buffer;
3561 unsigned long flags;
3562 struct scatterlist *sg = scmd->request_buffer;
3563 for (i = 0, xfer_cnt = 0;
3564 (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3565 min_cnt = min(count - xfer_cnt, sg[i].length);
3567 /* kmap_atomic() ensures addressability of the data buffer.*/
3568 /* local_irq_save() protects the KM_IRQ0 address slot. */
3569 local_irq_save(flags);
3570 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3571 memcpy(buffer, &cdata[xfer_cnt], min_cnt);
3572 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3573 local_irq_restore(flags);
3575 xfer_cnt += min_cnt;
3579 unsigned int min_cnt = min(count, scmd->request_bufflen);
3580 memcpy(scmd->request_buffer, data, min_cnt);
3584 /****************************************************************************/
3586 /* Routine Name: ips_scmd_buf_read */
3588 /* Routine Description: */
3589 /* Copy data from a struct scsi_cmnd to a new, linear buffer */
3590 /****************************************************************************/
3592 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3596 unsigned int min_cnt, xfer_cnt;
3597 char *cdata = (char *) data;
3598 unsigned char *buffer;
3599 unsigned long flags;
3600 struct scatterlist *sg = scmd->request_buffer;
3601 for (i = 0, xfer_cnt = 0;
3602 (i < scmd->use_sg) && (xfer_cnt < count); i++) {
3603 min_cnt = min(count - xfer_cnt, sg[i].length);
3605 /* kmap_atomic() ensures addressability of the data buffer.*/
3606 /* local_irq_save() protects the KM_IRQ0 address slot. */
3607 local_irq_save(flags);
3608 buffer = kmap_atomic(sg[i].page, KM_IRQ0) + sg[i].offset;
3609 memcpy(&cdata[xfer_cnt], buffer, min_cnt);
3610 kunmap_atomic(buffer - sg[i].offset, KM_IRQ0);
3611 local_irq_restore(flags);
3613 xfer_cnt += min_cnt;
3617 unsigned int min_cnt = min(count, scmd->request_bufflen);
3618 memcpy(data, scmd->request_buffer, min_cnt);
3622 /****************************************************************************/
3624 /* Routine Name: ips_send_cmd */
3626 /* Routine Description: */
3628 /* Map SCSI commands to ServeRAID commands for logical drives */
3630 /****************************************************************************/
3632 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3637 IPS_DCDB_TABLE_TAPE *tapeDCDB;
3640 METHOD_TRACE("ips_send_cmd", 1);
3644 if (!scb->scsi_cmd) {
3645 /* internal command */
3648 /* Controller commands can't be issued */
3649 /* to real devices -- fail them */
3650 if ((ha->waitflag == TRUE) &&
3651 (ha->cmd_in_progress == scb->cdb[0])) {
3652 ha->waitflag = FALSE;
3657 } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3658 /* command to logical bus -- interpret */
3659 ret = IPS_SUCCESS_IMM;
3661 switch (scb->scsi_cmd->cmnd[0]) {
3662 case ALLOW_MEDIUM_REMOVAL:
3665 case WRITE_FILEMARKS:
3667 scb->scsi_cmd->result = DID_ERROR << 16;
3671 scb->scsi_cmd->result = DID_OK << 16;
3673 case TEST_UNIT_READY:
3675 if (scb->target_id == IPS_ADAPTER_ID) {
3677 * Either we have a TUR
3678 * or we have a SCSI inquiry
3680 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3681 scb->scsi_cmd->result = DID_OK << 16;
3683 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3684 IPS_SCSI_INQ_DATA inquiry;
3687 sizeof (IPS_SCSI_INQ_DATA));
3689 inquiry.DeviceType =
3690 IPS_SCSI_INQ_TYPE_PROCESSOR;
3691 inquiry.DeviceTypeQualifier =
3692 IPS_SCSI_INQ_LU_CONNECTED;
3693 inquiry.Version = IPS_SCSI_INQ_REV2;
3694 inquiry.ResponseDataFormat =
3695 IPS_SCSI_INQ_RD_REV2;
3696 inquiry.AdditionalLength = 31;
3698 IPS_SCSI_INQ_Address16;
3700 IPS_SCSI_INQ_WBus16 |
3702 strncpy(inquiry.VendorId, "IBM ",
3704 strncpy(inquiry.ProductId,
3706 strncpy(inquiry.ProductRevisionLevel,
3709 ips_scmd_buf_write(scb->scsi_cmd,
3713 scb->scsi_cmd->result = DID_OK << 16;
3716 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3717 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3718 scb->cmd.logical_info.reserved = 0;
3719 scb->cmd.logical_info.reserved2 = 0;
3720 scb->data_len = sizeof (IPS_LD_INFO);
3721 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3723 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3730 ips_reqsen(ha, scb);
3731 scb->scsi_cmd->result = DID_OK << 16;
3737 scb->cmd.basic_io.op_code =
3738 (scb->scsi_cmd->cmnd[0] ==
3739 READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3740 scb->cmd.basic_io.enhanced_sg = 0;
3741 scb->cmd.basic_io.sg_addr =
3742 cpu_to_le32(scb->data_busaddr);
3744 scb->cmd.basic_io.op_code =
3745 (scb->scsi_cmd->cmnd[0] ==
3746 READ_6) ? IPS_CMD_READ_SG :
3748 scb->cmd.basic_io.enhanced_sg =
3749 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3750 scb->cmd.basic_io.sg_addr =
3751 cpu_to_le32(scb->sg_busaddr);
3754 scb->cmd.basic_io.segment_4G = 0;
3755 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3756 scb->cmd.basic_io.log_drv = scb->target_id;
3757 scb->cmd.basic_io.sg_count = scb->sg_len;
3759 if (scb->cmd.basic_io.lba)
3760 scb->cmd.basic_io.lba =
3761 cpu_to_le32(le32_to_cpu
3762 (scb->cmd.basic_io.lba) +
3763 le16_to_cpu(scb->cmd.basic_io.
3766 scb->cmd.basic_io.lba =
3768 cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3770 (scb->scsi_cmd->cmnd[3]));
3772 scb->cmd.basic_io.sector_count =
3773 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3775 if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3776 scb->cmd.basic_io.sector_count =
3785 scb->cmd.basic_io.op_code =
3786 (scb->scsi_cmd->cmnd[0] ==
3787 READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3788 scb->cmd.basic_io.enhanced_sg = 0;
3789 scb->cmd.basic_io.sg_addr =
3790 cpu_to_le32(scb->data_busaddr);
3792 scb->cmd.basic_io.op_code =
3793 (scb->scsi_cmd->cmnd[0] ==
3794 READ_10) ? IPS_CMD_READ_SG :
3796 scb->cmd.basic_io.enhanced_sg =
3797 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3798 scb->cmd.basic_io.sg_addr =
3799 cpu_to_le32(scb->sg_busaddr);
3802 scb->cmd.basic_io.segment_4G = 0;
3803 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3804 scb->cmd.basic_io.log_drv = scb->target_id;
3805 scb->cmd.basic_io.sg_count = scb->sg_len;
3807 if (scb->cmd.basic_io.lba)
3808 scb->cmd.basic_io.lba =
3809 cpu_to_le32(le32_to_cpu
3810 (scb->cmd.basic_io.lba) +
3811 le16_to_cpu(scb->cmd.basic_io.
3814 scb->cmd.basic_io.lba =
3815 ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3819 (scb->scsi_cmd->cmnd[4] << 8) | scb->
3822 scb->cmd.basic_io.sector_count =
3823 cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3825 if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3827 * This is a null condition
3828 * we don't have to do anything
3831 scb->scsi_cmd->result = DID_OK << 16;
3839 scb->scsi_cmd->result = DID_OK << 16;
3843 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3844 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3845 scb->cmd.basic_io.segment_4G = 0;
3846 scb->cmd.basic_io.enhanced_sg = 0;
3847 scb->data_len = sizeof (*ha->enq);
3848 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3853 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3854 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3855 scb->cmd.logical_info.reserved = 0;
3856 scb->cmd.logical_info.reserved2 = 0;
3857 scb->cmd.logical_info.reserved3 = 0;
3858 scb->data_len = sizeof (IPS_LD_INFO);
3859 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3861 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3865 case SEND_DIAGNOSTIC:
3866 case REASSIGN_BLOCKS:
3870 case READ_DEFECT_DATA:
3873 scb->scsi_cmd->result = DID_OK << 16;
3877 /* Set the Return Info to appear like the Command was */
3878 /* attempted, a Check Condition occurred, and Sense */
3879 /* Data indicating an Invalid CDB OpCode is returned. */
3880 sp = (char *) scb->scsi_cmd->sense_buffer;
3881 memset(sp, 0, sizeof (scb->scsi_cmd->sense_buffer));
3883 sp[0] = 0x70; /* Error Code */
3884 sp[2] = ILLEGAL_REQUEST; /* Sense Key 5 Illegal Req. */
3885 sp[7] = 0x0A; /* Additional Sense Length */
3886 sp[12] = 0x20; /* ASC = Invalid OpCode */
3887 sp[13] = 0x00; /* ASCQ */
3889 device_error = 2; /* Indicate Check Condition */
3890 scb->scsi_cmd->result = device_error | (DID_OK << 16);
3895 if (ret == IPS_SUCCESS_IMM)
3901 /* If we already know the Device is Not there, no need to attempt a Command */
3902 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3903 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3904 scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3905 return (IPS_SUCCESS_IMM);
3908 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3909 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3910 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3911 (unsigned long) &scb->
3913 (unsigned long) scb);
3914 scb->cmd.dcdb.reserved = 0;
3915 scb->cmd.dcdb.reserved2 = 0;
3916 scb->cmd.dcdb.reserved3 = 0;
3917 scb->cmd.dcdb.segment_4G = 0;
3918 scb->cmd.dcdb.enhanced_sg = 0;
3920 TimeOut = scb->scsi_cmd->timeout_per_command;
3922 if (ha->subsys->param[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
3924 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3926 scb->cmd.dcdb.op_code =
3927 IPS_CMD_EXTENDED_DCDB_SG;
3928 scb->cmd.dcdb.enhanced_sg =
3929 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3932 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3933 tapeDCDB->device_address =
3934 ((scb->bus - 1) << 4) | scb->target_id;
3935 tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3936 tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K; /* Always Turn OFF 64K Size Flag */
3939 if (TimeOut < (10 * HZ))
3940 tapeDCDB->cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
3941 else if (TimeOut < (60 * HZ))
3942 tapeDCDB->cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
3943 else if (TimeOut < (1200 * HZ))
3944 tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
3947 tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3948 tapeDCDB->reserved_for_LUN = 0;
3949 tapeDCDB->transfer_length = scb->data_len;
3950 if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3951 tapeDCDB->buffer_pointer =
3952 cpu_to_le32(scb->sg_busaddr);
3954 tapeDCDB->buffer_pointer =
3955 cpu_to_le32(scb->data_busaddr);
3956 tapeDCDB->sg_count = scb->sg_len;
3957 tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3958 tapeDCDB->scsi_status = 0;
3959 tapeDCDB->reserved = 0;
3960 memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3961 scb->scsi_cmd->cmd_len);
3964 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3966 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3967 scb->cmd.dcdb.enhanced_sg =
3968 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3971 scb->dcdb.device_address =
3972 ((scb->bus - 1) << 4) | scb->target_id;
3973 scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3976 if (TimeOut < (10 * HZ))
3977 scb->dcdb.cmd_attribute |= IPS_TIMEOUT10; /* TimeOut is 10 Seconds */
3978 else if (TimeOut < (60 * HZ))
3979 scb->dcdb.cmd_attribute |= IPS_TIMEOUT60; /* TimeOut is 60 Seconds */
3980 else if (TimeOut < (1200 * HZ))
3981 scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M; /* TimeOut is 20 Minutes */
3984 scb->dcdb.transfer_length = scb->data_len;
3985 if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3986 scb->dcdb.transfer_length = 0;
3987 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3988 scb->dcdb.buffer_pointer =
3989 cpu_to_le32(scb->sg_busaddr);
3991 scb->dcdb.buffer_pointer =
3992 cpu_to_le32(scb->data_busaddr);
3993 scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3994 scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3995 scb->dcdb.sg_count = scb->sg_len;
3996 scb->dcdb.reserved = 0;
3997 memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3998 scb->scsi_cmd->cmd_len);
3999 scb->dcdb.scsi_status = 0;
4000 scb->dcdb.reserved2[0] = 0;
4001 scb->dcdb.reserved2[1] = 0;
4002 scb->dcdb.reserved2[2] = 0;
4006 return ((*ha->func.issue) (ha, scb));
4009 /****************************************************************************/
4011 /* Routine Name: ips_chk_status */
4013 /* Routine Description: */
4015 /* Check the status of commands to logical drives */
4016 /* Assumed to be called with the HA lock */
4017 /****************************************************************************/
4019 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
4023 uint8_t basic_status;
4026 IPS_SCSI_INQ_DATA inquiryData;
4028 METHOD_TRACE("ips_chkstatus", 1);
4030 scb = &ha->scbs[pstatus->fields.command_id];
4031 scb->basic_status = basic_status =
4032 pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
4033 scb->extended_status = ext_status = pstatus->fields.extended_status;
4036 sp->residue_len = 0;
4037 sp->scb_addr = (void *) scb;
4039 /* Remove the item from the active queue */
4040 ips_removeq_scb(&ha->scb_activelist, scb);
4043 /* internal commands are handled in do_ipsintr */
4046 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
4050 scb->cmd.basic_io.command_id,
4051 scb->bus, scb->target_id, scb->lun);
4053 if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
4054 /* passthru - just returns the raw result */
4059 if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
4060 ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
4062 if (scb->bus == 0) {
4063 if ((basic_status & IPS_GSC_STATUS_MASK) ==
4064 IPS_CMD_RECOVERED_ERROR) {
4066 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4067 ips_name, ha->host_num,
4068 scb->cmd.basic_io.op_code,
4069 basic_status, ext_status);
4072 switch (scb->scsi_cmd->cmnd[0]) {
4073 case ALLOW_MEDIUM_REMOVAL:
4076 case WRITE_FILEMARKS:
4078 errcode = DID_ERROR;
4084 case TEST_UNIT_READY:
4085 if (!ips_online(ha, scb)) {
4086 errcode = DID_TIME_OUT;
4091 if (ips_online(ha, scb)) {
4092 ips_inquiry(ha, scb);
4094 errcode = DID_TIME_OUT;
4099 ips_reqsen(ha, scb);
4111 if (!ips_online(ha, scb)
4112 || !ips_msense(ha, scb)) {
4113 errcode = DID_ERROR;
4118 if (ips_online(ha, scb))
4121 errcode = DID_TIME_OUT;
4125 case SEND_DIAGNOSTIC:
4126 case REASSIGN_BLOCKS:
4130 errcode = DID_ERROR;
4135 case READ_DEFECT_DATA:
4141 errcode = DID_ERROR;
4144 scb->scsi_cmd->result = errcode << 16;
4145 } else { /* bus == 0 */
4146 /* restrict access to physical drives */
4147 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
4148 ips_scmd_buf_read(scb->scsi_cmd,
4149 &inquiryData, sizeof (inquiryData));
4150 if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
4151 scb->scsi_cmd->result = DID_TIME_OUT << 16;
4154 } else { /* recovered error / success */
4155 if (scb->bus == 0) {
4157 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
4158 ips_name, ha->host_num,
4159 scb->cmd.basic_io.op_code, basic_status,
4163 ips_map_status(ha, scb, sp);
4167 /****************************************************************************/
4169 /* Routine Name: ips_online */
4171 /* Routine Description: */
4173 /* Determine if a logical drive is online */
4175 /****************************************************************************/
4177 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4179 METHOD_TRACE("ips_online", 1);
4181 if (scb->target_id >= IPS_MAX_LD)
4184 if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4185 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4189 if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4191 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4193 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4195 && ha->logical_drive_info->drive_info[scb->target_id].state !=
4202 /****************************************************************************/
4204 /* Routine Name: ips_inquiry */
4206 /* Routine Description: */
4208 /* Simulate an inquiry command to a logical drive */
4210 /****************************************************************************/
4212 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4214 IPS_SCSI_INQ_DATA inquiry;
4216 METHOD_TRACE("ips_inquiry", 1);
4218 memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4220 inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4221 inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4222 inquiry.Version = IPS_SCSI_INQ_REV2;
4223 inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4224 inquiry.AdditionalLength = 31;
4225 inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4227 IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4228 strncpy(inquiry.VendorId, "IBM ", 8);
4229 strncpy(inquiry.ProductId, "SERVERAID ", 16);
4230 strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4232 ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4237 /****************************************************************************/
4239 /* Routine Name: ips_rdcap */
4241 /* Routine Description: */
4243 /* Simulate a read capacity command to a logical drive */
4245 /****************************************************************************/
4247 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4249 IPS_SCSI_CAPACITY cap;
4251 METHOD_TRACE("ips_rdcap", 1);
4253 if (scb->scsi_cmd->request_bufflen < 8)
4257 cpu_to_be32(le32_to_cpu
4258 (ha->logical_drive_info->
4259 drive_info[scb->target_id].sector_count) - 1);
4260 cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4262 ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4267 /****************************************************************************/
4269 /* Routine Name: ips_msense */
4271 /* Routine Description: */
4273 /* Simulate a mode sense command to a logical drive */
4275 /****************************************************************************/
4277 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4282 IPS_SCSI_MODE_PAGE_DATA mdata;
4284 METHOD_TRACE("ips_msense", 1);
4286 if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4287 (ha->enq->ucMiscFlag & 0x8) == 0) {
4288 heads = IPS_NORM_HEADS;
4289 sectors = IPS_NORM_SECTORS;
4291 heads = IPS_COMP_HEADS;
4292 sectors = IPS_COMP_SECTORS;
4296 (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4297 1) / (heads * sectors);
4299 memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4301 mdata.hdr.BlockDescLength = 8;
4303 switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4304 case 0x03: /* page 3 */
4305 mdata.pdata.pg3.PageCode = 3;
4306 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4307 mdata.hdr.DataLength =
4308 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4309 mdata.pdata.pg3.TracksPerZone = 0;
4310 mdata.pdata.pg3.AltSectorsPerZone = 0;
4311 mdata.pdata.pg3.AltTracksPerZone = 0;
4312 mdata.pdata.pg3.AltTracksPerVolume = 0;
4313 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4314 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4315 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4316 mdata.pdata.pg3.TrackSkew = 0;
4317 mdata.pdata.pg3.CylinderSkew = 0;
4318 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4322 mdata.pdata.pg4.PageCode = 4;
4323 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4324 mdata.hdr.DataLength =
4325 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4326 mdata.pdata.pg4.CylindersHigh =
4327 cpu_to_be16((cylinders >> 8) & 0xFFFF);
4328 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4329 mdata.pdata.pg4.Heads = heads;
4330 mdata.pdata.pg4.WritePrecompHigh = 0;
4331 mdata.pdata.pg4.WritePrecompLow = 0;
4332 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4333 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4334 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4335 mdata.pdata.pg4.LandingZoneHigh = 0;
4336 mdata.pdata.pg4.LandingZoneLow = 0;
4337 mdata.pdata.pg4.flags = 0;
4338 mdata.pdata.pg4.RotationalOffset = 0;
4339 mdata.pdata.pg4.MediumRotationRate = 0;
4342 mdata.pdata.pg8.PageCode = 8;
4343 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4344 mdata.hdr.DataLength =
4345 3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4346 /* everything else is left set to 0 */
4353 ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4358 /****************************************************************************/
4360 /* Routine Name: ips_reqsen */
4362 /* Routine Description: */
4364 /* Simulate a request sense command to a logical drive */
4366 /****************************************************************************/
4368 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4370 IPS_SCSI_REQSEN reqsen;
4372 METHOD_TRACE("ips_reqsen", 1);
4374 memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4376 reqsen.ResponseCode =
4377 IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4378 reqsen.AdditionalLength = 10;
4379 reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4380 reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4382 ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4387 /****************************************************************************/
4389 /* Routine Name: ips_free */
4391 /* Routine Description: */
4393 /* Free any allocated space for this controller */
4395 /****************************************************************************/
4397 ips_free(ips_ha_t * ha)
4400 METHOD_TRACE("ips_free", 1);
4404 pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4405 ha->enq, ha->enq_busaddr);
4413 pci_free_consistent(ha->pcidev,
4414 sizeof (IPS_ADAPTER) +
4415 sizeof (IPS_IO_CMD), ha->adapt,
4416 ha->adapt->hw_status_start);
4420 if (ha->logical_drive_info) {
4421 pci_free_consistent(ha->pcidev,
4422 sizeof (IPS_LD_INFO),
4423 ha->logical_drive_info,
4424 ha->logical_drive_info_dma_addr);
4425 ha->logical_drive_info = NULL;
4434 if (ha->ioctl_data) {
4435 pci_free_consistent(ha->pcidev, ha->ioctl_len,
4436 ha->ioctl_data, ha->ioctl_busaddr);
4437 ha->ioctl_data = NULL;
4438 ha->ioctl_datasize = 0;
4441 ips_deallocatescbs(ha, ha->max_cmds);
4443 /* free memory mapped (if applicable) */
4445 iounmap(ha->ioremap_ptr);
4446 ha->ioremap_ptr = NULL;
4451 release_mem_region(ha->mem_addr, ha->mem_len);
4457 /****************************************************************************/
4459 /* Routine Name: ips_deallocatescbs */
4461 /* Routine Description: */
4463 /* Free the command blocks */
4465 /****************************************************************************/
4467 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4470 pci_free_consistent(ha->pcidev,
4471 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4472 ha->scbs->sg_list.list,
4473 ha->scbs->sg_busaddr);
4474 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4475 ha->scbs, ha->scbs->scb_busaddr);
4481 /****************************************************************************/
4483 /* Routine Name: ips_allocatescbs */
4485 /* Routine Description: */
4487 /* Allocate the command blocks */
4489 /****************************************************************************/
4491 ips_allocatescbs(ips_ha_t * ha)
4496 dma_addr_t command_dma, sg_dma;
4498 METHOD_TRACE("ips_allocatescbs", 1);
4500 /* Allocate memory for the SCBs */
4502 pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4504 if (ha->scbs == NULL)
4507 pci_alloc_consistent(ha->pcidev,
4508 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4509 ha->max_cmds, &sg_dma);
4510 if (ips_sg.list == NULL) {
4511 pci_free_consistent(ha->pcidev,
4512 ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4517 memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4519 for (i = 0; i < ha->max_cmds; i++) {
4520 scb_p = &ha->scbs[i];
4521 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4522 /* set up S/G list */
4523 if (IPS_USE_ENH_SGLIST(ha)) {
4524 scb_p->sg_list.enh_list =
4525 ips_sg.enh_list + i * IPS_MAX_SG;
4527 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4529 scb_p->sg_list.std_list =
4530 ips_sg.std_list + i * IPS_MAX_SG;
4532 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4535 /* add to the free list */
4536 if (i < ha->max_cmds - 1) {
4537 scb_p->q_next = ha->scb_freelist;
4538 ha->scb_freelist = scb_p;
4546 /****************************************************************************/
4548 /* Routine Name: ips_init_scb */
4550 /* Routine Description: */
4552 /* Initialize a CCB to default values */
4554 /****************************************************************************/
4556 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4558 IPS_SG_LIST sg_list;
4559 uint32_t cmd_busaddr, sg_busaddr;
4560 METHOD_TRACE("ips_init_scb", 1);
4565 sg_list.list = scb->sg_list.list;
4566 cmd_busaddr = scb->scb_busaddr;
4567 sg_busaddr = scb->sg_busaddr;
4569 memset(scb, 0, sizeof (ips_scb_t));
4570 memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4572 /* Initialize dummy command bucket */
4573 ha->dummy->op_code = 0xFF;
4574 ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4575 + sizeof (IPS_ADAPTER));
4576 ha->dummy->command_id = IPS_MAX_CMDS;
4578 /* set bus address of scb */
4579 scb->scb_busaddr = cmd_busaddr;
4580 scb->sg_busaddr = sg_busaddr;
4581 scb->sg_list.list = sg_list.list;
4584 scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4585 scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4586 + sizeof (IPS_ADAPTER));
4589 /****************************************************************************/
4591 /* Routine Name: ips_get_scb */
4593 /* Routine Description: */
4595 /* Initialize a CCB to default values */
4597 /* ASSUMED to be callled from within a lock */
4599 /****************************************************************************/
4601 ips_getscb(ips_ha_t * ha)
4605 METHOD_TRACE("ips_getscb", 1);
4607 if ((scb = ha->scb_freelist) == NULL) {
4612 ha->scb_freelist = scb->q_next;
4616 ips_init_scb(ha, scb);
4621 /****************************************************************************/
4623 /* Routine Name: ips_free_scb */
4625 /* Routine Description: */
4627 /* Return an unused CCB back to the free list */
4629 /* ASSUMED to be called from within a lock */
4631 /****************************************************************************/
4633 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4636 METHOD_TRACE("ips_freescb", 1);
4637 if (scb->flags & IPS_SCB_MAP_SG)
4638 pci_unmap_sg(ha->pcidev, scb->scsi_cmd->request_buffer,
4639 scb->scsi_cmd->use_sg, IPS_DMA_DIR(scb));
4640 else if (scb->flags & IPS_SCB_MAP_SINGLE)
4641 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4644 /* check to make sure this is not our "special" scb */
4645 if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4646 scb->q_next = ha->scb_freelist;
4647 ha->scb_freelist = scb;
4651 /****************************************************************************/
4653 /* Routine Name: ips_isinit_copperhead */
4655 /* Routine Description: */
4657 /* Is controller initialized ? */
4659 /****************************************************************************/
4661 ips_isinit_copperhead(ips_ha_t * ha)
4666 METHOD_TRACE("ips_isinit_copperhead", 1);
4668 isr = inb(ha->io_addr + IPS_REG_HISR);
4669 scpr = inb(ha->io_addr + IPS_REG_SCPR);
4671 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4677 /****************************************************************************/
4679 /* Routine Name: ips_isinit_copperhead_memio */
4681 /* Routine Description: */
4683 /* Is controller initialized ? */
4685 /****************************************************************************/
4687 ips_isinit_copperhead_memio(ips_ha_t * ha)
4692 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4694 isr = readb(ha->mem_ptr + IPS_REG_HISR);
4695 scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4697 if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4703 /****************************************************************************/
4705 /* Routine Name: ips_isinit_morpheus */
4707 /* Routine Description: */
4709 /* Is controller initialized ? */
4711 /****************************************************************************/
4713 ips_isinit_morpheus(ips_ha_t * ha)
4718 METHOD_TRACE("ips_is_init_morpheus", 1);
4720 if (ips_isintr_morpheus(ha))
4721 ips_flush_and_reset(ha);
4723 post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4724 bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4728 else if (bits & 0x3)
4734 /****************************************************************************/
4736 /* Routine Name: ips_flush_and_reset */
4738 /* Routine Description: */
4740 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4741 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4743 /****************************************************************************/
4745 ips_flush_and_reset(ips_ha_t *ha)
4751 dma_addr_t command_dma;
4753 /* Create a usuable SCB */
4754 scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4756 memset(scb, 0, sizeof(ips_scb_t));
4757 ips_init_scb(ha, scb);
4758 scb->scb_busaddr = command_dma;
4760 scb->timeout = ips_cmd_timeout;
4761 scb->cdb[0] = IPS_CMD_FLUSH;
4763 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4764 scb->cmd.flush_cache.command_id = IPS_MAX_CMDS; /* Use an ID that would otherwise not exist */
4765 scb->cmd.flush_cache.state = IPS_NORM_STATE;
4766 scb->cmd.flush_cache.reserved = 0;
4767 scb->cmd.flush_cache.reserved2 = 0;
4768 scb->cmd.flush_cache.reserved3 = 0;
4769 scb->cmd.flush_cache.reserved4 = 0;
4771 ret = ips_send_cmd(ha, scb); /* Send the Flush Command */
4773 if (ret == IPS_SUCCESS) {
4774 time = 60 * IPS_ONE_SEC; /* Max Wait time is 60 seconds */
4777 while ((time > 0) && (!done)) {
4778 done = ips_poll_for_flush_complete(ha);
4779 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4786 /* Now RESET and INIT the adapter */
4787 (*ha->func.reset) (ha);
4789 pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4793 /****************************************************************************/
4795 /* Routine Name: ips_poll_for_flush_complete */
4797 /* Routine Description: */
4799 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4800 /* All other responses are just taken off the queue and ignored */
4802 /****************************************************************************/
4804 ips_poll_for_flush_complete(ips_ha_t * ha)
4809 cstatus.value = (*ha->func.statupd) (ha);
4811 if (cstatus.value == 0xffffffff) /* If No Interrupt to process */
4814 /* Success is when we see the Flush Command ID */
4815 if (cstatus.fields.command_id == IPS_MAX_CMDS )
4822 /****************************************************************************/
4824 /* Routine Name: ips_enable_int_copperhead */
4826 /* Routine Description: */
4827 /* Turn on interrupts */
4829 /****************************************************************************/
4831 ips_enable_int_copperhead(ips_ha_t * ha)
4833 METHOD_TRACE("ips_enable_int_copperhead", 1);
4835 outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4836 inb(ha->io_addr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4839 /****************************************************************************/
4841 /* Routine Name: ips_enable_int_copperhead_memio */
4843 /* Routine Description: */
4844 /* Turn on interrupts */
4846 /****************************************************************************/
4848 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4850 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4852 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4853 readb(ha->mem_ptr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/
4856 /****************************************************************************/
4858 /* Routine Name: ips_enable_int_morpheus */
4860 /* Routine Description: */
4861 /* Turn on interrupts */
4863 /****************************************************************************/
4865 ips_enable_int_morpheus(ips_ha_t * ha)
4869 METHOD_TRACE("ips_enable_int_morpheus", 1);
4871 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4873 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4874 readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4877 /****************************************************************************/
4879 /* Routine Name: ips_init_copperhead */
4881 /* Routine Description: */
4883 /* Initialize a copperhead controller */
4885 /****************************************************************************/
4887 ips_init_copperhead(ips_ha_t * ha)
4891 uint8_t PostByte[IPS_MAX_POST_BYTES];
4892 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4895 METHOD_TRACE("ips_init_copperhead", 1);
4897 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4898 for (j = 0; j < 45; j++) {
4899 Isr = inb(ha->io_addr + IPS_REG_HISR);
4900 if (Isr & IPS_BIT_GHI)
4903 /* Delay for 1 Second */
4904 MDELAY(IPS_ONE_SEC);
4908 /* error occurred */
4911 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4912 outb(Isr, ha->io_addr + IPS_REG_HISR);
4915 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4916 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4917 "reset controller fails (post status %x %x).\n",
4918 PostByte[0], PostByte[1]);
4923 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4924 for (j = 0; j < 240; j++) {
4925 Isr = inb(ha->io_addr + IPS_REG_HISR);
4926 if (Isr & IPS_BIT_GHI)
4929 /* Delay for 1 Second */
4930 MDELAY(IPS_ONE_SEC);
4934 /* error occurred */
4937 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4938 outb(Isr, ha->io_addr + IPS_REG_HISR);
4941 for (i = 0; i < 240; i++) {
4942 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4944 if ((Cbsp & IPS_BIT_OP) == 0)
4947 /* Delay for 1 Second */
4948 MDELAY(IPS_ONE_SEC);
4956 outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
4958 /* Enable busmastering */
4959 outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4961 if (ha->revision_id == IPS_REVID_TROMBONE64)
4962 /* fix for anaconda64 */
4963 outl(0, ha->io_addr + IPS_REG_NDAE);
4965 /* Enable interrupts */
4966 outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4971 /****************************************************************************/
4973 /* Routine Name: ips_init_copperhead_memio */
4975 /* Routine Description: */
4977 /* Initialize a copperhead controller with memory mapped I/O */
4979 /****************************************************************************/
4981 ips_init_copperhead_memio(ips_ha_t * ha)
4985 uint8_t PostByte[IPS_MAX_POST_BYTES];
4986 uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4989 METHOD_TRACE("ips_init_copperhead_memio", 1);
4991 for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4992 for (j = 0; j < 45; j++) {
4993 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4994 if (Isr & IPS_BIT_GHI)
4997 /* Delay for 1 Second */
4998 MDELAY(IPS_ONE_SEC);
5002 /* error occurred */
5005 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5006 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5009 if (PostByte[0] < IPS_GOOD_POST_STATUS) {
5010 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5011 "reset controller fails (post status %x %x).\n",
5012 PostByte[0], PostByte[1]);
5017 for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
5018 for (j = 0; j < 240; j++) {
5019 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5020 if (Isr & IPS_BIT_GHI)
5023 /* Delay for 1 Second */
5024 MDELAY(IPS_ONE_SEC);
5028 /* error occurred */
5031 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
5032 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5035 for (i = 0; i < 240; i++) {
5036 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
5038 if ((Cbsp & IPS_BIT_OP) == 0)
5041 /* Delay for 1 Second */
5042 MDELAY(IPS_ONE_SEC);
5046 /* error occurred */
5050 writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
5052 /* Enable busmastering */
5053 writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
5055 if (ha->revision_id == IPS_REVID_TROMBONE64)
5056 /* fix for anaconda64 */
5057 writel(0, ha->mem_ptr + IPS_REG_NDAE);
5059 /* Enable interrupts */
5060 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
5062 /* if we get here then everything went OK */
5066 /****************************************************************************/
5068 /* Routine Name: ips_init_morpheus */
5070 /* Routine Description: */
5072 /* Initialize a morpheus controller */
5074 /****************************************************************************/
5076 ips_init_morpheus(ips_ha_t * ha)
5084 METHOD_TRACE("ips_init_morpheus", 1);
5086 /* Wait up to 45 secs for Post */
5087 for (i = 0; i < 45; i++) {
5088 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5090 if (Isr & IPS_BIT_I960_MSG0I)
5093 /* Delay for 1 Second */
5094 MDELAY(IPS_ONE_SEC);
5098 /* error occurred */
5099 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5100 "timeout waiting for post.\n");
5105 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5107 if (Post == 0x4F00) { /* If Flashing the Battery PIC */
5108 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5109 "Flashing Battery PIC, Please wait ...\n");
5111 /* Clear the interrupt bit */
5112 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5113 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5115 for (i = 0; i < 120; i++) { /* Wait Up to 2 Min. for Completion */
5116 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
5119 /* Delay for 1 Second */
5120 MDELAY(IPS_ONE_SEC);
5124 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5125 "timeout waiting for Battery PIC Flash\n");
5131 /* Clear the interrupt bit */
5132 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
5133 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5135 if (Post < (IPS_GOOD_POST_STATUS << 8)) {
5136 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5137 "reset controller fails (post status %x).\n", Post);
5142 /* Wait up to 240 secs for config bytes */
5143 for (i = 0; i < 240; i++) {
5144 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5146 if (Isr & IPS_BIT_I960_MSG1I)
5149 /* Delay for 1 Second */
5150 MDELAY(IPS_ONE_SEC);
5154 /* error occurred */
5155 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5156 "timeout waiting for config.\n");
5161 Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
5163 /* Clear interrupt bit */
5164 Isr = (uint32_t) IPS_BIT_I960_MSG1I;
5165 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
5167 /* Turn on the interrupts */
5168 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
5170 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
5172 /* if we get here then everything went OK */
5174 /* Since we did a RESET, an EraseStripeLock may be needed */
5175 if (Post == 0xEF10) {
5176 if ((Config == 0x000F) || (Config == 0x0009))
5177 ha->requires_esl = 1;
5183 /****************************************************************************/
5185 /* Routine Name: ips_reset_copperhead */
5187 /* Routine Description: */
5189 /* Reset the controller */
5191 /****************************************************************************/
5193 ips_reset_copperhead(ips_ha_t * ha)
5197 METHOD_TRACE("ips_reset_copperhead", 1);
5199 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5200 ips_name, ha->host_num, ha->io_addr, ha->irq);
5204 while (reset_counter < 2) {
5207 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5209 /* Delay for 1 Second */
5210 MDELAY(IPS_ONE_SEC);
5212 outb(0, ha->io_addr + IPS_REG_SCPR);
5214 /* Delay for 1 Second */
5215 MDELAY(IPS_ONE_SEC);
5217 if ((*ha->func.init) (ha))
5219 else if (reset_counter >= 2) {
5228 /****************************************************************************/
5230 /* Routine Name: ips_reset_copperhead_memio */
5232 /* Routine Description: */
5234 /* Reset the controller */
5236 /****************************************************************************/
5238 ips_reset_copperhead_memio(ips_ha_t * ha)
5242 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5244 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5245 ips_name, ha->host_num, ha->mem_addr, ha->irq);
5249 while (reset_counter < 2) {
5252 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5254 /* Delay for 1 Second */
5255 MDELAY(IPS_ONE_SEC);
5257 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5259 /* Delay for 1 Second */
5260 MDELAY(IPS_ONE_SEC);
5262 if ((*ha->func.init) (ha))
5264 else if (reset_counter >= 2) {
5273 /****************************************************************************/
5275 /* Routine Name: ips_reset_morpheus */
5277 /* Routine Description: */
5279 /* Reset the controller */
5281 /****************************************************************************/
5283 ips_reset_morpheus(ips_ha_t * ha)
5288 METHOD_TRACE("ips_reset_morpheus", 1);
5290 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5291 ips_name, ha->host_num, ha->mem_addr, ha->irq);
5295 while (reset_counter < 2) {
5298 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5300 /* Delay for 5 Seconds */
5301 MDELAY(5 * IPS_ONE_SEC);
5303 /* Do a PCI config read to wait for adapter */
5304 pci_read_config_byte(ha->pcidev, 4, &junk);
5306 if ((*ha->func.init) (ha))
5308 else if (reset_counter >= 2) {
5317 /****************************************************************************/
5319 /* Routine Name: ips_statinit */
5321 /* Routine Description: */
5323 /* Initialize the status queues on the controller */
5325 /****************************************************************************/
5327 ips_statinit(ips_ha_t * ha)
5329 uint32_t phys_status_start;
5331 METHOD_TRACE("ips_statinit", 1);
5333 ha->adapt->p_status_start = ha->adapt->status;
5334 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5335 ha->adapt->p_status_tail = ha->adapt->status;
5337 phys_status_start = ha->adapt->hw_status_start;
5338 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
5339 outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
5340 ha->io_addr + IPS_REG_SQER);
5341 outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
5342 ha->io_addr + IPS_REG_SQHR);
5343 outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
5345 ha->adapt->hw_status_tail = phys_status_start;
5348 /****************************************************************************/
5350 /* Routine Name: ips_statinit_memio */
5352 /* Routine Description: */
5354 /* Initialize the status queues on the controller */
5356 /****************************************************************************/
5358 ips_statinit_memio(ips_ha_t * ha)
5360 uint32_t phys_status_start;
5362 METHOD_TRACE("ips_statinit_memio", 1);
5364 ha->adapt->p_status_start = ha->adapt->status;
5365 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5366 ha->adapt->p_status_tail = ha->adapt->status;
5368 phys_status_start = ha->adapt->hw_status_start;
5369 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5370 writel(phys_status_start + IPS_STATUS_Q_SIZE,
5371 ha->mem_ptr + IPS_REG_SQER);
5372 writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5373 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5375 ha->adapt->hw_status_tail = phys_status_start;
5378 /****************************************************************************/
5380 /* Routine Name: ips_statupd_copperhead */
5382 /* Routine Description: */
5384 /* Remove an element from the status queue */
5386 /****************************************************************************/
5388 ips_statupd_copperhead(ips_ha_t * ha)
5390 METHOD_TRACE("ips_statupd_copperhead", 1);
5392 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5393 ha->adapt->p_status_tail++;
5394 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5396 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5397 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5400 outl(cpu_to_le32(ha->adapt->hw_status_tail),
5401 ha->io_addr + IPS_REG_SQTR);
5403 return (ha->adapt->p_status_tail->value);
5406 /****************************************************************************/
5408 /* Routine Name: ips_statupd_copperhead_memio */
5410 /* Routine Description: */
5412 /* Remove an element from the status queue */
5414 /****************************************************************************/
5416 ips_statupd_copperhead_memio(ips_ha_t * ha)
5418 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5420 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5421 ha->adapt->p_status_tail++;
5422 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5424 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5425 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5428 writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5430 return (ha->adapt->p_status_tail->value);
5433 /****************************************************************************/
5435 /* Routine Name: ips_statupd_morpheus */
5437 /* Routine Description: */
5439 /* Remove an element from the status queue */
5441 /****************************************************************************/
5443 ips_statupd_morpheus(ips_ha_t * ha)
5447 METHOD_TRACE("ips_statupd_morpheus", 1);
5449 val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5454 /****************************************************************************/
5456 /* Routine Name: ips_issue_copperhead */
5458 /* Routine Description: */
5460 /* Send a command down to the controller */
5462 /****************************************************************************/
5464 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5469 METHOD_TRACE("ips_issue_copperhead", 1);
5471 if (scb->scsi_cmd) {
5472 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5476 scb->cmd.basic_io.command_id,
5477 scb->bus, scb->target_id, scb->lun);
5479 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5480 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5486 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5489 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5490 if (!(val & IPS_BIT_START_STOP))
5493 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5494 "ips_issue val [0x%x].\n", val);
5495 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5496 "ips_issue semaphore chk timeout.\n");
5498 return (IPS_FAILURE);
5502 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
5503 outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
5505 return (IPS_SUCCESS);
5508 /****************************************************************************/
5510 /* Routine Name: ips_issue_copperhead_memio */
5512 /* Routine Description: */
5514 /* Send a command down to the controller */
5516 /****************************************************************************/
5518 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5523 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5525 if (scb->scsi_cmd) {
5526 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5530 scb->cmd.basic_io.command_id,
5531 scb->bus, scb->target_id, scb->lun);
5533 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5534 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5539 while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5542 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5543 if (!(val & IPS_BIT_START_STOP))
5546 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5547 "ips_issue val [0x%x].\n", val);
5548 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5549 "ips_issue semaphore chk timeout.\n");
5551 return (IPS_FAILURE);
5555 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5556 writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5558 return (IPS_SUCCESS);
5561 /****************************************************************************/
5563 /* Routine Name: ips_issue_i2o */
5565 /* Routine Description: */
5567 /* Send a command down to the controller */
5569 /****************************************************************************/
5571 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5574 METHOD_TRACE("ips_issue_i2o", 1);
5576 if (scb->scsi_cmd) {
5577 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5581 scb->cmd.basic_io.command_id,
5582 scb->bus, scb->target_id, scb->lun);
5584 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5585 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5588 outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
5590 return (IPS_SUCCESS);
5593 /****************************************************************************/
5595 /* Routine Name: ips_issue_i2o_memio */
5597 /* Routine Description: */
5599 /* Send a command down to the controller */
5601 /****************************************************************************/
5603 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5606 METHOD_TRACE("ips_issue_i2o_memio", 1);
5608 if (scb->scsi_cmd) {
5609 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5613 scb->cmd.basic_io.command_id,
5614 scb->bus, scb->target_id, scb->lun);
5616 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5617 ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5620 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5622 return (IPS_SUCCESS);
5625 /****************************************************************************/
5627 /* Routine Name: ips_isintr_copperhead */
5629 /* Routine Description: */
5631 /* Test to see if an interrupt is for us */
5633 /****************************************************************************/
5635 ips_isintr_copperhead(ips_ha_t * ha)
5639 METHOD_TRACE("ips_isintr_copperhead", 2);
5641 Isr = inb(ha->io_addr + IPS_REG_HISR);
5644 /* ?!?! Nothing really there */
5647 if (Isr & IPS_BIT_SCE)
5649 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5650 /* status queue overflow or GHI */
5651 /* just clear the interrupt */
5652 outb(Isr, ha->io_addr + IPS_REG_HISR);
5658 /****************************************************************************/
5660 /* Routine Name: ips_isintr_copperhead_memio */
5662 /* Routine Description: */
5664 /* Test to see if an interrupt is for us */
5666 /****************************************************************************/
5668 ips_isintr_copperhead_memio(ips_ha_t * ha)
5672 METHOD_TRACE("ips_isintr_memio", 2);
5674 Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5677 /* ?!?! Nothing really there */
5680 if (Isr & IPS_BIT_SCE)
5682 else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5683 /* status queue overflow or GHI */
5684 /* just clear the interrupt */
5685 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5691 /****************************************************************************/
5693 /* Routine Name: ips_isintr_morpheus */
5695 /* Routine Description: */
5697 /* Test to see if an interrupt is for us */
5699 /****************************************************************************/
5701 ips_isintr_morpheus(ips_ha_t * ha)
5705 METHOD_TRACE("ips_isintr_morpheus", 2);
5707 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5709 if (Isr & IPS_BIT_I2O_OPQI)
5715 /****************************************************************************/
5717 /* Routine Name: ips_wait */
5719 /* Routine Description: */
5721 /* Wait for a command to complete */
5723 /****************************************************************************/
5725 ips_wait(ips_ha_t * ha, int time, int intr)
5730 METHOD_TRACE("ips_wait", 1);
5735 time *= IPS_ONE_SEC; /* convert seconds */
5737 while ((time > 0) && (!done)) {
5738 if (intr == IPS_INTR_ON) {
5739 if (ha->waitflag == FALSE) {
5744 } else if (intr == IPS_INTR_IORL) {
5745 if (ha->waitflag == FALSE) {
5747 * controller generated an interrupt to
5748 * acknowledge completion of the command
5749 * and ips_intr() has serviced the interrupt.
5757 * NOTE: we already have the io_request_lock so
5758 * even if we get an interrupt it won't get serviced
5759 * until after we finish.
5762 (*ha->func.intr) (ha);
5765 /* This looks like a very evil loop, but it only does this during start-up */
5773 /****************************************************************************/
5775 /* Routine Name: ips_write_driver_status */
5777 /* Routine Description: */
5779 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5781 /****************************************************************************/
5783 ips_write_driver_status(ips_ha_t * ha, int intr)
5785 METHOD_TRACE("ips_write_driver_status", 1);
5787 if (!ips_readwrite_page5(ha, FALSE, intr)) {
5788 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5789 "unable to read NVRAM page 5.\n");
5794 /* check to make sure the page has a valid */
5796 if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5798 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5799 ips_name, ha->host_num, ha->nvram->signature);
5800 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5804 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5805 ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5806 ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5807 ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5808 ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5809 ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5810 ha->nvram->bios_low[3]);
5812 ips_get_bios_version(ha, intr);
5814 /* change values (as needed) */
5815 ha->nvram->operating_system = IPS_OS_LINUX;
5816 ha->nvram->adapter_type = ha->ad_type;
5817 strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5818 strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5819 strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5820 strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5822 ha->nvram->versioning = 0; /* Indicate the Driver Does Not Support Versioning */
5824 /* now update the page */
5825 if (!ips_readwrite_page5(ha, TRUE, intr)) {
5826 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5827 "unable to write NVRAM page 5.\n");
5832 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5833 ha->slot_num = ha->nvram->adapter_slot;
5838 /****************************************************************************/
5840 /* Routine Name: ips_read_adapter_status */
5842 /* Routine Description: */
5844 /* Do an Inquiry command to the adapter */
5846 /****************************************************************************/
5848 ips_read_adapter_status(ips_ha_t * ha, int intr)
5853 METHOD_TRACE("ips_read_adapter_status", 1);
5855 scb = &ha->scbs[ha->max_cmds - 1];
5857 ips_init_scb(ha, scb);
5859 scb->timeout = ips_cmd_timeout;
5860 scb->cdb[0] = IPS_CMD_ENQUIRY;
5862 scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5863 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5864 scb->cmd.basic_io.sg_count = 0;
5865 scb->cmd.basic_io.lba = 0;
5866 scb->cmd.basic_io.sector_count = 0;
5867 scb->cmd.basic_io.log_drv = 0;
5868 scb->data_len = sizeof (*ha->enq);
5869 scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5873 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5874 || (ret == IPS_SUCCESS_IMM)
5875 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5881 /****************************************************************************/
5883 /* Routine Name: ips_read_subsystem_parameters */
5885 /* Routine Description: */
5887 /* Read subsystem parameters from the adapter */
5889 /****************************************************************************/
5891 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5896 METHOD_TRACE("ips_read_subsystem_parameters", 1);
5898 scb = &ha->scbs[ha->max_cmds - 1];
5900 ips_init_scb(ha, scb);
5902 scb->timeout = ips_cmd_timeout;
5903 scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5905 scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5906 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5907 scb->cmd.basic_io.sg_count = 0;
5908 scb->cmd.basic_io.lba = 0;
5909 scb->cmd.basic_io.sector_count = 0;
5910 scb->cmd.basic_io.log_drv = 0;
5911 scb->data_len = sizeof (*ha->subsys);
5912 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5916 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5917 || (ret == IPS_SUCCESS_IMM)
5918 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5921 memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5925 /****************************************************************************/
5927 /* Routine Name: ips_read_config */
5929 /* Routine Description: */
5931 /* Read the configuration on the adapter */
5933 /****************************************************************************/
5935 ips_read_config(ips_ha_t * ha, int intr)
5941 METHOD_TRACE("ips_read_config", 1);
5943 /* set defaults for initiator IDs */
5944 for (i = 0; i < 4; i++)
5945 ha->conf->init_id[i] = 7;
5947 scb = &ha->scbs[ha->max_cmds - 1];
5949 ips_init_scb(ha, scb);
5951 scb->timeout = ips_cmd_timeout;
5952 scb->cdb[0] = IPS_CMD_READ_CONF;
5954 scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5955 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5956 scb->data_len = sizeof (*ha->conf);
5957 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5961 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5962 || (ret == IPS_SUCCESS_IMM)
5963 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5965 memset(ha->conf, 0, sizeof (IPS_CONF));
5967 /* reset initiator IDs */
5968 for (i = 0; i < 4; i++)
5969 ha->conf->init_id[i] = 7;
5971 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5972 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5973 IPS_CMD_CMPLT_WERROR)
5979 memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5983 /****************************************************************************/
5985 /* Routine Name: ips_readwrite_page5 */
5987 /* Routine Description: */
5989 /* Read nvram page 5 from the adapter */
5991 /****************************************************************************/
5993 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5998 METHOD_TRACE("ips_readwrite_page5", 1);
6000 scb = &ha->scbs[ha->max_cmds - 1];
6002 ips_init_scb(ha, scb);
6004 scb->timeout = ips_cmd_timeout;
6005 scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
6007 scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
6008 scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
6009 scb->cmd.nvram.page = 5;
6010 scb->cmd.nvram.write = write;
6011 scb->cmd.nvram.reserved = 0;
6012 scb->cmd.nvram.reserved2 = 0;
6013 scb->data_len = sizeof (*ha->nvram);
6014 scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
6016 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
6018 /* issue the command */
6020 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6021 || (ret == IPS_SUCCESS_IMM)
6022 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
6024 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
6029 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
6033 /****************************************************************************/
6035 /* Routine Name: ips_clear_adapter */
6037 /* Routine Description: */
6039 /* Clear the stripe lock tables */
6041 /****************************************************************************/
6043 ips_clear_adapter(ips_ha_t * ha, int intr)
6048 METHOD_TRACE("ips_clear_adapter", 1);
6050 scb = &ha->scbs[ha->max_cmds - 1];
6052 ips_init_scb(ha, scb);
6054 scb->timeout = ips_reset_timeout;
6055 scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
6057 scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
6058 scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
6059 scb->cmd.config_sync.channel = 0;
6060 scb->cmd.config_sync.source_target = IPS_POCL;
6061 scb->cmd.config_sync.reserved = 0;
6062 scb->cmd.config_sync.reserved2 = 0;
6063 scb->cmd.config_sync.reserved3 = 0;
6067 ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
6068 || (ret == IPS_SUCCESS_IMM)
6069 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6072 /* send unlock stripe command */
6073 ips_init_scb(ha, scb);
6075 scb->cdb[0] = IPS_CMD_ERROR_TABLE;
6076 scb->timeout = ips_reset_timeout;
6078 scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
6079 scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
6080 scb->cmd.unlock_stripe.log_drv = 0;
6081 scb->cmd.unlock_stripe.control = IPS_CSL;
6082 scb->cmd.unlock_stripe.reserved = 0;
6083 scb->cmd.unlock_stripe.reserved2 = 0;
6084 scb->cmd.unlock_stripe.reserved3 = 0;
6088 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
6089 || (ret == IPS_SUCCESS_IMM)
6090 || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
6096 /****************************************************************************/
6098 /* Routine Name: ips_ffdc_reset */
6100 /* Routine Description: */
6102 /* FFDC: write reset info */
6104 /****************************************************************************/
6106 ips_ffdc_reset(ips_ha_t * ha, int intr)
6110 METHOD_TRACE("ips_ffdc_reset", 1);
6112 scb = &ha->scbs[ha->max_cmds - 1];
6114 ips_init_scb(ha, scb);
6116 scb->timeout = ips_cmd_timeout;
6117 scb->cdb[0] = IPS_CMD_FFDC;
6118 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6119 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6120 scb->cmd.ffdc.reset_count = ha->reset_count;
6121 scb->cmd.ffdc.reset_type = 0x80;
6123 /* convert time to what the card wants */
6124 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6127 ips_send_wait(ha, scb, ips_cmd_timeout, intr);
6130 /****************************************************************************/
6132 /* Routine Name: ips_ffdc_time */
6134 /* Routine Description: */
6136 /* FFDC: write time info */
6138 /****************************************************************************/
6140 ips_ffdc_time(ips_ha_t * ha)
6144 METHOD_TRACE("ips_ffdc_time", 1);
6146 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
6148 scb = &ha->scbs[ha->max_cmds - 1];
6150 ips_init_scb(ha, scb);
6152 scb->timeout = ips_cmd_timeout;
6153 scb->cdb[0] = IPS_CMD_FFDC;
6154 scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
6155 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
6156 scb->cmd.ffdc.reset_count = 0;
6157 scb->cmd.ffdc.reset_type = 0;
6159 /* convert time to what the card wants */
6160 ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
6163 ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
6166 /****************************************************************************/
6168 /* Routine Name: ips_fix_ffdc_time */
6170 /* Routine Description: */
6171 /* Adjust time_t to what the card wants */
6173 /****************************************************************************/
6175 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6182 int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6183 int month_lengths[12][2] = { {31, 31},
6197 METHOD_TRACE("ips_fix_ffdc_time", 1);
6199 days = current_time / IPS_SECS_DAY;
6200 rem = current_time % IPS_SECS_DAY;
6202 scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6203 rem = rem % IPS_SECS_HOUR;
6204 scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6205 scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6207 year = IPS_EPOCH_YEAR;
6208 while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6211 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6214 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6215 IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6216 IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6220 scb->cmd.ffdc.yearH = year / 100;
6221 scb->cmd.ffdc.yearL = year % 100;
6223 for (i = 0; days >= month_lengths[i][yleap]; ++i)
6224 days -= month_lengths[i][yleap];
6226 scb->cmd.ffdc.month = i + 1;
6227 scb->cmd.ffdc.day = days + 1;
6230 /****************************************************************************
6231 * BIOS Flash Routines *
6232 ****************************************************************************/
6234 /****************************************************************************/
6236 /* Routine Name: ips_erase_bios */
6238 /* Routine Description: */
6239 /* Erase the BIOS on the adapter */
6241 /****************************************************************************/
6243 ips_erase_bios(ips_ha_t * ha)
6248 METHOD_TRACE("ips_erase_bios", 1);
6252 /* Clear the status register */
6253 outl(0, ha->io_addr + IPS_REG_FLAP);
6254 if (ha->revision_id == IPS_REVID_TROMBONE64)
6255 udelay(25); /* 25 us */
6257 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6258 if (ha->revision_id == IPS_REVID_TROMBONE64)
6259 udelay(25); /* 25 us */
6262 outb(0x20, ha->io_addr + IPS_REG_FLDP);
6263 if (ha->revision_id == IPS_REVID_TROMBONE64)
6264 udelay(25); /* 25 us */
6267 outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6268 if (ha->revision_id == IPS_REVID_TROMBONE64)
6269 udelay(25); /* 25 us */
6272 outb(0x70, ha->io_addr + IPS_REG_FLDP);
6273 if (ha->revision_id == IPS_REVID_TROMBONE64)
6274 udelay(25); /* 25 us */
6276 timeout = 80000; /* 80 seconds */
6278 while (timeout > 0) {
6279 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6280 outl(0, ha->io_addr + IPS_REG_FLAP);
6281 udelay(25); /* 25 us */
6284 status = inb(ha->io_addr + IPS_REG_FLDP);
6293 /* check for timeout */
6297 /* try to suspend the erase */
6298 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6299 if (ha->revision_id == IPS_REVID_TROMBONE64)
6300 udelay(25); /* 25 us */
6302 /* wait for 10 seconds */
6304 while (timeout > 0) {
6305 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6306 outl(0, ha->io_addr + IPS_REG_FLAP);
6307 udelay(25); /* 25 us */
6310 status = inb(ha->io_addr + IPS_REG_FLDP);
6322 /* check for valid VPP */
6327 /* check for successful flash */
6329 /* sequence error */
6332 /* Otherwise, we were successful */
6334 outb(0x50, ha->io_addr + IPS_REG_FLDP);
6335 if (ha->revision_id == IPS_REVID_TROMBONE64)
6336 udelay(25); /* 25 us */
6339 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6340 if (ha->revision_id == IPS_REVID_TROMBONE64)
6341 udelay(25); /* 25 us */
6346 /****************************************************************************/
6348 /* Routine Name: ips_erase_bios_memio */
6350 /* Routine Description: */
6351 /* Erase the BIOS on the adapter */
6353 /****************************************************************************/
6355 ips_erase_bios_memio(ips_ha_t * ha)
6360 METHOD_TRACE("ips_erase_bios_memio", 1);
6364 /* Clear the status register */
6365 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6366 if (ha->revision_id == IPS_REVID_TROMBONE64)
6367 udelay(25); /* 25 us */
6369 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6370 if (ha->revision_id == IPS_REVID_TROMBONE64)
6371 udelay(25); /* 25 us */
6374 writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6375 if (ha->revision_id == IPS_REVID_TROMBONE64)
6376 udelay(25); /* 25 us */
6379 writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6380 if (ha->revision_id == IPS_REVID_TROMBONE64)
6381 udelay(25); /* 25 us */
6384 writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6385 if (ha->revision_id == IPS_REVID_TROMBONE64)
6386 udelay(25); /* 25 us */
6388 timeout = 80000; /* 80 seconds */
6390 while (timeout > 0) {
6391 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6392 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6393 udelay(25); /* 25 us */
6396 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6405 /* check for timeout */
6409 /* try to suspend the erase */
6410 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6411 if (ha->revision_id == IPS_REVID_TROMBONE64)
6412 udelay(25); /* 25 us */
6414 /* wait for 10 seconds */
6416 while (timeout > 0) {
6417 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6418 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6419 udelay(25); /* 25 us */
6422 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6434 /* check for valid VPP */
6439 /* check for successful flash */
6441 /* sequence error */
6444 /* Otherwise, we were successful */
6446 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6447 if (ha->revision_id == IPS_REVID_TROMBONE64)
6448 udelay(25); /* 25 us */
6451 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6452 if (ha->revision_id == IPS_REVID_TROMBONE64)
6453 udelay(25); /* 25 us */
6458 /****************************************************************************/
6460 /* Routine Name: ips_program_bios */
6462 /* Routine Description: */
6463 /* Program the BIOS on the adapter */
6465 /****************************************************************************/
6467 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6474 METHOD_TRACE("ips_program_bios", 1);
6478 for (i = 0; i < buffersize; i++) {
6480 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6481 if (ha->revision_id == IPS_REVID_TROMBONE64)
6482 udelay(25); /* 25 us */
6484 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6485 if (ha->revision_id == IPS_REVID_TROMBONE64)
6486 udelay(25); /* 25 us */
6488 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6489 if (ha->revision_id == IPS_REVID_TROMBONE64)
6490 udelay(25); /* 25 us */
6492 /* wait up to one second */
6494 while (timeout > 0) {
6495 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6496 outl(0, ha->io_addr + IPS_REG_FLAP);
6497 udelay(25); /* 25 us */
6500 status = inb(ha->io_addr + IPS_REG_FLDP);
6511 outl(0, ha->io_addr + IPS_REG_FLAP);
6512 if (ha->revision_id == IPS_REVID_TROMBONE64)
6513 udelay(25); /* 25 us */
6515 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6516 if (ha->revision_id == IPS_REVID_TROMBONE64)
6517 udelay(25); /* 25 us */
6522 /* check the status */
6523 if (status & 0x18) {
6524 /* programming error */
6525 outl(0, ha->io_addr + IPS_REG_FLAP);
6526 if (ha->revision_id == IPS_REVID_TROMBONE64)
6527 udelay(25); /* 25 us */
6529 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6530 if (ha->revision_id == IPS_REVID_TROMBONE64)
6531 udelay(25); /* 25 us */
6537 /* Enable reading */
6538 outl(0, ha->io_addr + IPS_REG_FLAP);
6539 if (ha->revision_id == IPS_REVID_TROMBONE64)
6540 udelay(25); /* 25 us */
6542 outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6543 if (ha->revision_id == IPS_REVID_TROMBONE64)
6544 udelay(25); /* 25 us */
6549 /****************************************************************************/
6551 /* Routine Name: ips_program_bios_memio */
6553 /* Routine Description: */
6554 /* Program the BIOS on the adapter */
6556 /****************************************************************************/
6558 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6565 METHOD_TRACE("ips_program_bios_memio", 1);
6569 for (i = 0; i < buffersize; i++) {
6571 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6572 if (ha->revision_id == IPS_REVID_TROMBONE64)
6573 udelay(25); /* 25 us */
6575 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6576 if (ha->revision_id == IPS_REVID_TROMBONE64)
6577 udelay(25); /* 25 us */
6579 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6580 if (ha->revision_id == IPS_REVID_TROMBONE64)
6581 udelay(25); /* 25 us */
6583 /* wait up to one second */
6585 while (timeout > 0) {
6586 if (ha->revision_id == IPS_REVID_TROMBONE64) {
6587 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6588 udelay(25); /* 25 us */
6591 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6602 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6603 if (ha->revision_id == IPS_REVID_TROMBONE64)
6604 udelay(25); /* 25 us */
6606 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6607 if (ha->revision_id == IPS_REVID_TROMBONE64)
6608 udelay(25); /* 25 us */
6613 /* check the status */
6614 if (status & 0x18) {
6615 /* programming error */
6616 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6617 if (ha->revision_id == IPS_REVID_TROMBONE64)
6618 udelay(25); /* 25 us */
6620 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6621 if (ha->revision_id == IPS_REVID_TROMBONE64)
6622 udelay(25); /* 25 us */
6628 /* Enable reading */
6629 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6630 if (ha->revision_id == IPS_REVID_TROMBONE64)
6631 udelay(25); /* 25 us */
6633 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6634 if (ha->revision_id == IPS_REVID_TROMBONE64)
6635 udelay(25); /* 25 us */
6640 /****************************************************************************/
6642 /* Routine Name: ips_verify_bios */
6644 /* Routine Description: */
6645 /* Verify the BIOS on the adapter */
6647 /****************************************************************************/
6649 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6655 METHOD_TRACE("ips_verify_bios", 1);
6658 outl(0, ha->io_addr + IPS_REG_FLAP);
6659 if (ha->revision_id == IPS_REVID_TROMBONE64)
6660 udelay(25); /* 25 us */
6662 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6665 outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
6666 if (ha->revision_id == IPS_REVID_TROMBONE64)
6667 udelay(25); /* 25 us */
6668 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6672 for (i = 2; i < buffersize; i++) {
6674 outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
6675 if (ha->revision_id == IPS_REVID_TROMBONE64)
6676 udelay(25); /* 25 us */
6678 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6689 /****************************************************************************/
6691 /* Routine Name: ips_verify_bios_memio */
6693 /* Routine Description: */
6694 /* Verify the BIOS on the adapter */
6696 /****************************************************************************/
6698 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6704 METHOD_TRACE("ips_verify_bios_memio", 1);
6707 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6708 if (ha->revision_id == IPS_REVID_TROMBONE64)
6709 udelay(25); /* 25 us */
6711 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6714 writel(1, ha->mem_ptr + IPS_REG_FLAP);
6715 if (ha->revision_id == IPS_REVID_TROMBONE64)
6716 udelay(25); /* 25 us */
6717 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6721 for (i = 2; i < buffersize; i++) {
6723 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6724 if (ha->revision_id == IPS_REVID_TROMBONE64)
6725 udelay(25); /* 25 us */
6728 (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6739 /****************************************************************************/
6741 /* Routine Name: ips_abort_init */
6743 /* Routine Description: */
6744 /* cleanup routine for a failed adapter initialization */
6745 /****************************************************************************/
6747 ips_abort_init(ips_ha_t * ha, int index)
6751 ips_ha[index] = NULL;
6752 ips_sh[index] = NULL;
6756 /****************************************************************************/
6758 /* Routine Name: ips_shift_controllers */
6760 /* Routine Description: */
6761 /* helper function for ordering adapters */
6762 /****************************************************************************/
6764 ips_shift_controllers(int lowindex, int highindex)
6766 ips_ha_t *ha_sav = ips_ha[highindex];
6767 struct Scsi_Host *sh_sav = ips_sh[highindex];
6770 for (i = highindex; i > lowindex; i--) {
6771 ips_ha[i] = ips_ha[i - 1];
6772 ips_sh[i] = ips_sh[i - 1];
6773 ips_ha[i]->host_num = i;
6775 ha_sav->host_num = lowindex;
6776 ips_ha[lowindex] = ha_sav;
6777 ips_sh[lowindex] = sh_sav;
6780 /****************************************************************************/
6782 /* Routine Name: ips_order_controllers */
6784 /* Routine Description: */
6785 /* place controllers is the "proper" boot order */
6786 /****************************************************************************/
6788 ips_order_controllers(void)
6790 int i, j, tmp, position = 0;
6791 IPS_NVRAM_P5 *nvram;
6794 nvram = ips_ha[0]->nvram;
6796 if (nvram->adapter_order[0]) {
6797 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6798 for (j = position; j < ips_num_controllers; j++) {
6799 switch (ips_ha[j]->ad_type) {
6800 case IPS_ADTYPE_SERVERAID6M:
6801 case IPS_ADTYPE_SERVERAID7M:
6802 if (nvram->adapter_order[i] == 'M') {
6803 ips_shift_controllers(position,
6808 case IPS_ADTYPE_SERVERAID4L:
6809 case IPS_ADTYPE_SERVERAID4M:
6810 case IPS_ADTYPE_SERVERAID4MX:
6811 case IPS_ADTYPE_SERVERAID4LX:
6812 if (nvram->adapter_order[i] == 'N') {
6813 ips_shift_controllers(position,
6818 case IPS_ADTYPE_SERVERAID6I:
6819 case IPS_ADTYPE_SERVERAID5I2:
6820 case IPS_ADTYPE_SERVERAID5I1:
6821 case IPS_ADTYPE_SERVERAID7k:
6822 if (nvram->adapter_order[i] == 'S') {
6823 ips_shift_controllers(position,
6828 case IPS_ADTYPE_SERVERAID:
6829 case IPS_ADTYPE_SERVERAID2:
6830 case IPS_ADTYPE_NAVAJO:
6831 case IPS_ADTYPE_KIOWA:
6832 case IPS_ADTYPE_SERVERAID3L:
6833 case IPS_ADTYPE_SERVERAID3:
6834 case IPS_ADTYPE_SERVERAID4H:
6835 if (nvram->adapter_order[i] == 'A') {
6836 ips_shift_controllers(position,
6846 /* if adapter_order[0], then ordering is complete */
6849 /* old bios, use older ordering */
6851 for (i = position; i < ips_num_controllers; i++) {
6852 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6853 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6854 ips_shift_controllers(position, i);
6859 /* if there were no 5I cards, then don't do any extra ordering */
6862 for (i = position; i < ips_num_controllers; i++) {
6863 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6864 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6865 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6866 ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6867 ips_shift_controllers(position, i);
6875 /****************************************************************************/
6877 /* Routine Name: ips_register_scsi */
6879 /* Routine Description: */
6880 /* perform any registration and setup with the scsi layer */
6881 /****************************************************************************/
6883 ips_register_scsi(int index)
6885 struct Scsi_Host *sh;
6886 ips_ha_t *ha, *oldha = ips_ha[index];
6887 sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6889 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6890 "Unable to register controller with SCSI subsystem\n");
6894 memcpy(ha, oldha, sizeof (ips_ha_t));
6895 free_irq(oldha->irq, oldha);
6896 /* Install the interrupt handler with the new ha */
6897 if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6898 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6899 "Unable to install interrupt handler\n");
6908 /* Store away needed values for later use */
6909 sh->io_port = ha->io_addr;
6910 sh->n_io_port = ha->io_addr ? 255 : 0;
6911 sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6913 sh->sg_tablesize = sh->hostt->sg_tablesize;
6914 sh->can_queue = sh->hostt->can_queue;
6915 sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6916 sh->unchecked_isa_dma = sh->hostt->unchecked_isa_dma;
6917 sh->use_clustering = sh->hostt->use_clustering;
6918 sh->max_sectors = 128;
6920 sh->max_id = ha->ntargets;
6921 sh->max_lun = ha->nlun;
6922 sh->max_channel = ha->nbus - 1;
6923 sh->can_queue = ha->max_cmds - 1;
6925 scsi_add_host(sh, NULL);
6931 /*---------------------------------------------------------------------------*/
6932 /* Routine Name: ips_remove_device */
6934 /* Routine Description: */
6935 /* Remove one Adapter ( Hot Plugging ) */
6936 /*---------------------------------------------------------------------------*/
6937 static void __devexit
6938 ips_remove_device(struct pci_dev *pci_dev)
6941 struct Scsi_Host *sh;
6944 for (i = 0; i < IPS_MAX_ADAPTERS; i++) {
6947 if ((pci_dev->bus->number == ha->pcidev->bus->number) &&
6948 (pci_dev->devfn == ha->pcidev->devfn)) {
6956 /****************************************************************************/
6958 /* Routine Name: ips_module_init */
6960 /* Routine Description: */
6961 /* function called on module load */
6962 /****************************************************************************/
6964 ips_module_init(void)
6966 if (pci_register_driver(&ips_pci_driver) < 0)
6968 ips_driver_template.module = THIS_MODULE;
6969 ips_order_controllers();
6970 if (!ips_detect(&ips_driver_template)) {
6971 pci_unregister_driver(&ips_pci_driver);
6974 register_reboot_notifier(&ips_notifier);
6978 /****************************************************************************/
6980 /* Routine Name: ips_module_exit */
6982 /* Routine Description: */
6983 /* function called on module unload */
6984 /****************************************************************************/
6986 ips_module_exit(void)
6988 pci_unregister_driver(&ips_pci_driver);
6989 unregister_reboot_notifier(&ips_notifier);
6992 module_init(ips_module_init);
6993 module_exit(ips_module_exit);
6995 /*---------------------------------------------------------------------------*/
6996 /* Routine Name: ips_insert_device */
6998 /* Routine Description: */
6999 /* Add One Adapter ( Hot Plug ) */
7002 /* 0 if Successful, else non-zero */
7003 /*---------------------------------------------------------------------------*/
7004 static int __devinit
7005 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
7010 METHOD_TRACE("ips_insert_device", 1);
7011 if (pci_enable_device(pci_dev))
7014 rc = ips_init_phase1(pci_dev, &index);
7016 rc = ips_init_phase2(index);
7019 if (ips_register_scsi(index)) {
7020 ips_free(ips_ha[index]);
7025 ips_num_controllers++;
7027 ips_next_controller = ips_num_controllers;
7031 /*---------------------------------------------------------------------------*/
7032 /* Routine Name: ips_init_phase1 */
7034 /* Routine Description: */
7035 /* Adapter Initialization */
7038 /* 0 if Successful, else non-zero */
7039 /*---------------------------------------------------------------------------*/
7041 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
7048 uint8_t revision_id;
7052 uint16_t subdevice_id;
7055 dma_addr_t dma_address;
7056 char __iomem *ioremap_ptr;
7057 char __iomem *mem_ptr;
7060 METHOD_TRACE("ips_init_phase1", 1);
7061 index = IPS_MAX_ADAPTERS;
7062 for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
7063 if (ips_ha[j] == 0) {
7069 if (index >= IPS_MAX_ADAPTERS)
7072 /* stuff that we get in dev */
7074 bus = pci_dev->bus->number;
7075 func = pci_dev->devfn;
7077 /* Init MEM/IO addresses to 0 */
7083 for (j = 0; j < 2; j++) {
7084 if (!pci_resource_start(pci_dev, j))
7087 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
7088 io_addr = pci_resource_start(pci_dev, j);
7089 io_len = pci_resource_len(pci_dev, j);
7091 mem_addr = pci_resource_start(pci_dev, j);
7092 mem_len = pci_resource_len(pci_dev, j);
7096 /* setup memory mapped area (if applicable) */
7101 if (!request_mem_region(mem_addr, mem_len, "ips")) {
7102 IPS_PRINTK(KERN_WARNING, pci_dev,
7103 "Couldn't allocate IO Memory space %x len %d.\n",
7108 base = mem_addr & PAGE_MASK;
7109 offs = mem_addr - base;
7110 ioremap_ptr = ioremap(base, PAGE_SIZE);
7111 mem_ptr = ioremap_ptr + offs;
7117 /* setup I/O mapped area (if applicable) */
7119 if (!request_region(io_addr, io_len, "ips")) {
7120 IPS_PRINTK(KERN_WARNING, pci_dev,
7121 "Couldn't allocate IO space %x len %d.\n",
7127 /* get the revision ID */
7128 if (pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id)) {
7129 IPS_PRINTK(KERN_WARNING, pci_dev, "Can't get revision id.\n");
7133 subdevice_id = pci_dev->subsystem_device;
7135 /* found a controller */
7136 ha = kmalloc(sizeof (ips_ha_t), GFP_KERNEL);
7138 IPS_PRINTK(KERN_WARNING, pci_dev,
7139 "Unable to allocate temporary ha struct\n");
7143 memset(ha, 0, sizeof (ips_ha_t));
7145 ips_sh[index] = NULL;
7149 /* Store info in HA structure */
7151 ha->io_addr = io_addr;
7152 ha->io_len = io_len;
7153 ha->mem_addr = mem_addr;
7154 ha->mem_len = mem_len;
7155 ha->mem_ptr = mem_ptr;
7156 ha->ioremap_ptr = ioremap_ptr;
7157 ha->host_num = (uint32_t) index;
7158 ha->revision_id = revision_id;
7159 ha->slot_num = PCI_SLOT(pci_dev->devfn);
7160 ha->device_id = pci_dev->device;
7161 ha->subdevice_id = subdevice_id;
7162 ha->pcidev = pci_dev;
7165 * Set the pci_dev's dma_mask. Not all adapters support 64bit
7166 * addressing so don't enable it if the adapter can't support
7167 * it! Also, don't use 64bit addressing if dma addresses
7168 * are guaranteed to be < 4G.
7170 if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
7171 !pci_set_dma_mask(ha->pcidev, DMA_64BIT_MASK)) {
7172 (ha)->flags |= IPS_HA_ENH_SG;
7174 if (pci_set_dma_mask(ha->pcidev, DMA_32BIT_MASK) != 0) {
7175 printk(KERN_WARNING "Unable to set DMA Mask\n");
7176 return ips_abort_init(ha, index);
7179 if(ips_cd_boot && !ips_FlashData){
7180 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
7184 ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
7187 IPS_PRINTK(KERN_WARNING, pci_dev,
7188 "Unable to allocate host inquiry structure\n");
7189 return ips_abort_init(ha, index);
7192 ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7193 sizeof (IPS_IO_CMD), &dma_address);
7195 IPS_PRINTK(KERN_WARNING, pci_dev,
7196 "Unable to allocate host adapt & dummy structures\n");
7197 return ips_abort_init(ha, index);
7199 ha->adapt->hw_status_start = dma_address;
7200 ha->dummy = (void *) (ha->adapt + 1);
7204 ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7205 if (!ha->logical_drive_info) {
7206 IPS_PRINTK(KERN_WARNING, pci_dev,
7207 "Unable to allocate logical drive info structure\n");
7208 return ips_abort_init(ha, index);
7210 ha->logical_drive_info_dma_addr = dma_address;
7213 ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7216 IPS_PRINTK(KERN_WARNING, pci_dev,
7217 "Unable to allocate host conf structure\n");
7218 return ips_abort_init(ha, index);
7221 ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7224 IPS_PRINTK(KERN_WARNING, pci_dev,
7225 "Unable to allocate host NVRAM structure\n");
7226 return ips_abort_init(ha, index);
7229 ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7232 IPS_PRINTK(KERN_WARNING, pci_dev,
7233 "Unable to allocate host subsystem structure\n");
7234 return ips_abort_init(ha, index);
7237 /* the ioctl buffer is now used during adapter initialization, so its
7238 * successful allocation is now required */
7239 if (ips_ioctlsize < PAGE_SIZE)
7240 ips_ioctlsize = PAGE_SIZE;
7242 ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7243 &ha->ioctl_busaddr);
7244 ha->ioctl_len = ips_ioctlsize;
7245 if (!ha->ioctl_data) {
7246 IPS_PRINTK(KERN_WARNING, pci_dev,
7247 "Unable to allocate IOCTL data\n");
7248 return ips_abort_init(ha, index);
7254 ips_setup_funclist(ha);
7256 if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7257 /* If Morpheus appears dead, reset it */
7258 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7259 if (IsDead == 0xDEADBEEF) {
7260 ips_reset_morpheus(ha);
7265 * Initialize the card if it isn't already
7268 if (!(*ha->func.isinit) (ha)) {
7269 if (!(*ha->func.init) (ha)) {
7271 * Initialization failed
7273 IPS_PRINTK(KERN_WARNING, pci_dev,
7274 "Unable to initialize controller\n");
7275 return ips_abort_init(ha, index);
7283 /*---------------------------------------------------------------------------*/
7284 /* Routine Name: ips_init_phase2 */
7286 /* Routine Description: */
7287 /* Adapter Initialization Phase 2 */
7290 /* 0 if Successful, else non-zero */
7291 /*---------------------------------------------------------------------------*/
7293 ips_init_phase2(int index)
7299 METHOD_TRACE("ips_init_phase2", 1);
7301 ips_ha[index] = NULL;
7305 /* Install the interrupt handler */
7306 if (request_irq(ha->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7307 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7308 "Unable to install interrupt handler\n");
7309 return ips_abort_init(ha, index);
7313 * Allocate a temporary SCB for initialization
7316 if (!ips_allocatescbs(ha)) {
7317 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7318 "Unable to allocate a CCB\n");
7319 free_irq(ha->irq, ha);
7320 return ips_abort_init(ha, index);
7323 if (!ips_hainit(ha)) {
7324 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7325 "Unable to initialize controller\n");
7326 free_irq(ha->irq, ha);
7327 return ips_abort_init(ha, index);
7329 /* Free the temporary SCB */
7330 ips_deallocatescbs(ha, 1);
7333 if (!ips_allocatescbs(ha)) {
7334 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7335 "Unable to allocate CCBs\n");
7336 free_irq(ha->irq, ha);
7337 return ips_abort_init(ha, index);
7343 MODULE_LICENSE("GPL");
7344 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7345 MODULE_VERSION(IPS_VER_STRING);
7349 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7350 * Emacs will notice this stuff at the end of the file and automatically
7351 * adjust the settings for this buffer only. This must remain at the end
7353 * ---------------------------------------------------------------------------
7356 * c-brace-imaginary-offset: 0
7357 * c-brace-offset: -2
7358 * c-argdecl-indent: 2
7359 * c-label-offset: -2
7360 * c-continued-statement-offset: 2
7361 * c-continued-brace-offset: 0
7362 * indent-tabs-mode: nil