2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
7 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
8 * Copyright (C) 2001 Florian Lohoff (flo@rfc822.org)
9 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
11 * (In all truth, Jed Schimmel wrote all this code.)
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/types.h>
17 #include <linux/blkdev.h>
18 #include <linux/version.h>
19 #include <linux/delay.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/spinlock.h>
24 #include <asm/pgtable.h>
25 #include <asm/sgialib.h>
26 #include <asm/sgi/sgi.h>
27 #include <asm/sgi/mc.h>
28 #include <asm/sgi/hpc3.h>
29 #include <asm/sgi/ip22.h>
34 #include <scsi/scsi_host.h>
38 #include <linux/stat.h>
41 #define DPRINTK(args...) printk(args)
43 #define DPRINTK(args...)
46 #define HDATA(ptr) ((struct ip22_hostdata *)((ptr)->hostdata))
48 struct ip22_hostdata {
49 struct WD33C93_hostdata wh;
57 struct hpc_dma_desc desc;
58 u32 _padding; /* align to quadword boundary */
61 struct Scsi_Host *sgiwd93_host;
62 struct Scsi_Host *sgiwd93_host1;
64 /* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */
65 static inline void write_wd33c93_count(const wd33c93_regs regs,
68 *regs.SASR = WD_TRANSFER_COUNT_MSB;
70 *regs.SCMD = ((value >> 16) & 0xff);
71 *regs.SCMD = ((value >> 8) & 0xff);
72 *regs.SCMD = ((value >> 0) & 0xff);
76 static inline unsigned long read_wd33c93_count(const wd33c93_regs regs)
80 *regs.SASR = WD_TRANSFER_COUNT_MSB;
82 value = ((*regs.SCMD & 0xff) << 16);
83 value |= ((*regs.SCMD & 0xff) << 8);
84 value |= ((*regs.SCMD & 0xff) << 0);
89 static irqreturn_t sgiwd93_intr(int irq, void *dev_id, struct pt_regs *regs)
91 struct Scsi_Host * host = (struct Scsi_Host *) dev_id;
94 spin_lock_irqsave(host->host_lock, flags);
96 spin_unlock_irqrestore(host->host_lock, flags);
102 void fill_hpc_entries(struct hpc_chunk *hcp, Scsi_Cmnd *cmd, int datainp)
104 unsigned long len = cmd->SCp.this_residual;
105 void *addr = cmd->SCp.ptr;
109 physaddr = dma_map_single(NULL, addr, len, cmd->sc_data_direction);
110 cmd->SCp.dma_handle = physaddr;
114 * even cntinfo could be up to 16383, without
115 * magic only 8192 works correctly
117 count = len > 8192 ? 8192 : len;
118 hcp->desc.pbuf = physaddr;
119 hcp->desc.cntinfo = count;
126 * To make sure, if we trip an HPC bug, that we transfer every single
127 * byte, we tag on an extra zero length dma descriptor at the end of
131 hcp->desc.cntinfo = HPCDMA_EOX;
134 static int dma_setup(Scsi_Cmnd *cmd, int datainp)
136 struct ip22_hostdata *hdata = HDATA(cmd->device->host);
137 struct hpc3_scsiregs *hregs =
138 (struct hpc3_scsiregs *) cmd->device->host->base;
139 struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->hd.cpu;
141 DPRINTK("dma_setup: datainp<%d> hcp<%p> ", datainp, hcp);
143 hdata->wh.dma_dir = datainp;
146 * wd33c93 shouldn't pass us bogus dma_setups, but it does:-( The
147 * other wd33c93 drivers deal with it the same way (which isn't that
148 * obvious). IMHO a better fix would be, not to do these dma setups
149 * in the first place.
151 if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0)
154 fill_hpc_entries(hcp, cmd, datainp);
158 /* Start up the HPC. */
159 hregs->ndptr = hdata->hd.dma;
161 hregs->ctrl = HPC3_SCTRL_ACTIVE;
163 hregs->ctrl = HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR;
168 static void dma_stop(struct Scsi_Host *instance, Scsi_Cmnd *SCpnt,
171 struct ip22_hostdata *hdata = HDATA(instance);
172 struct hpc3_scsiregs *hregs;
177 hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base;
179 DPRINTK("dma_stop: status<%d> ", status);
181 /* First stop the HPC and flush it's FIFO. */
182 if (hdata->wh.dma_dir) {
183 hregs->ctrl |= HPC3_SCTRL_FLUSH;
184 while (hregs->ctrl & HPC3_SCTRL_ACTIVE)
188 dma_unmap_single(NULL, SCpnt->SCp.dma_handle, SCpnt->SCp.this_residual,
189 SCpnt->sc_data_direction);
194 void sgiwd93_reset(unsigned long base)
196 struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
198 hregs->ctrl = HPC3_SCTRL_CRESET;
203 static inline void init_hpc_chain(struct hpc_data *hd)
205 struct hpc_chunk *hcp = (struct hpc_chunk *) hd->cpu;
206 struct hpc_chunk *dma = (struct hpc_chunk *) hd->dma;
207 unsigned long start, end;
209 start = (unsigned long) hcp;
210 end = start + PAGE_SIZE;
211 while (start < end) {
212 hcp->desc.pnext = (u32) (dma + 1);
213 hcp->desc.cntinfo = HPCDMA_EOX;
215 start += sizeof(struct hpc_chunk);
218 hcp->desc.pnext = hd->dma;
221 static struct Scsi_Host * __init sgiwd93_setup_scsi(
222 Scsi_Host_Template *SGIblows, int unit, int irq,
223 struct hpc3_scsiregs *hregs, unsigned char *wdregs)
225 struct ip22_hostdata *hdata;
226 struct Scsi_Host *host;
229 host = scsi_register(SGIblows, sizeof(struct ip22_hostdata));
233 host->base = (unsigned long) hregs;
237 hdata->hd.cpu = dma_alloc_coherent(NULL, PAGE_SIZE, &hdata->hd.dma,
239 if (!hdata->hd.cpu) {
240 printk(KERN_WARNING "sgiwd93: Could not allocate memory for "
241 "host %d buffer.\n", unit);
244 init_hpc_chain(&hdata->hd);
246 regs.SASR = wdregs + 3;
247 regs.SCMD = wdregs + 7;
249 wd33c93_init(host, regs, dma_setup, dma_stop, WD33C93_FS_16_20);
251 hdata->wh.no_sync = 0;
253 if (request_irq(irq, sgiwd93_intr, 0, "SGI WD93", (void *) host)) {
254 printk(KERN_WARNING "sgiwd93: Could not register irq %d "
255 "for host %d.\n", irq, unit);
261 dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
265 scsi_unregister(host);
270 int __init sgiwd93_detect(Scsi_Host_Template *SGIblows)
274 SGIblows->proc_name = "SGIWD93";
275 sgiwd93_host = sgiwd93_setup_scsi(SGIblows, 0, SGI_WD93_0_IRQ,
277 (unsigned char *)hpc3c0->scsi0_ext);
281 /* Set up second controller on the Indigo2 */
282 if (ip22_is_fullhouse()) {
283 sgiwd93_host1 = sgiwd93_setup_scsi(SGIblows, 1, SGI_WD93_1_IRQ,
285 (unsigned char *)hpc3c0->scsi1_ext);
293 int sgiwd93_release(struct Scsi_Host *instance)
295 struct ip22_hostdata *hdata = HDATA(instance);
298 if (sgiwd93_host && sgiwd93_host == instance)
299 irq = SGI_WD93_0_IRQ;
300 else if (sgiwd93_host1 && sgiwd93_host1 == instance)
301 irq = SGI_WD93_1_IRQ;
303 free_irq(irq, sgiwd93_intr);
304 dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
310 static int sgiwd93_bus_reset(Scsi_Cmnd *cmd)
312 /* FIXME perform bus-specific reset */
314 /* FIXME 2: kill this function, and let midlayer fallback
315 to the same result, calling wd33c93_host_reset() */
317 spin_lock_irq(cmd->device->host->host_lock);
318 wd33c93_host_reset(cmd);
319 spin_unlock_irq(cmd->device->host->host_lock);
325 * Kludge alert - the SCSI code calls the abort and reset method with int
326 * arguments not with pointers. So this is going to blow up beautyfully
327 * on 64-bit systems with memory outside the compat address spaces.
329 static Scsi_Host_Template driver_template = {
330 .proc_name = "SGIWD93",
332 .detect = sgiwd93_detect,
333 .release = sgiwd93_release,
334 .queuecommand = wd33c93_queuecommand,
335 .eh_abort_handler = wd33c93_abort,
336 .eh_bus_reset_handler = sgiwd93_bus_reset,
337 .eh_host_reset_handler = wd33c93_host_reset,
338 .can_queue = CAN_QUEUE,
340 .sg_tablesize = SG_ALL,
341 .cmd_per_lun = CMD_PER_LUN,
342 .use_clustering = DISABLE_CLUSTERING,
344 #include "scsi_module.c"