2 * machine_kexec.c - handle transition of Linux booting another kernel
3 * Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com>
5 * This source code is licensed under the GNU General Public License,
6 * Version 2. See the file COPYING for more details.
10 #include <linux/kexec.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <asm/pgtable.h>
14 #include <asm/pgalloc.h>
15 #include <asm/tlbflush.h>
16 #include <asm/mmu_context.h>
19 #include <asm/cpufeature.h>
21 #include <asm/system.h>
23 #define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
25 #define L0_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
26 #define L1_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
27 #define L2_ATTR (_PAGE_PRESENT)
29 #define LEVEL0_SIZE (1UL << 12UL)
31 #ifndef CONFIG_X86_PAE
32 #define LEVEL1_SIZE (1UL << 22UL)
33 static u32 pgtable_level1[1024] PAGE_ALIGNED;
35 static void identity_map_page(unsigned long address)
37 unsigned long level1_index, level2_index;
40 /* Find the current page table */
41 pgtable_level2 = __va(read_cr3());
43 /* Find the indexes of the physical address to identity map */
44 level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
45 level2_index = address / LEVEL1_SIZE;
47 /* Identity map the page table entry */
48 pgtable_level1[level1_index] = address | L0_ATTR;
49 pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
51 /* Flush the tlb so the new mapping takes effect.
52 * Global tlb entries are not flushed but that is not an issue.
54 load_cr3(pgtable_level2);
58 #define LEVEL1_SIZE (1UL << 21UL)
59 #define LEVEL2_SIZE (1UL << 30UL)
60 static u64 pgtable_level1[512] PAGE_ALIGNED;
61 static u64 pgtable_level2[512] PAGE_ALIGNED;
63 static void identity_map_page(unsigned long address)
65 unsigned long level1_index, level2_index, level3_index;
68 /* Find the current page table */
69 pgtable_level3 = __va(read_cr3());
71 /* Find the indexes of the physical address to identity map */
72 level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
73 level2_index = (address % LEVEL2_SIZE)/LEVEL1_SIZE;
74 level3_index = address / LEVEL2_SIZE;
76 /* Identity map the page table entry */
77 pgtable_level1[level1_index] = address | L0_ATTR;
78 pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
79 set_64bit(&pgtable_level3[level3_index],
80 __pa(pgtable_level2) | L2_ATTR);
82 /* Flush the tlb so the new mapping takes effect.
83 * Global tlb entries are not flushed but that is not an issue.
85 load_cr3(pgtable_level3);
89 static void set_idt(void *newidt, __u16 limit)
91 struct Xgt_desc_struct curidt;
93 /* ia32 supports unaliged loads & stores */
95 curidt.address = (unsigned long)newidt;
101 static void set_gdt(void *newgdt, __u16 limit)
103 struct Xgt_desc_struct curgdt;
105 /* ia32 supports unaligned loads & stores */
107 curgdt.address = (unsigned long)newgdt;
112 static void load_segments(void)
115 #define STR(X) __STR(X)
117 __asm__ __volatile__ (
118 "\tljmp $"STR(__KERNEL_CS)",$1f\n"
120 "\tmovl $"STR(__KERNEL_DS)",%%eax\n"
121 "\tmovl %%eax,%%ds\n"
122 "\tmovl %%eax,%%es\n"
123 "\tmovl %%eax,%%fs\n"
124 "\tmovl %%eax,%%gs\n"
125 "\tmovl %%eax,%%ss\n"
126 ::: "eax", "memory");
131 typedef asmlinkage NORET_TYPE void (*relocate_new_kernel_t)(
132 unsigned long indirection_page,
133 unsigned long reboot_code_buffer,
134 unsigned long start_address,
135 unsigned int has_pae) ATTRIB_NORET;
137 extern const unsigned char relocate_new_kernel[];
138 extern void relocate_new_kernel_end(void);
139 extern const unsigned int relocate_new_kernel_size;
142 * A architecture hook called to validate the
143 * proposed image and prepare the control pages
144 * as needed. The pages for KEXEC_CONTROL_CODE_SIZE
145 * have been allocated, but the segments have yet
146 * been copied into the kernel.
148 * Do what every setup is needed on image and the
149 * reboot code buffer to allow us to avoid allocations
154 int machine_kexec_prepare(struct kimage *image)
160 * Undo anything leftover by machine_kexec_prepare
161 * when an image is freed.
163 void machine_kexec_cleanup(struct kimage *image)
168 * Do not allocate memory (or fail in any way) in machine_kexec().
169 * We are past the point of no return, committed to rebooting now.
171 NORET_TYPE void machine_kexec(struct kimage *image)
173 unsigned long page_list;
174 unsigned long reboot_code_buffer;
176 relocate_new_kernel_t rnk;
178 /* Interrupts aren't acceptable while we reboot */
181 /* Compute some offsets */
182 reboot_code_buffer = page_to_pfn(image->control_code_page)
184 page_list = image->head;
186 /* Set up an identity mapping for the reboot_code_buffer */
187 identity_map_page(reboot_code_buffer);
190 memcpy((void *)reboot_code_buffer, relocate_new_kernel,
191 relocate_new_kernel_size);
193 /* The segment registers are funny things, they have both a
194 * visible and an invisible part. Whenever the visible part is
195 * set to a specific selector, the invisible part is loaded
196 * with from a table in memory. At no other time is the
197 * descriptor table in memory accessed.
199 * I take advantage of this here by force loading the
200 * segments, before I zap the gdt with an invalid value.
203 /* The gdt & idt are now invalid.
204 * If you want to load them you must set up your own idt & gdt.
206 set_gdt(phys_to_virt(0),0);
207 set_idt(phys_to_virt(0),0);
210 rnk = (relocate_new_kernel_t) reboot_code_buffer;
211 (*rnk)(page_list, reboot_code_buffer, image->start, cpu_has_pae);
214 /* crashkernel=size@addr specifies the location to reserve for
215 * a crash kernel. By reserving this memory we guarantee
216 * that linux never sets it up as a DMA target.
217 * Useful for holding code to do something appropriate
218 * after a kernel panic.
220 static int __init parse_crashkernel(char *arg)
222 unsigned long size, base;
223 size = memparse(arg, &arg);
225 base = memparse(arg+1, &arg);
226 /* FIXME: Do I want a sanity check
227 * to validate the memory range?
229 crashk_res.start = base;
230 crashk_res.end = base + size - 1;
234 early_param("crashkernel", parse_crashkernel);