2 * Copyright (C) 1994 Linus Torvalds
4 * Cyrix stuff, June 1998 by:
5 * - Rafael R. Reilova (moved everything from head.S),
6 * <rreilova@ececs.uc.edu>
7 * - Channing Corn (tests & fixes),
8 * - Andrew D. Balsa (code cleanup).
10 #include <linux/init.h>
11 #include <linux/utsname.h>
13 #include <asm/processor.h>
16 #include <asm/paravirt.h>
17 #include <asm/alternative.h>
19 static int __init no_halt(char *s)
21 boot_cpu_data.hlt_works_ok = 0;
25 __setup("no-hlt", no_halt);
27 static int __init mca_pentium(char *s)
33 __setup("mca-pentium", mca_pentium);
35 static int __init no_387(char *s)
37 boot_cpu_data.hard_math = 0;
38 write_cr0(0xE | read_cr0());
42 __setup("no387", no_387);
44 static double __initdata x = 4195835.0;
45 static double __initdata y = 3145727.0;
48 * This used to check for exceptions..
49 * However, it turns out that to support that,
50 * the XMM trap handlers basically had to
51 * be buggy. So let's have a correct XMM trap
52 * handler, and forget about printing out
53 * some status at boot.
55 * We should really only care about bugs here
56 * anyway. Not features.
58 static void __init check_fpu(void)
60 if (!boot_cpu_data.hard_math) {
61 #ifndef CONFIG_MATH_EMULATION
62 printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
63 printk(KERN_EMERG "Giving up.\n");
69 /* trap_init() enabled FXSR and company _before_ testing for FP problems here. */
70 /* Test for the divl bug.. */
76 "fsubp %%st,%%st(1)\n\t"
80 : "=m" (*&boot_cpu_data.fdiv_bug)
81 : "m" (*&x), "m" (*&y));
82 if (boot_cpu_data.fdiv_bug)
83 printk("Hmm, FPU with FDIV bug.\n");
86 static void __init check_hlt(void)
88 if (paravirt_enabled())
91 printk(KERN_INFO "Checking 'hlt' instruction... ");
92 if (!boot_cpu_data.hlt_works_ok) {
104 * Most 386 processors have a bug where a POPAD can lock the
105 * machine even from user space.
108 static void __init check_popad(void)
110 #ifndef CONFIG_X86_POPAD_OK
111 int res, inp = (int) &res;
113 printk(KERN_INFO "Checking for popad bug... ");
114 __asm__ __volatile__(
115 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
119 /* If this fails, it means that any user program may lock the CPU hard. Too bad. */
120 if (res != 12345678) printk( "Buggy.\n" );
121 else printk( "OK.\n" );
126 * Check whether we are able to run this kernel safely on SMP.
128 * - In order to run on a i386, we need to be compiled for i386
129 * (for due to lack of "invlpg" and working WP on a i386)
130 * - In order to run on anything without a TSC, we need to be
131 * compiled for a i486.
132 * - In order to support the local APIC on a buggy Pentium machine,
133 * we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
134 * which happens implicitly if compiled for a Pentium or lower
135 * (unless an advanced selection of CPU features is used) as an
136 * otherwise config implies a properly working local APIC without
137 * the need to do extra reads from the APIC.
140 static void __init check_config(void)
143 * We'd better not be a i386 if we're configured to use some
144 * i486+ only features! (WP works in supervisor mode and the
145 * new "invlpg" and "bswap" instructions)
147 #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
148 if (boot_cpu_data.x86 == 3)
149 panic("Kernel requires i486+ for 'invlpg' and other features");
153 * If we configured ourselves for a TSC, we'd better have one!
155 #ifdef CONFIG_X86_TSC
156 if (!cpu_has_tsc && !tsc_disable)
157 panic("Kernel compiled for Pentium+, requires TSC feature!");
161 * If we were told we had a good local APIC, check for buggy Pentia,
162 * i.e. all B steppings and the C2 stepping of P54C when using their
163 * integrated APIC (see 11AP erratum in "Pentium Processor
164 * Specification Update").
166 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
167 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
169 && boot_cpu_data.x86 == 5
170 && boot_cpu_data.x86_model == 2
171 && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
172 panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
177 void __init check_bugs(void)
182 print_cpu_info(&boot_cpu_data);
188 init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
189 alternative_instructions();