Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[linux-2.6] / drivers / infiniband / hw / ipath / ipath_init_chip.c
1 /*
2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <linux/pci.h>
35 #include <linux/netdevice.h>
36 #include <linux/vmalloc.h>
37
38 #include "ipath_kernel.h"
39 #include "ipath_common.h"
40
41 /*
42  * min buffers we want to have per port, after driver
43  */
44 #define IPATH_MIN_USER_PORT_BUFCNT 8
45
46 /*
47  * Number of ports we are configured to use (to allow for more pio
48  * buffers per port, etc.)  Zero means use chip value.
49  */
50 static ushort ipath_cfgports;
51
52 module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
53 MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
54
55 /*
56  * Number of buffers reserved for driver (verbs and layered drivers.)
57  * Reserved at end of buffer list.   Initialized based on
58  * number of PIO buffers if not set via module interface.
59  * The problem with this is that it's global, but we'll use different
60  * numbers for different chip types.  So the default value is not
61  * very useful.  I've redefined it for the 1.3 release so that it's
62  * zero unless set by the user to something else, in which case we
63  * try to respect it.
64  */
65 static ushort ipath_kpiobufs;
66
67 static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
68
69 module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
70                   &ipath_kpiobufs, S_IWUSR | S_IRUGO);
71 MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
72
73 /**
74  * create_port0_egr - allocate the eager TID buffers
75  * @dd: the infinipath device
76  *
77  * This code is now quite different for user and kernel, because
78  * the kernel uses skb's, for the accelerated network performance.
79  * This is the kernel (port0) version.
80  *
81  * Allocate the eager TID buffers and program them into infinipath.
82  * We use the network layer alloc_skb() allocator to allocate the
83  * memory, and either use the buffers as is for things like verbs
84  * packets, or pass the buffers up to the ipath layered driver and
85  * thence the network layer, replacing them as we do so (see
86  * ipath_rcv_layer()).
87  */
88 static int create_port0_egr(struct ipath_devdata *dd)
89 {
90         unsigned e, egrcnt;
91         struct ipath_skbinfo *skbinfo;
92         int ret;
93
94         egrcnt = dd->ipath_rcvegrcnt;
95
96         skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt);
97         if (skbinfo == NULL) {
98                 ipath_dev_err(dd, "allocation error for eager TID "
99                               "skb array\n");
100                 ret = -ENOMEM;
101                 goto bail;
102         }
103         for (e = 0; e < egrcnt; e++) {
104                 /*
105                  * This is a bit tricky in that we allocate extra
106                  * space for 2 bytes of the 14 byte ethernet header.
107                  * These two bytes are passed in the ipath header so
108                  * the rest of the data is word aligned.  We allocate
109                  * 4 bytes so that the data buffer stays word aligned.
110                  * See ipath_kreceive() for more details.
111                  */
112                 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL);
113                 if (!skbinfo[e].skb) {
114                         ipath_dev_err(dd, "SKB allocation error for "
115                                       "eager TID %u\n", e);
116                         while (e != 0)
117                                 dev_kfree_skb(skbinfo[--e].skb);
118                         vfree(skbinfo);
119                         ret = -ENOMEM;
120                         goto bail;
121                 }
122         }
123         /*
124          * After loop above, so we can test non-NULL to see if ready
125          * to use at receive, etc.
126          */
127         dd->ipath_port0_skbinfo = skbinfo;
128
129         for (e = 0; e < egrcnt; e++) {
130                 dd->ipath_port0_skbinfo[e].phys =
131                   ipath_map_single(dd->pcidev,
132                                    dd->ipath_port0_skbinfo[e].skb->data,
133                                    dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE);
134                 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
135                                     ((char __iomem *) dd->ipath_kregbase +
136                                      dd->ipath_rcvegrbase), 0,
137                                     dd->ipath_port0_skbinfo[e].phys);
138         }
139
140         ret = 0;
141
142 bail:
143         return ret;
144 }
145
146 static int bringup_link(struct ipath_devdata *dd)
147 {
148         u64 val, ibc;
149         int ret = 0;
150
151         /* hold IBC in reset */
152         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
153         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
154                          dd->ipath_control);
155
156         /*
157          * Note that prior to try 14 or 15 of IB, the credit scaling
158          * wasn't working, because it was swapped for writes with the
159          * 1 bit default linkstate field
160          */
161
162         /* ignore pbc and align word */
163         val = dd->ipath_piosize2k - 2 * sizeof(u32);
164         /*
165          * for ICRC, which we only send in diag test pkt mode, and we
166          * don't need to worry about that for mtu
167          */
168         val += 1;
169         /*
170          * Set the IBC maxpktlength to the size of our pio buffers the
171          * maxpktlength is in words.  This is *not* the IB data MTU.
172          */
173         ibc = (val / sizeof(u32)) << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
174         /* in KB */
175         ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
176         /*
177          * How often flowctrl sent.  More or less in usecs; balance against
178          * watermark value, so that in theory senders always get a flow
179          * control update in time to not let the IB link go idle.
180          */
181         ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
182         /* max error tolerance */
183         ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
184         /* use "real" buffer space for */
185         ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
186         /* IB credit flow control. */
187         ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
188         /* initially come up waiting for TS1, without sending anything. */
189         dd->ipath_ibcctrl = ibc;
190         /*
191          * Want to start out with both LINKCMD and LINKINITCMD in NOP
192          * (0 and 0).  Don't put linkinitcmd in ipath_ibcctrl, want that
193          * to stay a NOP
194          */
195         ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
196                 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
197         ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
198                    (unsigned long long) ibc);
199         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
200
201         // be sure chip saw it
202         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
203
204         ret = dd->ipath_f_bringup_serdes(dd);
205
206         if (ret)
207                 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
208                          "not usable\n");
209         else {
210                 /* enable IBC */
211                 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
212                 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
213                                  dd->ipath_control);
214         }
215
216         return ret;
217 }
218
219 static struct ipath_portdata *create_portdata0(struct ipath_devdata *dd)
220 {
221         struct ipath_portdata *pd = NULL;
222
223         pd = kzalloc(sizeof(*pd), GFP_KERNEL);
224         if (pd) {
225                 pd->port_dd = dd;
226                 pd->port_cnt = 1;
227                 /* The port 0 pkey table is used by the layer interface. */
228                 pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
229         }
230         return pd;
231 }
232
233 static int init_chip_first(struct ipath_devdata *dd,
234                            struct ipath_portdata **pdp)
235 {
236         struct ipath_portdata *pd = NULL;
237         int ret = 0;
238         u64 val;
239
240         /*
241          * skip cfgports stuff because we are not allocating memory,
242          * and we don't want problems if the portcnt changed due to
243          * cfgports.  We do still check and report a difference, if
244          * not same (should be impossible).
245          */
246         dd->ipath_portcnt =
247                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
248         if (!ipath_cfgports)
249                 dd->ipath_cfgports = dd->ipath_portcnt;
250         else if (ipath_cfgports <= dd->ipath_portcnt) {
251                 dd->ipath_cfgports = ipath_cfgports;
252                 ipath_dbg("Configured to use %u ports out of %u in chip\n",
253                           dd->ipath_cfgports, dd->ipath_portcnt);
254         } else {
255                 dd->ipath_cfgports = dd->ipath_portcnt;
256                 ipath_dbg("Tried to configured to use %u ports; chip "
257                           "only supports %u\n", ipath_cfgports,
258                           dd->ipath_portcnt);
259         }
260         /*
261          * Allocate full portcnt array, rather than just cfgports, because
262          * cleanup iterates across all possible ports.
263          */
264         dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
265                                GFP_KERNEL);
266
267         if (!dd->ipath_pd) {
268                 ipath_dev_err(dd, "Unable to allocate portdata array, "
269                               "failing\n");
270                 ret = -ENOMEM;
271                 goto done;
272         }
273
274         dd->ipath_lastegrheads = kzalloc(sizeof(*dd->ipath_lastegrheads)
275                                          * dd->ipath_cfgports,
276                                          GFP_KERNEL);
277         dd->ipath_lastrcvhdrqtails =
278                 kzalloc(sizeof(*dd->ipath_lastrcvhdrqtails)
279                         * dd->ipath_cfgports, GFP_KERNEL);
280
281         if (!dd->ipath_lastegrheads || !dd->ipath_lastrcvhdrqtails) {
282                 ipath_dev_err(dd, "Unable to allocate head arrays, "
283                               "failing\n");
284                 ret = -ENOMEM;
285                 goto done;
286         }
287
288         pd = create_portdata0(dd);
289
290         if (!pd) {
291                 ipath_dev_err(dd, "Unable to allocate portdata for port "
292                               "0, failing\n");
293                 ret = -ENOMEM;
294                 goto done;
295         }
296         dd->ipath_pd[0] = pd;
297
298         dd->ipath_rcvtidcnt =
299                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
300         dd->ipath_rcvtidbase =
301                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
302         dd->ipath_rcvegrcnt =
303                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
304         dd->ipath_rcvegrbase =
305                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
306         dd->ipath_palign =
307                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
308         dd->ipath_piobufbase =
309                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
310         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
311         dd->ipath_piosize2k = val & ~0U;
312         dd->ipath_piosize4k = val >> 32;
313         dd->ipath_ibmtu = 4096; /* default to largest legal MTU */
314         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
315         dd->ipath_piobcnt2k = val & ~0U;
316         dd->ipath_piobcnt4k = val >> 32;
317         dd->ipath_pio2kbase =
318                 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
319                                  (dd->ipath_piobufbase & 0xffffffff));
320         if (dd->ipath_piobcnt4k) {
321                 dd->ipath_pio4kbase = (u32 __iomem *)
322                         (((char __iomem *) dd->ipath_kregbase) +
323                          (dd->ipath_piobufbase >> 32));
324                 /*
325                  * 4K buffers take 2 pages; we use roundup just to be
326                  * paranoid; we calculate it once here, rather than on
327                  * ever buf allocate
328                  */
329                 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
330                                           dd->ipath_palign);
331                 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
332                           "(%x aligned)\n",
333                           dd->ipath_piobcnt2k, dd->ipath_piosize2k,
334                           dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
335                           dd->ipath_piosize4k, dd->ipath_pio4kbase,
336                           dd->ipath_4kalign);
337         }
338         else ipath_dbg("%u 2k piobufs @ %p\n",
339                        dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
340
341         spin_lock_init(&dd->ipath_tid_lock);
342
343 done:
344         *pdp = pd;
345         return ret;
346 }
347
348 /**
349  * init_chip_reset - re-initialize after a reset, or enable
350  * @dd: the infinipath device
351  * @pdp: output for port data
352  *
353  * sanity check at least some of the values after reset, and
354  * ensure no receive or transmit (explictly, in case reset
355  * failed
356  */
357 static int init_chip_reset(struct ipath_devdata *dd,
358                            struct ipath_portdata **pdp)
359 {
360         u32 rtmp;
361
362         *pdp = dd->ipath_pd[0];
363         /* ensure chip does no sends or receives while we re-initialize */
364         dd->ipath_control = dd->ipath_sendctrl = dd->ipath_rcvctrl = 0U;
365         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 0);
366         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0);
367         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0);
368
369         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
370         if (dd->ipath_portcnt != rtmp)
371                 dev_info(&dd->pcidev->dev, "portcnt was %u before "
372                          "reset, now %u, using original\n",
373                          dd->ipath_portcnt, rtmp);
374         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
375         if (rtmp != dd->ipath_rcvtidcnt)
376                 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
377                          "reset, now %u, using original\n",
378                          dd->ipath_rcvtidcnt, rtmp);
379         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
380         if (rtmp != dd->ipath_rcvtidbase)
381                 dev_info(&dd->pcidev->dev, "tidbase was %u before "
382                          "reset, now %u, using original\n",
383                          dd->ipath_rcvtidbase, rtmp);
384         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
385         if (rtmp != dd->ipath_rcvegrcnt)
386                 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
387                          "reset, now %u, using original\n",
388                          dd->ipath_rcvegrcnt, rtmp);
389         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
390         if (rtmp != dd->ipath_rcvegrbase)
391                 dev_info(&dd->pcidev->dev, "egrbase was %u before "
392                          "reset, now %u, using original\n",
393                          dd->ipath_rcvegrbase, rtmp);
394
395         return 0;
396 }
397
398 static int init_pioavailregs(struct ipath_devdata *dd)
399 {
400         int ret;
401
402         dd->ipath_pioavailregs_dma = dma_alloc_coherent(
403                 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
404                 GFP_KERNEL);
405         if (!dd->ipath_pioavailregs_dma) {
406                 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
407                               "in memory\n");
408                 ret = -ENOMEM;
409                 goto done;
410         }
411
412         /*
413          * we really want L2 cache aligned, but for current CPUs of
414          * interest, they are the same.
415          */
416         dd->ipath_statusp = (u64 *)
417                 ((char *)dd->ipath_pioavailregs_dma +
418                  ((2 * L1_CACHE_BYTES +
419                    dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
420         /* copy the current value now that it's really allocated */
421         *dd->ipath_statusp = dd->_ipath_status;
422         /*
423          * setup buffer to hold freeze msg, accessible to apps,
424          * following statusp
425          */
426         dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
427         /* and its length */
428         dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
429
430         ret = 0;
431
432 done:
433         return ret;
434 }
435
436 /**
437  * init_shadow_tids - allocate the shadow TID array
438  * @dd: the infinipath device
439  *
440  * allocate the shadow TID array, so we can ipath_munlock previous
441  * entries.  It may make more sense to move the pageshadow to the
442  * port data structure, so we only allocate memory for ports actually
443  * in use, since we at 8k per port, now.
444  */
445 static void init_shadow_tids(struct ipath_devdata *dd)
446 {
447         struct page **pages;
448         dma_addr_t *addrs;
449
450         pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
451                         sizeof(struct page *));
452         if (!pages) {
453                 ipath_dev_err(dd, "failed to allocate shadow page * "
454                               "array, no expected sends!\n");
455                 dd->ipath_pageshadow = NULL;
456                 return;
457         }
458
459         addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
460                         sizeof(dma_addr_t));
461         if (!addrs) {
462                 ipath_dev_err(dd, "failed to allocate shadow dma handle "
463                               "array, no expected sends!\n");
464                 vfree(dd->ipath_pageshadow);
465                 dd->ipath_pageshadow = NULL;
466                 return;
467         }
468
469         memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
470                sizeof(struct page *));
471
472         dd->ipath_pageshadow = pages;
473         dd->ipath_physshadow = addrs;
474 }
475
476 static void enable_chip(struct ipath_devdata *dd,
477                         struct ipath_portdata *pd, int reinit)
478 {
479         u32 val;
480         int i;
481
482         if (!reinit)
483                 init_waitqueue_head(&ipath_state_wait);
484
485         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
486                          dd->ipath_rcvctrl);
487
488         /* Enable PIO send, and update of PIOavail regs to memory. */
489         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
490                 INFINIPATH_S_PIOBUFAVAILUPD;
491         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
492                          dd->ipath_sendctrl);
493
494         /*
495          * enable port 0 receive, and receive interrupt.  other ports
496          * done as user opens and inits them.
497          */
498         dd->ipath_rcvctrl = INFINIPATH_R_TAILUPD |
499                 (1ULL << INFINIPATH_R_PORTENABLE_SHIFT) |
500                 (1ULL << INFINIPATH_R_INTRAVAIL_SHIFT);
501         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
502                          dd->ipath_rcvctrl);
503
504         /*
505          * now ready for use.  this should be cleared whenever we
506          * detect a reset, or initiate one.
507          */
508         dd->ipath_flags |= IPATH_INITTED;
509
510         /*
511          * init our shadow copies of head from tail values, and write
512          * head values to match.
513          */
514         val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
515         (void)ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
516         dd->ipath_port0head = ipath_read_ureg32(dd, ur_rcvhdrtail, 0);
517
518         /* Initialize so we interrupt on next packet received */
519         (void)ipath_write_ureg(dd, ur_rcvhdrhead,
520                                dd->ipath_rhdrhead_intr_off |
521                                dd->ipath_port0head, 0);
522
523         /*
524          * by now pioavail updates to memory should have occurred, so
525          * copy them into our working/shadow registers; this is in
526          * case something went wrong with abort, but mostly to get the
527          * initial values of the generation bit correct.
528          */
529         for (i = 0; i < dd->ipath_pioavregs; i++) {
530                 __le64 val;
531
532                 /*
533                  * Chip Errata bug 6641; even and odd qwords>3 are swapped.
534                  */
535                 if (i > 3) {
536                         if (i & 1)
537                                 val = dd->ipath_pioavailregs_dma[i - 1];
538                         else
539                                 val = dd->ipath_pioavailregs_dma[i + 1];
540                 }
541                 else
542                         val = dd->ipath_pioavailregs_dma[i];
543                 dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
544         }
545         /* can get counters, stats, etc. */
546         dd->ipath_flags |= IPATH_PRESENT;
547 }
548
549 static int init_housekeeping(struct ipath_devdata *dd,
550                              struct ipath_portdata **pdp, int reinit)
551 {
552         char boardn[32];
553         int ret = 0;
554
555         /*
556          * have to clear shadow copies of registers at init that are
557          * not otherwise set here, or all kinds of bizarre things
558          * happen with driver on chip reset
559          */
560         dd->ipath_rcvhdrsize = 0;
561
562         /*
563          * Don't clear ipath_flags as 8bit mode was set before
564          * entering this func. However, we do set the linkstate to
565          * unknown, so we can watch for a transition.
566          * PRESENT is set because we want register reads to work,
567          * and the kernel infrastructure saw it in config space;
568          * We clear it if we have failures.
569          */
570         dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
571         dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
572                              IPATH_LINKDOWN | IPATH_LINKINIT);
573
574         ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
575         dd->ipath_revision =
576                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
577
578         /*
579          * set up fundamental info we need to use the chip; we assume
580          * if the revision reg and these regs are OK, we don't need to
581          * special case the rest
582          */
583         dd->ipath_sregbase =
584                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
585         dd->ipath_cregbase =
586                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
587         dd->ipath_uregbase =
588                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
589         ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
590                    "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
591                    dd->ipath_uregbase, dd->ipath_cregbase);
592         if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
593             || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
594             || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
595             || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
596                 ipath_dev_err(dd, "Register read failures from chip, "
597                               "giving up initialization\n");
598                 dd->ipath_flags &= ~IPATH_PRESENT;
599                 ret = -ENODEV;
600                 goto done;
601         }
602
603
604         /* clear diagctrl register, in case diags were running and crashed */
605         ipath_write_kreg (dd, dd->ipath_kregs->kr_hwdiagctrl, 0);
606
607         /* clear the initial reset flag, in case first driver load */
608         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
609                          INFINIPATH_E_RESET);
610
611         if (reinit)
612                 ret = init_chip_reset(dd, pdp);
613         else
614                 ret = init_chip_first(dd, pdp);
615
616         if (ret)
617                 goto done;
618
619         ipath_cdbg(VERBOSE, "Revision %llx (PCI %x), %u ports, %u tids, "
620                    "%u egrtids\n", (unsigned long long) dd->ipath_revision,
621                    dd->ipath_pcirev, dd->ipath_portcnt, dd->ipath_rcvtidcnt,
622                    dd->ipath_rcvegrcnt);
623
624         if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
625              INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
626                 ipath_dev_err(dd, "Driver only handles version %d, "
627                               "chip swversion is %d (%llx), failng\n",
628                               IPATH_CHIP_SWVERSION,
629                               (int)(dd->ipath_revision >>
630                                     INFINIPATH_R_SOFTWARE_SHIFT) &
631                               INFINIPATH_R_SOFTWARE_MASK,
632                               (unsigned long long) dd->ipath_revision);
633                 ret = -ENOSYS;
634                 goto done;
635         }
636         dd->ipath_majrev = (u8) ((dd->ipath_revision >>
637                                   INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
638                                  INFINIPATH_R_CHIPREVMAJOR_MASK);
639         dd->ipath_minrev = (u8) ((dd->ipath_revision >>
640                                   INFINIPATH_R_CHIPREVMINOR_SHIFT) &
641                                  INFINIPATH_R_CHIPREVMINOR_MASK);
642         dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
643                                     INFINIPATH_R_BOARDID_SHIFT) &
644                                    INFINIPATH_R_BOARDID_MASK);
645
646         ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
647
648         snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
649                  "Driver %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
650                  "SW Compat %u\n",
651                  IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
652                  (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
653                  INFINIPATH_R_ARCH_MASK,
654                  dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
655                  (unsigned)(dd->ipath_revision >>
656                             INFINIPATH_R_SOFTWARE_SHIFT) &
657                  INFINIPATH_R_SOFTWARE_MASK);
658
659         ipath_dbg("%s", dd->ipath_boardversion);
660
661 done:
662         return ret;
663 }
664
665
666 /**
667  * ipath_init_chip - do the actual initialization sequence on the chip
668  * @dd: the infinipath device
669  * @reinit: reinitializing, so don't allocate new memory
670  *
671  * Do the actual initialization sequence on the chip.  This is done
672  * both from the init routine called from the PCI infrastructure, and
673  * when we reset the chip, or detect that it was reset internally,
674  * or it's administratively re-enabled.
675  *
676  * Memory allocation here and in called routines is only done in
677  * the first case (reinit == 0).  We have to be careful, because even
678  * without memory allocation, we need to re-write all the chip registers
679  * TIDs, etc. after the reset or enable has completed.
680  */
681 int ipath_init_chip(struct ipath_devdata *dd, int reinit)
682 {
683         int ret = 0, i;
684         u32 val32, kpiobufs;
685         u32 piobufs, uports;
686         u64 val;
687         struct ipath_portdata *pd = NULL; /* keep gcc4 happy */
688         gfp_t gfp_flags = GFP_USER | __GFP_COMP;
689
690         ret = init_housekeeping(dd, &pd, reinit);
691         if (ret)
692                 goto done;
693
694         /*
695          * we ignore most issues after reporting them, but have to specially
696          * handle hardware-disabled chips.
697          */
698         if (ret == 2) {
699                 /* unique error, known to ipath_init_one */
700                 ret = -EPERM;
701                 goto done;
702         }
703
704         /*
705          * We could bump this to allow for full rcvegrcnt + rcvtidcnt,
706          * but then it no longer nicely fits power of two, and since
707          * we now use routines that backend onto __get_free_pages, the
708          * rest would be wasted.
709          */
710         dd->ipath_rcvhdrcnt = dd->ipath_rcvegrcnt;
711         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
712                          dd->ipath_rcvhdrcnt);
713
714         /*
715          * Set up the shadow copies of the piobufavail registers,
716          * which we compare against the chip registers for now, and
717          * the in memory DMA'ed copies of the registers.  This has to
718          * be done early, before we calculate lastport, etc.
719          */
720         piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
721         /*
722          * calc number of pioavail registers, and save it; we have 2
723          * bits per buffer.
724          */
725         dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
726                 / (sizeof(u64) * BITS_PER_BYTE / 2);
727         uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
728         if (ipath_kpiobufs == 0) {
729                 /* not set by user (this is default) */
730                 if (piobufs >= (uports * IPATH_MIN_USER_PORT_BUFCNT) + 32)
731                         kpiobufs = 32;
732                 else
733                         kpiobufs = 16;
734         }
735         else
736                 kpiobufs = ipath_kpiobufs;
737
738         if (kpiobufs + (uports * IPATH_MIN_USER_PORT_BUFCNT) > piobufs) {
739                 i = (int) piobufs -
740                         (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
741                 if (i < 0)
742                         i = 0;
743                 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
744                          "%d for kernel leaves too few for %d user ports "
745                          "(%d each); using %u\n", kpiobufs,
746                          piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
747                 /*
748                  * shouldn't change ipath_kpiobufs, because could be
749                  * different for different devices...
750                  */
751                 kpiobufs = i;
752         }
753         dd->ipath_lastport_piobuf = piobufs - kpiobufs;
754         dd->ipath_pbufsport =
755                 uports ? dd->ipath_lastport_piobuf / uports : 0;
756         val32 = dd->ipath_lastport_piobuf - (dd->ipath_pbufsport * uports);
757         if (val32 > 0) {
758                 ipath_dbg("allocating %u pbufs/port leaves %u unused, "
759                           "add to kernel\n", dd->ipath_pbufsport, val32);
760                 dd->ipath_lastport_piobuf -= val32;
761                 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n",
762                           dd->ipath_pbufsport, val32);
763         }
764         dd->ipath_lastpioindex = dd->ipath_lastport_piobuf;
765         ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
766                    "each for %u user ports\n", kpiobufs,
767                    piobufs, dd->ipath_pbufsport, uports);
768
769         dd->ipath_f_early_init(dd);
770
771         /* early_init sets rcvhdrentsize and rcvhdrsize, so this must be
772          * done after early_init */
773         dd->ipath_hdrqlast =
774                 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
775         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
776                          dd->ipath_rcvhdrentsize);
777         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
778                          dd->ipath_rcvhdrsize);
779
780         if (!reinit) {
781                 ret = init_pioavailregs(dd);
782                 init_shadow_tids(dd);
783                 if (ret)
784                         goto done;
785         }
786
787         (void)ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
788                                dd->ipath_pioavailregs_phys);
789         /*
790          * this is to detect s/w errors, which the h/w works around by
791          * ignoring the low 6 bits of address, if it wasn't aligned.
792          */
793         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
794         if (val != dd->ipath_pioavailregs_phys) {
795                 ipath_dev_err(dd, "Catastrophic software error, "
796                               "SendPIOAvailAddr written as %lx, "
797                               "read back as %llx\n",
798                               (unsigned long) dd->ipath_pioavailregs_phys,
799                               (unsigned long long) val);
800                 ret = -EINVAL;
801                 goto done;
802         }
803
804         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
805
806         /*
807          * make sure we are not in freeze, and PIO send enabled, so
808          * writes to pbc happen
809          */
810         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
811         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
812                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
813         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
814         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
815                          INFINIPATH_S_PIOENABLE);
816
817         /*
818          * before error clears, since we expect serdes pll errors during
819          * this, the first time after reset
820          */
821         if (bringup_link(dd)) {
822                 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
823                 ret = -ENETDOWN;
824                 goto done;
825         }
826
827         /*
828          * clear any "expected" hwerrs from reset and/or initialization
829          * clear any that aren't enabled (at least this once), and then
830          * set the enable mask
831          */
832         dd->ipath_f_init_hwerrors(dd);
833         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
834                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
835         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
836                          dd->ipath_hwerrmask);
837
838         dd->ipath_maskederrs = dd->ipath_ignorederrs;
839         /* clear all */
840         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
841         /* enable errors that are masked, at least this first time. */
842         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
843                          ~dd->ipath_maskederrs);
844         /* clear any interrups up to this point (ints still not enabled) */
845         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
846
847         /*
848          * Set up the port 0 (kernel) rcvhdr q and egr TIDs.  If doing
849          * re-init, the simplest way to handle this is to free
850          * existing, and re-allocate.
851          * Need to re-create rest of port 0 portdata as well.
852          */
853         if (reinit) {
854                 /* Alloc and init new ipath_portdata for port0,
855                  * Then free old pd. Could lead to fragmentation, but also
856                  * makes later support for hot-swap easier.
857                  */
858                 struct ipath_portdata *npd;
859                 npd = create_portdata0(dd);
860                 if (npd) {
861                         ipath_free_pddata(dd, pd);
862                         dd->ipath_pd[0] = pd = npd;
863                 } else {
864                         ipath_dev_err(dd, "Unable to allocate portdata for"
865                                       "  port 0, failing\n");
866                         ret = -ENOMEM;
867                         goto done;
868                 }
869         }
870         dd->ipath_f_tidtemplate(dd);
871         ret = ipath_create_rcvhdrq(dd, pd);
872         if (!ret) {
873                 dd->ipath_hdrqtailptr =
874                         (volatile __le64 *)pd->port_rcvhdrtail_kvaddr;
875                 ret = create_port0_egr(dd);
876         }
877         if (ret)
878                 ipath_dev_err(dd, "failed to allocate port 0 (kernel) "
879                               "rcvhdrq and/or egr bufs\n");
880         else
881                 enable_chip(dd, pd, reinit);
882
883
884         if (!ret && !reinit) {
885             /* used when we close a port, for DMA already in flight at close */
886                 dd->ipath_dummy_hdrq = dma_alloc_coherent(
887                         &dd->pcidev->dev, pd->port_rcvhdrq_size,
888                         &dd->ipath_dummy_hdrq_phys,
889                         gfp_flags);
890                 if (!dd->ipath_dummy_hdrq ) {
891                         dev_info(&dd->pcidev->dev,
892                                 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
893                                 pd->port_rcvhdrq_size);
894                         /* fallback to just 0'ing */
895                         dd->ipath_dummy_hdrq_phys = 0UL;
896                 }
897         }
898
899         /*
900          * cause retrigger of pending interrupts ignored during init,
901          * even if we had errors
902          */
903         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
904
905         if(!dd->ipath_stats_timer_active) {
906                 /*
907                  * first init, or after an admin disable/enable
908                  * set up stats retrieval timer, even if we had errors
909                  * in last portion of setup
910                  */
911                 init_timer(&dd->ipath_stats_timer);
912                 dd->ipath_stats_timer.function = ipath_get_faststats;
913                 dd->ipath_stats_timer.data = (unsigned long) dd;
914                 /* every 5 seconds; */
915                 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
916                 /* takes ~16 seconds to overflow at full IB 4x bandwdith */
917                 add_timer(&dd->ipath_stats_timer);
918                 dd->ipath_stats_timer_active = 1;
919         }
920
921 done:
922         if (!ret) {
923                 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
924                 if (!dd->ipath_f_intrsetup(dd)) {
925                         /* now we can enable all interrupts from the chip */
926                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
927                                          -1LL);
928                         /* force re-interrupt of any pending interrupts. */
929                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
930                                          0ULL);
931                         /* chip is usable; mark it as initialized */
932                         *dd->ipath_statusp |= IPATH_STATUS_INITTED;
933                 } else
934                         ipath_dev_err(dd, "No interrupts enabled, couldn't "
935                                       "setup interrupt address\n");
936
937                 if (dd->ipath_cfgports > ipath_stats.sps_nports)
938                         /*
939                          * sps_nports is a global, so, we set it to
940                          * the highest number of ports of any of the
941                          * chips we find; we never decrement it, at
942                          * least for now.  Since this might have changed
943                          * over disable/enable or prior to reset, always
944                          * do the check and potentially adjust.
945                          */
946                         ipath_stats.sps_nports = dd->ipath_cfgports;
947         } else
948                 ipath_dbg("Failed (%d) to initialize chip\n", ret);
949
950         /* if ret is non-zero, we probably should do some cleanup
951            here... */
952         return ret;
953 }
954
955 static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
956 {
957         struct ipath_devdata *dd;
958         unsigned long flags;
959         unsigned short val;
960         int ret;
961
962         ret = ipath_parse_ushort(str, &val);
963
964         spin_lock_irqsave(&ipath_devs_lock, flags);
965
966         if (ret < 0)
967                 goto bail;
968
969         if (val == 0) {
970                 ret = -EINVAL;
971                 goto bail;
972         }
973
974         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
975                 if (dd->ipath_kregbase)
976                         continue;
977                 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
978                            (dd->ipath_cfgports *
979                             IPATH_MIN_USER_PORT_BUFCNT)))
980                 {
981                         ipath_dev_err(
982                                 dd,
983                                 "Allocating %d PIO bufs for kernel leaves "
984                                 "too few for %d user ports (%d each)\n",
985                                 val, dd->ipath_cfgports - 1,
986                                 IPATH_MIN_USER_PORT_BUFCNT);
987                         ret = -EINVAL;
988                         goto bail;
989                 }
990                 dd->ipath_lastport_piobuf =
991                         dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
992         }
993
994         ipath_kpiobufs = val;
995         ret = 0;
996 bail:
997         spin_unlock_irqrestore(&ipath_devs_lock, flags);
998
999         return ret;
1000 }