1 /* p9100.c: P9100 frame buffer driver
3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
6 * Driver layout based loosely on tgafb.c, see that file for credits.
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/errno.h>
12 #include <linux/string.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
21 #include <asm/of_device.h>
30 static int p9100_setcolreg(unsigned, unsigned, unsigned, unsigned,
31 unsigned, struct fb_info *);
32 static int p9100_blank(int, struct fb_info *);
34 static int p9100_mmap(struct fb_info *, struct vm_area_struct *);
35 static int p9100_ioctl(struct fb_info *, unsigned int, unsigned long);
38 * Frame buffer operations
41 static struct fb_ops p9100_ops = {
43 .fb_setcolreg = p9100_setcolreg,
44 .fb_blank = p9100_blank,
45 .fb_fillrect = cfb_fillrect,
46 .fb_copyarea = cfb_copyarea,
47 .fb_imageblit = cfb_imageblit,
48 .fb_mmap = p9100_mmap,
49 .fb_ioctl = p9100_ioctl,
51 .fb_compat_ioctl = sbusfb_compat_ioctl,
55 /* P9100 control registers */
56 #define P9100_SYSCTL_OFF 0x0UL
57 #define P9100_VIDEOCTL_OFF 0x100UL
58 #define P9100_VRAMCTL_OFF 0x180UL
59 #define P9100_RAMDAC_OFF 0x200UL
60 #define P9100_VIDEOCOPROC_OFF 0x400UL
62 /* P9100 command registers */
63 #define P9100_CMD_OFF 0x0UL
65 /* P9100 framebuffer memory */
66 #define P9100_FB_OFF 0x0UL
68 /* 3 bits: 2=8bpp 3=16bpp 5=32bpp 7=24bpp */
69 #define SYS_CONFIG_PIXELSIZE_SHIFT 26
71 #define SCREENPAINT_TIMECTL1_ENABLE_VIDEO 0x20 /* 0 = off, 1 = on */
74 /* Registers for the system control */
83 /* Registers for the video control */
97 u32 vid_screenpaint_addr;
98 u32 vid_screenpaint_timectl1;
99 u32 vid_screenpaint_qsfcnt;
100 u32 vid_screenpaint_timectl2;
103 /* Registers for the video control */
107 u32 vram_refresh_cnt;
113 /* Registers for IBM RGB528 Palette */
114 u32 ramdac_cmap_wridx;
115 u32 ramdac_palette_data;
116 u32 ramdac_pixel_mask;
117 u32 ramdac_palette_rdaddr;
122 u32 ramdac_xxx[1784];
125 struct p9100_cmd_parameng {
128 u32 parameng_quadcmd;
133 struct p9100_regs __iomem *regs;
136 #define P9100_FLAG_BLANKED 0x00000001
138 unsigned long physbase;
139 unsigned long which_io;
140 unsigned long fbsize;
144 * p9100_setcolreg - Optional function. Sets a color register.
145 * @regno: boolean, 0 copy local, 1 get_user() function
146 * @red: frame buffer colormap structure
147 * @green: The green value which can be up to 16 bits wide
148 * @blue: The blue value which can be up to 16 bits wide.
149 * @transp: If supported the alpha value which can be up to 16 bits wide.
150 * @info: frame buffer info structure
152 static int p9100_setcolreg(unsigned regno,
153 unsigned red, unsigned green, unsigned blue,
154 unsigned transp, struct fb_info *info)
156 struct p9100_par *par = (struct p9100_par *) info->par;
157 struct p9100_regs __iomem *regs = par->regs;
167 spin_lock_irqsave(&par->lock, flags);
169 sbus_writel((regno << 16), ®s->ramdac_cmap_wridx);
170 sbus_writel((red << 16), ®s->ramdac_palette_data);
171 sbus_writel((green << 16), ®s->ramdac_palette_data);
172 sbus_writel((blue << 16), ®s->ramdac_palette_data);
174 spin_unlock_irqrestore(&par->lock, flags);
180 * p9100_blank - Optional function. Blanks the display.
181 * @blank_mode: the blank mode we want.
182 * @info: frame buffer structure that represents a single frame buffer
185 p9100_blank(int blank, struct fb_info *info)
187 struct p9100_par *par = (struct p9100_par *) info->par;
188 struct p9100_regs __iomem *regs = par->regs;
192 spin_lock_irqsave(&par->lock, flags);
195 case FB_BLANK_UNBLANK: /* Unblanking */
196 val = sbus_readl(®s->vid_screenpaint_timectl1);
197 val |= SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
198 sbus_writel(val, ®s->vid_screenpaint_timectl1);
199 par->flags &= ~P9100_FLAG_BLANKED;
202 case FB_BLANK_NORMAL: /* Normal blanking */
203 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
204 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
205 case FB_BLANK_POWERDOWN: /* Poweroff */
206 val = sbus_readl(®s->vid_screenpaint_timectl1);
207 val &= ~SCREENPAINT_TIMECTL1_ENABLE_VIDEO;
208 sbus_writel(val, ®s->vid_screenpaint_timectl1);
209 par->flags |= P9100_FLAG_BLANKED;
213 spin_unlock_irqrestore(&par->lock, flags);
218 static struct sbus_mmap_map p9100_mmap_map[] = {
219 { CG3_MMAP_OFFSET, 0, SBUS_MMAP_FBSIZE(1) },
223 static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma)
225 struct p9100_par *par = (struct p9100_par *)info->par;
227 return sbusfb_mmap_helper(p9100_mmap_map,
228 par->physbase, par->fbsize,
232 static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
235 struct p9100_par *par = (struct p9100_par *) info->par;
237 /* Make it look like a cg3. */
238 return sbusfb_ioctl_helper(cmd, arg, info,
239 FBTYPE_SUN3COLOR, 8, par->fbsize);
246 static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
248 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
250 info->fix.type = FB_TYPE_PACKED_PIXELS;
251 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
253 info->fix.line_length = linebytes;
255 info->fix.accel = FB_ACCEL_SUN_CGTHREE;
260 struct p9100_par par;
263 static int __devinit p9100_init_one(struct of_device *op)
265 struct device_node *dp = op->node;
266 struct all_info *all;
269 all = kzalloc(sizeof(*all), GFP_KERNEL);
273 spin_lock_init(&all->par.lock);
275 /* This is the framebuffer and the only resource apps can mmap. */
276 all->par.physbase = op->resource[2].start;
277 all->par.which_io = op->resource[2].flags & IORESOURCE_BITS;
279 sbusfb_fill_var(&all->info.var, dp->node, 8);
280 all->info.var.red.length = 8;
281 all->info.var.green.length = 8;
282 all->info.var.blue.length = 8;
284 linebytes = of_getintprop_default(dp, "linebytes",
286 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
288 all->par.regs = of_ioremap(&op->resource[0], 0,
289 sizeof(struct p9100_regs), "p9100 regs");
290 if (!all->par.regs) {
295 all->info.flags = FBINFO_DEFAULT;
296 all->info.fbops = &p9100_ops;
297 all->info.screen_base = of_ioremap(&op->resource[2], 0,
298 all->par.fbsize, "p9100 ram");
299 if (!all->info.screen_base) {
300 of_iounmap(&op->resource[0],
301 all->par.regs, sizeof(struct p9100_regs));
305 all->info.par = &all->par;
307 p9100_blank(0, &all->info);
309 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
310 of_iounmap(&op->resource[0],
311 all->par.regs, sizeof(struct p9100_regs));
312 of_iounmap(&op->resource[2],
313 all->info.screen_base, all->par.fbsize);
318 p9100_init_fix(&all->info, linebytes, dp);
320 err = register_framebuffer(&all->info);
322 fb_dealloc_cmap(&all->info.cmap);
323 of_iounmap(&op->resource[0],
324 all->par.regs, sizeof(struct p9100_regs));
325 of_iounmap(&op->resource[2],
326 all->info.screen_base, all->par.fbsize);
330 fb_set_cmap(&all->info.cmap, &all->info);
332 dev_set_drvdata(&op->dev, all);
334 printk("%s: p9100 at %lx:%lx\n",
336 all->par.which_io, all->par.physbase);
341 static int __devinit p9100_probe(struct of_device *dev, const struct of_device_id *match)
343 struct of_device *op = to_of_device(&dev->dev);
345 return p9100_init_one(op);
348 static int __devexit p9100_remove(struct of_device *op)
350 struct all_info *all = dev_get_drvdata(&op->dev);
352 unregister_framebuffer(&all->info);
353 fb_dealloc_cmap(&all->info.cmap);
355 of_iounmap(&op->resource[0], all->par.regs, sizeof(struct p9100_regs));
356 of_iounmap(&op->resource[2], all->info.screen_base, all->par.fbsize);
360 dev_set_drvdata(&op->dev, NULL);
365 static struct of_device_id p9100_match[] = {
371 MODULE_DEVICE_TABLE(of, p9100_match);
373 static struct of_platform_driver p9100_driver = {
375 .match_table = p9100_match,
376 .probe = p9100_probe,
377 .remove = __devexit_p(p9100_remove),
380 static int __init p9100_init(void)
382 if (fb_get_options("p9100fb", NULL))
385 return of_register_driver(&p9100_driver, &of_bus_type);
388 static void __exit p9100_exit(void)
390 of_unregister_driver(&p9100_driver);
393 module_init(p9100_init);
394 module_exit(p9100_exit);
396 MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
397 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
398 MODULE_VERSION("2.0");
399 MODULE_LICENSE("GPL");