git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #include        "firmware.h"
  42 #include <linux/bitrev.h>
  43
  44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  53
  54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  55
  56 const unsigned short ccitt_16Table[] = {
  57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  89 };
  90 #define ByteCRC16(v, crc) \
  91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  92
  93 //
  94 // BBP register initialization set
  95 //
  96 REG_PAIR   BBPRegTable[] = {
  97         {BBP_R65,               0x2C},          // fix rssi issue
  98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  99         {BBP_R69,               0x12},
 100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 101         {BBP_R73,               0x10},
 102         {BBP_R81,               0x37},
 103         {BBP_R82,               0x62},
 104         {BBP_R83,               0x6A},
 105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 111 };
 112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 113
 114 //
 115 // RF register initialization set
 116 //
 117
 118 //
 119 // ASIC register initialization sets
 120 //
 121
 122 RTMP_REG_PAIR   MACRegTable[] = {
 123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 129 #else
 130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 131 #endif // HW_BEACON_OFFSET //
 132
 133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 150         {GF40_PROT_CFG,                 0x03F44084},
 151         {MM20_PROT_CFG,                 0x01744004},
 152         {MM40_PROT_CFG,                 0x03F54084},
 153         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 154         {TX_RTS_CFG,                    0x00092b20},
 155         {EXP_ACK_TIME,                  0x002400ca},    // default value
 156         {TXOP_HLDR_ET,                  0x00000002},
 157
 158         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 159                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 160                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 161                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 162         {XIFS_TIME_CFG,                 0x33a41010},
 163         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 164 };
 165
 166 RTMP_REG_PAIR   STAMACRegTable[] =      {
 167         {WMM_AIFSN_CFG,         0x00002273},
 168         {WMM_CWMIN_CFG, 0x00002344},
 169         {WMM_CWMAX_CFG, 0x000034aa},
 170 };
 171
 172 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 173 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 174
 175
 176 // New 8k byte firmware size for RT3071/RT3072
 177 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 178 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 179 #define FIRMWARE_MAJOR_VERSION  0
 180
 181 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 182 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 183
 184 #define FIRMWARE_MINOR_VERSION  2
 185
 186
 187 /*
 188         ========================================================================
 189
 190         Routine Description:
 191                 Allocate RTMP_ADAPTER data block and do some initialization
 192
 193         Arguments:
 194                 Adapter         Pointer to our adapter
 195
 196         Return Value:
 197                 NDIS_STATUS_SUCCESS
 198                 NDIS_STATUS_FAILURE
 199
 200         IRQL = PASSIVE_LEVEL
 201
 202         Note:
 203
 204         ========================================================================
 205 */
 206 NDIS_STATUS     RTMPAllocAdapterBlock(
 207         IN  PVOID       handle,
 208         OUT     PRTMP_ADAPTER   *ppAdapter)
 209 {
 210         PRTMP_ADAPTER   pAd;
 211         NDIS_STATUS             Status;
 212         INT                     index;
 213         UCHAR                   *pBeaconBuf = NULL;
 214
 215         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 216
 217         *ppAdapter = NULL;
 218
 219         do
 220         {
 221                 // Allocate RTMP_ADAPTER memory block
 222                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 223                 if (pBeaconBuf == NULL)
 224                 {
 225                         Status = NDIS_STATUS_FAILURE;
 226                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 227                         break;
 228                 }
 229
 230                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 231                 if (Status != NDIS_STATUS_SUCCESS)
 232                 {
 233                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 234                         break;
 235                 }
 236                 pAd->BeaconBuf = pBeaconBuf;
 237                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 238
 239
 240                 // Init spin locks
 241                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 242                 NdisAllocateSpinLock(&pAd->RxRingLock);
 243
 244                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 245                 {
 246                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 247                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 248                         pAd->DeQueueRunning[index] = FALSE;
 249                 }
 250
 251                 NdisAllocateSpinLock(&pAd->irq_lock);
 252
 253         } while (FALSE);
 254
 255         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 256                 kfree(pBeaconBuf);
 257
 258         *ppAdapter = pAd;
 259
 260         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 261         return Status;
 262 }
 263
 264 /*
 265         ========================================================================
 266
 267         Routine Description:
 268                 Read initial Tx power per MCS and BW from EEPROM
 269
 270         Arguments:
 271                 Adapter                                         Pointer to our adapter
 272
 273         Return Value:
 274                 None
 275
 276         IRQL = PASSIVE_LEVEL
 277
 278         Note:
 279
 280         ========================================================================
 281 */
 282 VOID    RTMPReadTxPwrPerRate(
 283         IN      PRTMP_ADAPTER   pAd)
 284 {
 285         ULONG           data, Adata, Gdata;
 286         USHORT          i, value, value2;
 287         INT                     Apwrdelta, Gpwrdelta;
 288         UCHAR           t1,t2,t3,t4;
 289         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 290
 291         //
 292         // Get power delta for 20MHz and 40MHz.
 293         //
 294         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 295         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 296         Apwrdelta = 0;
 297         Gpwrdelta = 0;
 298
 299         if ((value2 & 0xff) != 0xff)
 300         {
 301                 if ((value2 & 0x80))
 302                         Gpwrdelta = (value2&0xf);
 303
 304                 if ((value2 & 0x40))
 305                         bGpwrdeltaMinus = FALSE;
 306                 else
 307                         bGpwrdeltaMinus = TRUE;
 308         }
 309         if ((value2 & 0xff00) != 0xff00)
 310         {
 311                 if ((value2 & 0x8000))
 312                         Apwrdelta = ((value2&0xf00)>>8);
 313
 314                 if ((value2 & 0x4000))
 315                         bApwrdeltaMinus = FALSE;
 316                 else
 317                         bApwrdeltaMinus = TRUE;
 318         }
 319         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 320
 321         //
 322         // Get Txpower per MCS for 20MHz in 2.4G.
 323         //
 324         for (i=0; i<5; i++)
 325         {
 326                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 327                 data = value;
 328                 if (bApwrdeltaMinus == FALSE)
 329                 {
 330                         t1 = (value&0xf)+(Apwrdelta);
 331                         if (t1 > 0xf)
 332                                 t1 = 0xf;
 333                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 334                         if (t2 > 0xf)
 335                                 t2 = 0xf;
 336                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 337                         if (t3 > 0xf)
 338                                 t3 = 0xf;
 339                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 340                         if (t4 > 0xf)
 341                                 t4 = 0xf;
 342                 }
 343                 else
 344                 {
 345                         if ((value&0xf) > Apwrdelta)
 346                                 t1 = (value&0xf)-(Apwrdelta);
 347                         else
 348                                 t1 = 0;
 349                         if (((value&0xf0)>>4) > Apwrdelta)
 350                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 351                         else
 352                                 t2 = 0;
 353                         if (((value&0xf00)>>8) > Apwrdelta)
 354                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 355                         else
 356                                 t3 = 0;
 357                         if (((value&0xf000)>>12) > Apwrdelta)
 358                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 359                         else
 360                                 t4 = 0;
 361                 }
 362                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 363                 if (bGpwrdeltaMinus == FALSE)
 364                 {
 365                         t1 = (value&0xf)+(Gpwrdelta);
 366                         if (t1 > 0xf)
 367                                 t1 = 0xf;
 368                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 369                         if (t2 > 0xf)
 370                                 t2 = 0xf;
 371                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 372                         if (t3 > 0xf)
 373                                 t3 = 0xf;
 374                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 375                         if (t4 > 0xf)
 376                                 t4 = 0xf;
 377                 }
 378                 else
 379                 {
 380                         if ((value&0xf) > Gpwrdelta)
 381                                 t1 = (value&0xf)-(Gpwrdelta);
 382                         else
 383                                 t1 = 0;
 384                         if (((value&0xf0)>>4) > Gpwrdelta)
 385                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 386                         else
 387                                 t2 = 0;
 388                         if (((value&0xf00)>>8) > Gpwrdelta)
 389                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 390                         else
 391                                 t3 = 0;
 392                         if (((value&0xf000)>>12) > Gpwrdelta)
 393                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 394                         else
 395                                 t4 = 0;
 396                 }
 397                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 398
 399                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 400                 if (bApwrdeltaMinus == FALSE)
 401                 {
 402                         t1 = (value&0xf)+(Apwrdelta);
 403                         if (t1 > 0xf)
 404                                 t1 = 0xf;
 405                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 406                         if (t2 > 0xf)
 407                                 t2 = 0xf;
 408                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 409                         if (t3 > 0xf)
 410                                 t3 = 0xf;
 411                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 412                         if (t4 > 0xf)
 413                                 t4 = 0xf;
 414                 }
 415                 else
 416                 {
 417                         if ((value&0xf) > Apwrdelta)
 418                                 t1 = (value&0xf)-(Apwrdelta);
 419                         else
 420                                 t1 = 0;
 421                         if (((value&0xf0)>>4) > Apwrdelta)
 422                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 423                         else
 424                                 t2 = 0;
 425                         if (((value&0xf00)>>8) > Apwrdelta)
 426                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 427                         else
 428                                 t3 = 0;
 429                         if (((value&0xf000)>>12) > Apwrdelta)
 430                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 431                         else
 432                                 t4 = 0;
 433                 }
 434                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 435                 if (bGpwrdeltaMinus == FALSE)
 436                 {
 437                         t1 = (value&0xf)+(Gpwrdelta);
 438                         if (t1 > 0xf)
 439                                 t1 = 0xf;
 440                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 441                         if (t2 > 0xf)
 442                                 t2 = 0xf;
 443                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 444                         if (t3 > 0xf)
 445                                 t3 = 0xf;
 446                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 447                         if (t4 > 0xf)
 448                                 t4 = 0xf;
 449                 }
 450                 else
 451                 {
 452                         if ((value&0xf) > Gpwrdelta)
 453                                 t1 = (value&0xf)-(Gpwrdelta);
 454                         else
 455                                 t1 = 0;
 456                         if (((value&0xf0)>>4) > Gpwrdelta)
 457                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 458                         else
 459                                 t2 = 0;
 460                         if (((value&0xf00)>>8) > Gpwrdelta)
 461                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 462                         else
 463                                 t3 = 0;
 464                         if (((value&0xf000)>>12) > Gpwrdelta)
 465                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 466                         else
 467                                 t4 = 0;
 468                 }
 469                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 470                 data |= (value<<16);
 471
 472                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 473                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 474
 475                 if (data != 0xffffffff)
 476                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 477                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 478         }
 479
 480         //
 481         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 482         //
 483         bValid = TRUE;
 484         for (i=0; i<6; i++)
 485         {
 486                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 487                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 488                 {
 489                         bValid = FALSE;
 490                         break;
 491                 }
 492         }
 493
 494         //
 495         // Get Txpower per MCS for 40MHz in 2.4G.
 496         //
 497         if (bValid)
 498         {
 499                 for (i=0; i<4; i++)
 500                 {
 501                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 502                         if (bGpwrdeltaMinus == FALSE)
 503                         {
 504                                 t1 = (value&0xf)+(Gpwrdelta);
 505                                 if (t1 > 0xf)
 506                                         t1 = 0xf;
 507                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 508                                 if (t2 > 0xf)
 509                                         t2 = 0xf;
 510                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 511                                 if (t3 > 0xf)
 512                                         t3 = 0xf;
 513                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 514                                 if (t4 > 0xf)
 515                                         t4 = 0xf;
 516                         }
 517                         else
 518                         {
 519                                 if ((value&0xf) > Gpwrdelta)
 520                                         t1 = (value&0xf)-(Gpwrdelta);
 521                                 else
 522                                         t1 = 0;
 523                                 if (((value&0xf0)>>4) > Gpwrdelta)
 524                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 525                                 else
 526                                         t2 = 0;
 527                                 if (((value&0xf00)>>8) > Gpwrdelta)
 528                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 529                                 else
 530                                         t3 = 0;
 531                                 if (((value&0xf000)>>12) > Gpwrdelta)
 532                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 533                                 else
 534                                         t4 = 0;
 535                         }
 536                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 537
 538                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 539                         if (bGpwrdeltaMinus == FALSE)
 540                         {
 541                                 t1 = (value&0xf)+(Gpwrdelta);
 542                                 if (t1 > 0xf)
 543                                         t1 = 0xf;
 544                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 545                                 if (t2 > 0xf)
 546                                         t2 = 0xf;
 547                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 548                                 if (t3 > 0xf)
 549                                         t3 = 0xf;
 550                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 551                                 if (t4 > 0xf)
 552                                         t4 = 0xf;
 553                         }
 554                         else
 555                         {
 556                                 if ((value&0xf) > Gpwrdelta)
 557                                         t1 = (value&0xf)-(Gpwrdelta);
 558                                 else
 559                                         t1 = 0;
 560                                 if (((value&0xf0)>>4) > Gpwrdelta)
 561                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 562                                 else
 563                                         t2 = 0;
 564                                 if (((value&0xf00)>>8) > Gpwrdelta)
 565                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 566                                 else
 567                                         t3 = 0;
 568                                 if (((value&0xf000)>>12) > Gpwrdelta)
 569                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 570                                 else
 571                                         t4 = 0;
 572                         }
 573                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 574
 575                         if (i == 0)
 576                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 577                         else
 578                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 579
 580                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 581                 }
 582         }
 583
 584         //
 585         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 586         //
 587         bValid = TRUE;
 588         for (i=0; i<8; i++)
 589         {
 590                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 591                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 592                 {
 593                         bValid = FALSE;
 594                         break;
 595                 }
 596         }
 597
 598         //
 599         // Get Txpower per MCS for 20MHz in 5G.
 600         //
 601         if (bValid)
 602         {
 603                 for (i=0; i<5; i++)
 604                 {
 605                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 606                         if (bApwrdeltaMinus == FALSE)
 607                         {
 608                                 t1 = (value&0xf)+(Apwrdelta);
 609                                 if (t1 > 0xf)
 610                                         t1 = 0xf;
 611                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 612                                 if (t2 > 0xf)
 613                                         t2 = 0xf;
 614                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 615                                 if (t3 > 0xf)
 616                                         t3 = 0xf;
 617                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 618                                 if (t4 > 0xf)
 619                                         t4 = 0xf;
 620                         }
 621                         else
 622                         {
 623                                 if ((value&0xf) > Apwrdelta)
 624                                         t1 = (value&0xf)-(Apwrdelta);
 625                                 else
 626                                         t1 = 0;
 627                                 if (((value&0xf0)>>4) > Apwrdelta)
 628                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 629                                 else
 630                                         t2 = 0;
 631                                 if (((value&0xf00)>>8) > Apwrdelta)
 632                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 633                                 else
 634                                         t3 = 0;
 635                                 if (((value&0xf000)>>12) > Apwrdelta)
 636                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 637                                 else
 638                                         t4 = 0;
 639                         }
 640                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 641
 642                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 643                         if (bApwrdeltaMinus == FALSE)
 644                         {
 645                                 t1 = (value&0xf)+(Apwrdelta);
 646                                 if (t1 > 0xf)
 647                                         t1 = 0xf;
 648                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 649                                 if (t2 > 0xf)
 650                                         t2 = 0xf;
 651                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 652                                 if (t3 > 0xf)
 653                                         t3 = 0xf;
 654                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 655                                 if (t4 > 0xf)
 656                                         t4 = 0xf;
 657                         }
 658                         else
 659                         {
 660                                 if ((value&0xf) > Apwrdelta)
 661                                         t1 = (value&0xf)-(Apwrdelta);
 662                                 else
 663                                         t1 = 0;
 664                                 if (((value&0xf0)>>4) > Apwrdelta)
 665                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 666                                 else
 667                                         t2 = 0;
 668                                 if (((value&0xf00)>>8) > Apwrdelta)
 669                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 670                                 else
 671                                         t3 = 0;
 672                                 if (((value&0xf000)>>12) > Apwrdelta)
 673                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 674                                 else
 675                                         t4 = 0;
 676                         }
 677                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 678
 679                         if (i == 0)
 680                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 681                         else
 682                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 683
 684                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 685                 }
 686         }
 687
 688         //
 689         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 690         //
 691         bValid = TRUE;
 692         for (i=0; i<6; i++)
 693         {
 694                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 695                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 696                 {
 697                         bValid = FALSE;
 698                         break;
 699                 }
 700         }
 701
 702         //
 703         // Get Txpower per MCS for 40MHz in 5G.
 704         //
 705         if (bValid)
 706         {
 707                 for (i=0; i<4; i++)
 708                 {
 709                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 710                         if (bApwrdeltaMinus == FALSE)
 711                         {
 712                                 t1 = (value&0xf)+(Apwrdelta);
 713                                 if (t1 > 0xf)
 714                                         t1 = 0xf;
 715                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 716                                 if (t2 > 0xf)
 717                                         t2 = 0xf;
 718                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 719                                 if (t3 > 0xf)
 720                                         t3 = 0xf;
 721                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 722                                 if (t4 > 0xf)
 723                                         t4 = 0xf;
 724                         }
 725                         else
 726                         {
 727                                 if ((value&0xf) > Apwrdelta)
 728                                         t1 = (value&0xf)-(Apwrdelta);
 729                                 else
 730                                         t1 = 0;
 731                                 if (((value&0xf0)>>4) > Apwrdelta)
 732                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 733                                 else
 734                                         t2 = 0;
 735                                 if (((value&0xf00)>>8) > Apwrdelta)
 736                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 737                                 else
 738                                         t3 = 0;
 739                                 if (((value&0xf000)>>12) > Apwrdelta)
 740                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 741                                 else
 742                                         t4 = 0;
 743                         }
 744                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 745
 746                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 747                         if (bApwrdeltaMinus == FALSE)
 748                         {
 749                                 t1 = (value&0xf)+(Apwrdelta);
 750                                 if (t1 > 0xf)
 751                                         t1 = 0xf;
 752                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 753                                 if (t2 > 0xf)
 754                                         t2 = 0xf;
 755                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 756                                 if (t3 > 0xf)
 757                                         t3 = 0xf;
 758                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 759                                 if (t4 > 0xf)
 760                                         t4 = 0xf;
 761                         }
 762                         else
 763                         {
 764                                 if ((value&0xf) > Apwrdelta)
 765                                         t1 = (value&0xf)-(Apwrdelta);
 766                                 else
 767                                         t1 = 0;
 768                                 if (((value&0xf0)>>4) > Apwrdelta)
 769                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 770                                 else
 771                                         t2 = 0;
 772                                 if (((value&0xf00)>>8) > Apwrdelta)
 773                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 774                                 else
 775                                         t3 = 0;
 776                                 if (((value&0xf000)>>12) > Apwrdelta)
 777                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 778                                 else
 779                                         t4 = 0;
 780                         }
 781                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 782
 783                         if (i == 0)
 784                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 785                         else
 786                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 787
 788                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 789                 }
 790         }
 791 }
 792
 793
 794 /*
 795         ========================================================================
 796
 797         Routine Description:
 798                 Read initial channel power parameters from EEPROM
 799
 800         Arguments:
 801                 Adapter                                         Pointer to our adapter
 802
 803         Return Value:
 804                 None
 805
 806         IRQL = PASSIVE_LEVEL
 807
 808         Note:
 809
 810         ========================================================================
 811 */
 812 VOID    RTMPReadChannelPwr(
 813         IN      PRTMP_ADAPTER   pAd)
 814 {
 815         UCHAR                           i, choffset;
 816         EEPROM_TX_PWR_STRUC         Power;
 817         EEPROM_TX_PWR_STRUC         Power2;
 818
 819         // Read Tx power value for all channels
 820         // Value from 1 - 0x7f. Default value is 24.
 821         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 822         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 823
 824         // 0. 11b/g, ch1 - ch 14
 825         for (i = 0; i < 7; i++)
 826         {
 827                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 828                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 829                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 830                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 831
 832                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 833                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 834                 else
 835                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 836
 837                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 838                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 839                 else
 840                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 841
 842                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 843                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 844                 else
 845                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 846
 847                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 848                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 849                 else
 850                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 851         }
 852
 853         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 854         // 1.1 Fill up channel
 855         choffset = 14;
 856         for (i = 0; i < 4; i++)
 857         {
 858                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 859                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 860                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 861
 862                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 863                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 864                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 865
 866                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 867                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 868                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 869         }
 870
 871         // 1.2 Fill up power
 872         for (i = 0; i < 6; i++)
 873         {
 874                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 875                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 876
 877                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 878                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 879
 880                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 881                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 882
 883                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 884                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 885
 886                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 887                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 888         }
 889
 890         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 891         // 2.1 Fill up channel
 892         choffset = 14 + 12;
 893         for (i = 0; i < 5; i++)
 894         {
 895                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 896                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 897                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 898
 899                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 900                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 901                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 902
 903                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 904                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 905                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 906         }
 907         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 908         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 909         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 910
 911         // 2.2 Fill up power
 912         for (i = 0; i < 8; i++)
 913         {
 914                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 915                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 916
 917                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 918                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 919
 920                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 921                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 922
 923                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 924                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 925
 926                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 927                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 931         // 3.1 Fill up channel
 932         choffset = 14 + 12 + 16;
 933         for (i = 0; i < 2; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
 948         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 949         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 950
 951         // 3.2 Fill up power
 952         for (i = 0; i < 4; i++)
 953         {
 954                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 955                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 956
 957                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 959
 960                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 962
 963                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 965
 966                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 967                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 968         }
 969
 970         // 4. Print and Debug
 971         choffset = 14 + 12 + 16 + 7;
 972
 973
 974 #if 0
 975         // Init the 802.11j channel number for TX channel power
 976         // 0. 20MHz
 977         for (i = 0; i < 3; i++)
 978         {
 979                 pAd->TxPower11J[i].Channel = 8 + i * 4;
 980                 pAd->TxPower11J[i].BW = BW_20;
 981         }
 982
 983         for (i = 0; i < 4; i++)
 984         {
 985                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
 986                 pAd->TxPower11J[i + 3].BW = BW_20;
 987         }
 988
 989         for (i = 0; i < 4; i++)
 990         {
 991                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
 992                 pAd->TxPower11J[i + 7].BW = BW_20;
 993         }
 994
 995         // 0. 10MHz
 996         for (i = 0; i < 2; i++)
 997         {
 998                 pAd->TxPower11J[i + 11].Channel = 7 + i;
 999                 pAd->TxPower11J[i + 11].BW = BW_10;
1000         }
1001         pAd->TxPower11J[13].Channel = 11;
1002         pAd->TxPower11J[13].BW = BW_10;
1003
1004         for (i = 0; i < 3; i++)
1005         {
1006                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1007                 pAd->TxPower11J[i + 14].BW= BW_10;
1008         }
1009
1010         for (i = 0; i < 3; i++)
1011         {
1012                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1013                 pAd->TxPower11J[i + 17].BW = BW_10;
1014         }
1015         for (i = 0; i < 10; i++)
1016         {
1017                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1018                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1019
1020                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1021                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1022
1023                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1024                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1025
1026                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1027                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1028
1029                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1030                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1031         }
1032 #endif
1033 }
1034
1035 /*
1036         ========================================================================
1037
1038         Routine Description:
1039                 Read the following from the registry
1040                 1. All the parameters
1041                 2. NetworkAddres
1042
1043         Arguments:
1044                 Adapter                                         Pointer to our adapter
1045                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1046
1047         Return Value:
1048                 NDIS_STATUS_SUCCESS
1049                 NDIS_STATUS_FAILURE
1050                 NDIS_STATUS_RESOURCES
1051
1052         IRQL = PASSIVE_LEVEL
1053
1054         Note:
1055
1056         ========================================================================
1057 */
1058 NDIS_STATUS     NICReadRegParameters(
1059         IN      PRTMP_ADAPTER           pAd,
1060         IN      NDIS_HANDLE                     WrapperConfigurationContext
1061         )
1062 {
1063         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1064         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1065         return Status;
1066 }
1067
1068
1069
1070
1071 /*
1072         ========================================================================
1073
1074         Routine Description:
1075                 Read initial parameters from EEPROM
1076
1077         Arguments:
1078                 Adapter                                         Pointer to our adapter
1079
1080         Return Value:
1081                 None
1082
1083         IRQL = PASSIVE_LEVEL
1084
1085         Note:
1086
1087         ========================================================================
1088 */
1089 VOID    NICReadEEPROMParameters(
1090         IN      PRTMP_ADAPTER   pAd,
1091         IN      PUCHAR                  mac_addr)
1092 {
1093         UINT32                  data = 0;
1094         USHORT                  i, value, value2;
1095         UCHAR                   TmpPhy;
1096         EEPROM_TX_PWR_STRUC         Power;
1097         EEPROM_VERSION_STRUC    Version;
1098         EEPROM_ANTENNA_STRUC    Antenna;
1099         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1100
1101         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1102
1103         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1104         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1105         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1106
1107         if((data & 0x30) == 0)
1108                 pAd->EEPROMAddressNum = 6;              // 93C46
1109         else if((data & 0x30) == 0x10)
1110                 pAd->EEPROMAddressNum = 8;     // 93C66
1111         else
1112                 pAd->EEPROMAddressNum = 8;     // 93C86
1113         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1114
1115         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1116         // MAC address registers according to E2PROM setting
1117         if (mac_addr == NULL ||
1118                 strlen(mac_addr) != 17 ||
1119                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1120                 mac_addr[11] != ':' || mac_addr[14] != ':')
1121         {
1122                 USHORT  Addr01,Addr23,Addr45 ;
1123
1124                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1125                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1126                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1127
1128                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1129                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1130                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1131                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1132                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1133                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1134
1135                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1136         }
1137         else
1138         {
1139                 INT             j;
1140                 PUCHAR  macptr;
1141
1142                 macptr = mac_addr;
1143
1144                 for (j=0; j<MAC_ADDR_LEN; j++)
1145                 {
1146                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1147                         macptr=macptr+3;
1148                 }
1149
1150                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1151         }
1152
1153
1154         {
1155                 //more conveninet to test mbssid, so ap's bssid &0xf1
1156                 if (pAd->PermanentAddress[0] == 0xff)
1157                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1158
1159                 //if (pAd->PermanentAddress[5] == 0xff)
1160                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1161
1162                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1163                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1164                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1165                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1166                 if (pAd->bLocalAdminMAC == FALSE)
1167                 {
1168                         MAC_DW0_STRUC csr2;
1169                         MAC_DW1_STRUC csr3;
1170                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1171                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1172                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1173                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1174                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1175                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1176                         csr3.word = 0;
1177                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1178                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1179                         csr3.field.U2MeMask = 0xff;
1180                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1181                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1182                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1183                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1184                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1185                 }
1186         }
1187
1188         // if not return early. cause fail at emulation.
1189         // Init the channel number for TX channel power
1190         RTMPReadChannelPwr(pAd);
1191
1192         // if E2PROM version mismatch with driver's expectation, then skip
1193         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1194         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1195         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1196         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1197
1198         if (Version.field.Version > VALID_EEPROM_VERSION)
1199         {
1200                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1201                 /*pAd->SystemErrorBitmap |= 0x00000001;
1202
1203                 // hard-code default value when no proper E2PROM installed
1204                 pAd->bAutoTxAgcA = FALSE;
1205                 pAd->bAutoTxAgcG = FALSE;
1206
1207                 // Default the channel power
1208                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1209                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1210
1211                 // Default the channel power
1212                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1213                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1214
1215                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1216                         pAd->EEPROMDefaultValue[i] = 0xffff;
1217                 return;  */
1218         }
1219
1220         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1221         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1222         pAd->EEPROMDefaultValue[0] = value;
1223
1224         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1225         pAd->EEPROMDefaultValue[1] = value;
1226
1227         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1228         pAd->EEPROMDefaultValue[2] = value;
1229
1230         for(i = 0; i < 8; i++)
1231         {
1232                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1233                 pAd->EEPROMDefaultValue[i+3] = value;
1234         }
1235
1236         // We have to parse NIC configuration 0 at here.
1237         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1238         // Therefore, we have to read TxAutoAgc control beforehand.
1239         // Read Tx AGC control bit
1240         Antenna.word = pAd->EEPROMDefaultValue[0];
1241         if (Antenna.word == 0xFFFF)
1242         {
1243                 Antenna.word = 0;
1244                 Antenna.field.RfIcType = RFIC_2820;
1245                 Antenna.field.TxPath = 1;
1246                 Antenna.field.RxPath = 2;
1247                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1248         }
1249
1250         // Choose the desired Tx&Rx stream.
1251         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1252                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1253
1254         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1255         {
1256                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1257
1258                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1259                         (pAd->CommonCfg.RxStream > 2))
1260                 {
1261                         // only 2 Rx streams for RT2860 series
1262                         pAd->CommonCfg.RxStream = 2;
1263                 }
1264         }
1265
1266         // 3*3
1267         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1268         // yet implement
1269         for(i=0; i<3; i++)
1270         {
1271         }
1272
1273         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1274
1275         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1276         {
1277                 NicConfig2.word = 0;
1278                 if ((NicConfig2.word & 0x00ff) == 0xff)
1279                 {
1280                         NicConfig2.word &= 0xff00;
1281                 }
1282
1283                 if ((NicConfig2.word >> 8) == 0xff)
1284                 {
1285                         NicConfig2.word &= 0x00ff;
1286                 }
1287         }
1288
1289         if (NicConfig2.field.DynamicTxAgcControl == 1)
1290                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1291         else
1292                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1293
1294         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1295
1296         // Save the antenna for future use
1297         pAd->Antenna.word = Antenna.word;
1298
1299         //
1300         // Reset PhyMode if we don't support 802.11a
1301         // Only RFIC_2850 & RFIC_2750 support 802.11a
1302         //
1303         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1304         {
1305                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1306                         (pAd->CommonCfg.PhyMode == PHY_11A))
1307                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1308 #ifdef DOT11_N_SUPPORT
1309                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1310                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1311                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1312                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1313                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1314 #endif // DOT11_N_SUPPORT //
1315         }
1316
1317         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1318         // 0. 11b/g
1319         {
1320                 /* these are tempature reference value (0x00 ~ 0xFE)
1321                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1322                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1323                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1324                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1325                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1326                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1327                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1328                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1329                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1330                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1331                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1332                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1333                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1334                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1335                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1336                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1337                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1338                 pAd->TxAgcStepG = Power.field.Byte1;
1339                 pAd->TxAgcCompensateG = 0;
1340                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1341                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1342
1343                 // Disable TxAgc if the based value is not right
1344                 if (pAd->TssiRefG == 0xff)
1345                         pAd->bAutoTxAgcG = FALSE;
1346
1347                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1348                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1349                         pAd->TssiRefG,
1350                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1351                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1352         }
1353         // 1. 11a
1354         {
1355                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1356                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1357                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1358                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1359                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1360                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1361                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1362                 pAd->TssiRefA   = Power.field.Byte0;
1363                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1364                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1365                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1366                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1367                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1368                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1369                 pAd->TxAgcStepA = Power.field.Byte1;
1370                 pAd->TxAgcCompensateA = 0;
1371                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1372                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1373
1374                 // Disable TxAgc if the based value is not right
1375                 if (pAd->TssiRefA == 0xff)
1376                         pAd->bAutoTxAgcA = FALSE;
1377
1378                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1379                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1380                         pAd->TssiRefA,
1381                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1382                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1383         }
1384         pAd->BbpRssiToDbmDelta = 0x0;
1385
1386         // Read frequency offset setting for RF
1387         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1388         if ((value & 0x00FF) != 0x00FF)
1389                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1390         else
1391                 pAd->RfFreqOffset = 0;
1392         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1393
1394         //CountryRegion byte offset (38h)
1395         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1396         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1397
1398         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1399         {
1400                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1401                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1402                 TmpPhy = pAd->CommonCfg.PhyMode;
1403                 pAd->CommonCfg.PhyMode = 0xff;
1404                 RTMPSetPhyMode(pAd, TmpPhy);
1405 #ifdef DOT11_N_SUPPORT
1406                 SetCommonHT(pAd);
1407 #endif // DOT11_N_SUPPORT //
1408         }
1409
1410         //
1411         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1412         // The valid value are (-10 ~ 10)
1413         //
1414         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1415         pAd->BGRssiOffset0 = value & 0x00ff;
1416         pAd->BGRssiOffset1 = (value >> 8);
1417         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1418         pAd->BGRssiOffset2 = value & 0x00ff;
1419         pAd->ALNAGain1 = (value >> 8);
1420         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1421         pAd->BLNAGain = value & 0x00ff;
1422         pAd->ALNAGain0 = (value >> 8);
1423
1424         // Validate 11b/g RSSI_0 offset.
1425         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1426                 pAd->BGRssiOffset0 = 0;
1427
1428         // Validate 11b/g RSSI_1 offset.
1429         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1430                 pAd->BGRssiOffset1 = 0;
1431
1432         // Validate 11b/g RSSI_2 offset.
1433         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1434                 pAd->BGRssiOffset2 = 0;
1435
1436         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1437         pAd->ARssiOffset0 = value & 0x00ff;
1438         pAd->ARssiOffset1 = (value >> 8);
1439         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1440         pAd->ARssiOffset2 = value & 0x00ff;
1441         pAd->ALNAGain2 = (value >> 8);
1442
1443         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1444                 pAd->ALNAGain1 = pAd->ALNAGain0;
1445         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1446                 pAd->ALNAGain2 = pAd->ALNAGain0;
1447
1448         // Validate 11a RSSI_0 offset.
1449         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1450                 pAd->ARssiOffset0 = 0;
1451
1452         // Validate 11a RSSI_1 offset.
1453         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1454                 pAd->ARssiOffset1 = 0;
1455
1456         //Validate 11a RSSI_2 offset.
1457         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1458                 pAd->ARssiOffset2 = 0;
1459
1460         //
1461         // Get LED Setting.
1462         //
1463         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1464         pAd->LedCntl.word = (value&0xff00) >> 8;
1465         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1466         pAd->Led1 = value;
1467         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1468         pAd->Led2 = value;
1469         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1470         pAd->Led3 = value;
1471
1472         RTMPReadTxPwrPerRate(pAd);
1473
1474         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1475 }
1476
1477 /*
1478         ========================================================================
1479
1480         Routine Description:
1481                 Set default value from EEPROM
1482
1483         Arguments:
1484                 Adapter                                         Pointer to our adapter
1485
1486         Return Value:
1487                 None
1488
1489         IRQL = PASSIVE_LEVEL
1490
1491         Note:
1492
1493         ========================================================================
1494 */
1495 VOID    NICInitAsicFromEEPROM(
1496         IN      PRTMP_ADAPTER   pAd)
1497 {
1498         UINT32                                  data = 0;
1499         UCHAR   BBPR1 = 0;
1500         USHORT                                  i;
1501         EEPROM_ANTENNA_STRUC    Antenna;
1502         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1503         UCHAR   BBPR3 = 0;
1504
1505         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1506         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1507         {
1508                 UCHAR BbpRegIdx, BbpValue;
1509
1510                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1511                 {
1512                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1513                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1514                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1515                 }
1516         }
1517
1518         Antenna.word = pAd->Antenna.word;
1519         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1520         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1521
1522         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1523
1524
1525         // Save the antenna for future use
1526         pAd->NicConfig2.word = NicConfig2.word;
1527
1528         //
1529         // Send LED Setting to MCU.
1530         //
1531         if (pAd->LedCntl.word == 0xFF)
1532         {
1533                 pAd->LedCntl.word = 0x01;
1534                 pAd->Led1 = 0x5555;
1535                 pAd->Led2 = 0x2221;
1536                 pAd->Led3 = 0xA9F8;
1537         }
1538
1539         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1540         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1541         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1542     pAd->LedIndicatorStregth = 0xFF;
1543     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1544
1545         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1546         {
1547                 // Read Hardware controlled Radio state enable bit
1548                 if (NicConfig2.field.HardwareRadioControl == 1)
1549                 {
1550                         pAd->StaCfg.bHardwareRadio = TRUE;
1551
1552                         // Read GPIO pin2 as Hardware controlled radio state
1553                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1554                         if ((data & 0x04) == 0)
1555                         {
1556                                 pAd->StaCfg.bHwRadio = FALSE;
1557                                 pAd->StaCfg.bRadio = FALSE;
1558                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1559                         }
1560                 }
1561                 else
1562                         pAd->StaCfg.bHardwareRadio = FALSE;
1563
1564                 if (pAd->StaCfg.bRadio == FALSE)
1565                 {
1566                         RTMPSetLED(pAd, LED_RADIO_OFF);
1567                 }
1568                 else
1569                 {
1570                         RTMPSetLED(pAd, LED_RADIO_ON);
1571                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1572                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1573                         // 2-1. wait command ok.
1574                         AsicCheckCommanOk(pAd, PowerWakeCID);
1575                 }
1576         }
1577
1578         // Turn off patching for cardbus controller
1579         if (NicConfig2.field.CardbusAcceleration == 1)
1580         {
1581         }
1582
1583         if (NicConfig2.field.DynamicTxAgcControl == 1)
1584                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1585         else
1586                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1587         //
1588         // Since BBP has been progamed, to make sure BBP setting will be
1589         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1590         //
1591         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1592
1593         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1594         BBPR3 &= (~0x18);
1595         if(pAd->Antenna.field.RxPath == 3)
1596         {
1597                 BBPR3 |= (0x10);
1598         }
1599         else if(pAd->Antenna.field.RxPath == 2)
1600         {
1601                 BBPR3 |= (0x8);
1602         }
1603         else if(pAd->Antenna.field.RxPath == 1)
1604         {
1605                 BBPR3 |= (0x0);
1606         }
1607         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1608
1609         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1610         {
1611                 // Handle the difference when 1T
1612                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1613                 if(pAd->Antenna.field.TxPath == 1)
1614                 {
1615                 BBPR1 &= (~0x18);
1616                 }
1617                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1618
1619                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1620         }
1621
1622         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1623         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1624 }
1625
1626 /*
1627         ========================================================================
1628
1629         Routine Description:
1630                 Initialize NIC hardware
1631
1632         Arguments:
1633                 Adapter                                         Pointer to our adapter
1634
1635         Return Value:
1636                 None
1637
1638         IRQL = PASSIVE_LEVEL
1639
1640         Note:
1641
1642         ========================================================================
1643 */
1644 NDIS_STATUS     NICInitializeAdapter(
1645         IN      PRTMP_ADAPTER   pAd,
1646         IN   BOOLEAN    bHardReset)
1647 {
1648         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1649         WPDMA_GLO_CFG_STRUC     GloCfg;
1650         UINT32                  Value;
1651         DELAY_INT_CFG_STRUC     IntCfg;
1652         ULONG   i =0, j=0;
1653         AC_TXOP_CSR0_STRUC      csr0;
1654
1655         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1656
1657         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1658 retry:
1659         i = 0;
1660         do
1661         {
1662                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1663                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1664                         break;
1665
1666                 RTMPusecDelay(1000);
1667                 i++;
1668         }while ( i<100);
1669         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1670         GloCfg.word &= 0xff0;
1671         GloCfg.field.EnTXWriteBackDDONE =1;
1672         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1673
1674         // Record HW Beacon offset
1675         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1676         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1677         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1678         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1679         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1680         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1681         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1682         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1683
1684         //
1685         // write all shared Ring's base address into ASIC
1686         //
1687
1688         // asic simulation sequence put this ahead before loading firmware.
1689         // pbf hardware reset
1690         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1691         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1692         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1693
1694         // Initialze ASIC for TX & Rx operation
1695         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1696         {
1697                 if (j++ == 0)
1698                 {
1699                         NICLoadFirmware(pAd);
1700                         goto retry;
1701                 }
1702                 return NDIS_STATUS_FAILURE;
1703         }
1704
1705
1706         // Write AC_BK base address register
1707         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1708         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1709         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1710
1711         // Write AC_BE base address register
1712         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1713         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1714         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1715
1716         // Write AC_VI base address register
1717         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1718         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1719         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1720
1721         // Write AC_VO base address register
1722         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1723         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1724         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1725
1726         // Write HCCA base address register
1727           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1728           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1729         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1730
1731         // Write MGMT_BASE_CSR register
1732         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1733         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1734         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1735
1736         // Write RX_BASE_CSR register
1737         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1738         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1739         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1740
1741         // Init RX Ring index pointer
1742         pAd->RxRing.RxSwReadIdx = 0;
1743         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1744         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1745
1746         // Init TX rings index pointer
1747         {
1748                 for (i=0; i<NUM_OF_TX_RING; i++)
1749                 {
1750                         pAd->TxRing[i].TxSwFreeIdx = 0;
1751                         pAd->TxRing[i].TxCpuIdx = 0;
1752                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1753                 }
1754         }
1755
1756         // init MGMT ring index pointer
1757         pAd->MgmtRing.TxSwFreeIdx = 0;
1758         pAd->MgmtRing.TxCpuIdx = 0;
1759         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1760
1761         //
1762         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1763         //
1764
1765         // Write TX_RING_CSR0 register
1766         Value = TX_RING_SIZE;
1767         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1768         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1769         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1770         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1771         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1772         Value = MGMT_RING_SIZE;
1773         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1774
1775         // Write RX_RING_CSR register
1776         Value = RX_RING_SIZE;
1777         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1778
1779
1780         // WMM parameter
1781         csr0.word = 0;
1782         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1783         if (pAd->CommonCfg.PhyMode == PHY_11B)
1784         {
1785                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1786                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1787         }
1788         else
1789         {
1790                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1791                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1792         }
1793         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1794
1795
1796         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1797         i = 0;
1798         do
1799         {
1800                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1801                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1802                         break;
1803
1804                 RTMPusecDelay(1000);
1805                 i++;
1806         }while ( i < 100);
1807
1808         GloCfg.word &= 0xff0;
1809         GloCfg.field.EnTXWriteBackDDONE =1;
1810         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1811
1812         IntCfg.word = 0;
1813         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1814
1815
1816         // reset action
1817         // Load firmware
1818         //  Status = NICLoadFirmware(pAd);
1819
1820         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1821         return Status;
1822 }
1823
1824 /*
1825         ========================================================================
1826
1827         Routine Description:
1828                 Initialize ASIC
1829
1830         Arguments:
1831                 Adapter                                         Pointer to our adapter
1832
1833         Return Value:
1834                 None
1835
1836         IRQL = PASSIVE_LEVEL
1837
1838         Note:
1839
1840         ========================================================================
1841 */
1842 NDIS_STATUS     NICInitializeAsic(
1843         IN      PRTMP_ADAPTER   pAd,
1844         IN  BOOLEAN             bHardReset)
1845 {
1846         ULONG                   Index = 0;
1847         UCHAR                   R0 = 0xff;
1848         UINT32                  MacCsr12 = 0, Counter = 0;
1849         USHORT                  KeyIdx;
1850         INT                             i,apidx;
1851
1852         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1853
1854         if (bHardReset == TRUE)
1855         {
1856                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1857         }
1858         else
1859                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1860
1861         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1862         // Initialize MAC register to default value
1863         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1864         {
1865                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1866         }
1867
1868
1869         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1870         {
1871                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1872                 {
1873                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1874                 }
1875         }
1876
1877         //
1878         // Before program BBP, we need to wait BBP/RF get wake up.
1879         //
1880         Index = 0;
1881         do
1882         {
1883                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1884
1885                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1886                         break;
1887
1888                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1889                 RTMPusecDelay(1000);
1890         } while (Index++ < 100);
1891
1892     // The commands to firmware should be after these commands, these commands will init firmware
1893         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1894         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1895         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1896         RTMPusecDelay(1000);
1897
1898         // Read BBP register, make sure BBP is up and running before write new data
1899         Index = 0;
1900         do
1901         {
1902                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1903                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1904         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1905         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1906
1907         if ((R0 == 0xff) || (R0 == 0x00))
1908                 return NDIS_STATUS_FAILURE;
1909
1910         // Initialize BBP register to default value
1911         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1912         {
1913                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1914         }
1915
1916         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1917         if ((pAd->MACVersion&0xffff) != 0x0101)
1918                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1919
1920
1921         if (pAd->MACVersion == 0x28600100)
1922         {
1923                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1924                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1925     }
1926
1927         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1928         {
1929                 // enlarge MAX_LEN_CFG
1930                 UINT32 csr;
1931                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1932                 csr &= 0xFFF;
1933                 csr |= 0x2000;
1934                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1935         }
1936
1937
1938         // Add radio off control
1939         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1940         {
1941                 if (pAd->StaCfg.bRadio == FALSE)
1942                 {
1943 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1944                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1945                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1946                 }
1947         }
1948
1949         // Clear raw counters
1950         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1951         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1952         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1953         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1954         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1955         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1956
1957         // ASIC will keep garbage value after boot
1958         // Clear all seared key table when initial
1959         // This routine can be ignored in radio-ON/OFF operation.
1960         if (bHardReset)
1961         {
1962                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1963                 {
1964                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1965                 }
1966
1967                 // Clear all pairwise key table when initial
1968                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1969                 {
1970                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1971                 }
1972         }
1973
1974
1975         // It isn't necessary to clear this space when not hard reset.
1976         if (bHardReset == TRUE)
1977         {
1978                 // clear all on-chip BEACON frame space
1979                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1980                 {
1981                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1982                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1983                 }
1984         }
1985
1986         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1987         {
1988                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1989                 if ((pAd->MACVersion&0xffff) != 0x0101)
1990                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1991         }
1992
1993         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1994         return NDIS_STATUS_SUCCESS;
1995 }
1996
1997
1998 VOID NICRestoreBBPValue(
1999         IN PRTMP_ADAPTER pAd)
2000 {
2001         UCHAR           index;
2002         UCHAR           Value = 0;
2003         ULONG           Data;
2004
2005         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2006         // Initialize BBP register to default value (rtmp_init.c)
2007         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2008         {
2009                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2010         }
2011         // copy from (rtmp_init.c)
2012         if (pAd->MACVersion == 0x28600100)
2013         {
2014                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2015                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2016         }
2017
2018         // copy from (connect.c LinkUp function)
2019         if (INFRA_ON(pAd))
2020         {
2021                 // Change to AP channel
2022                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2023                 {
2024                         // Must using 40MHz.
2025                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2026                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2027                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2028
2029                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2030                         Value &= (~0x18);
2031                         Value |= 0x10;
2032                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2033
2034                         //  RX : control channel at lower
2035                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2036                         Value &= (~0x20);
2037                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2038                         // Record BBPR3 setting, But don't keep R Antenna # information.
2039                         pAd->StaCfg.BBPR3 = Value;
2040
2041                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2042                         Data &= 0xfffffffe;
2043                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2044
2045                         if (pAd->MACVersion == 0x28600100)
2046                         {
2047                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2048                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2049                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2050                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2051                         }
2052
2053                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2054                 }
2055                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2056                 {
2057                         // Must using 40MHz.
2058                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2059                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2060                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2061
2062                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2063                         Value &= (~0x18);
2064                         Value |= 0x10;
2065                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2066
2067                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2068                         Data |= 0x1;
2069                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2070
2071                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2072                         Value |= (0x20);
2073                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2074                         // Record BBPR3 setting, But don't keep R Antenna # information.
2075                         pAd->StaCfg.BBPR3 = Value;
2076
2077                         if (pAd->MACVersion == 0x28600100)
2078                         {
2079                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2080                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2081                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2082                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2083                         }
2084
2085                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2086                 }
2087                 else
2088                 {
2089                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2090                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2091                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2092
2093                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2094                         Value &= (~0x18);
2095                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2096
2097                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2098                         Data &= 0xfffffffe;
2099                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2100
2101                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2102                         Value &= (~0x20);
2103                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2104                         // Record BBPR3 setting, But don't keep R Antenna # information.
2105                         pAd->StaCfg.BBPR3 = Value;
2106
2107                         if (pAd->MACVersion == 0x28600100)
2108                         {
2109                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2110                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2111                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2112                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2113                         }
2114
2115                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2116                 }
2117         }
2118
2119         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2120 }
2121
2122 /*
2123         ========================================================================
2124
2125         Routine Description:
2126                 Reset NIC Asics
2127
2128         Arguments:
2129                 Adapter                                         Pointer to our adapter
2130
2131         Return Value:
2132                 None
2133
2134         IRQL = PASSIVE_LEVEL
2135
2136         Note:
2137                 Reset NIC to initial state AS IS system boot up time.
2138
2139         ========================================================================
2140 */
2141 VOID    NICIssueReset(
2142         IN      PRTMP_ADAPTER   pAd)
2143 {
2144         UINT32  Value = 0;
2145         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2146
2147         // Disable Rx, register value supposed will remain after reset
2148         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2149         Value &= (0xfffffff3);
2150         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2151
2152         // Issue reset and clear from reset state
2153         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2154         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2155
2156         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2157 }
2158
2159 /*
2160         ========================================================================
2161
2162         Routine Description:
2163                 Check ASIC registers and find any reason the system might hang
2164
2165         Arguments:
2166                 Adapter                                         Pointer to our adapter
2167
2168         Return Value:
2169                 None
2170
2171         IRQL = DISPATCH_LEVEL
2172
2173         ========================================================================
2174 */
2175 BOOLEAN NICCheckForHang(
2176         IN      PRTMP_ADAPTER   pAd)
2177 {
2178         return (FALSE);
2179 }
2180
2181 VOID NICUpdateFifoStaCounters(
2182         IN PRTMP_ADAPTER pAd)
2183 {
2184         TX_STA_FIFO_STRUC       StaFifo;
2185         MAC_TABLE_ENTRY         *pEntry;
2186         UCHAR                           i = 0;
2187         UCHAR                   pid = 0, wcid = 0;
2188         CHAR                            reTry;
2189         UCHAR                           succMCS;
2190
2191                 do
2192                 {
2193                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2194
2195                         if (StaFifo.field.bValid == 0)
2196                                 break;
2197
2198                         wcid = (UCHAR)StaFifo.field.wcid;
2199
2200
2201                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2202                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2203                         {
2204                                 i++;
2205                                 continue;
2206                         }
2207
2208                         /* PID store Tx MCS Rate */
2209                         pid = (UCHAR)StaFifo.field.PidType;
2210
2211                         pEntry = &pAd->MacTab.Content[wcid];
2212
2213                         pEntry->DebugFIFOCount++;
2214
2215 #ifdef DOT11_N_SUPPORT
2216                         if (StaFifo.field.TxBF) // 3*3
2217                                 pEntry->TxBFCount++;
2218 #endif // DOT11_N_SUPPORT //
2219
2220 #ifdef UAPSD_AP_SUPPORT
2221                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2222 #endif // UAPSD_AP_SUPPORT //
2223
2224                         if (!StaFifo.field.TxSuccess)
2225                         {
2226                                 pEntry->FIFOCount++;
2227                                 pEntry->OneSecTxFailCount++;
2228
2229                                 if (pEntry->FIFOCount >= 1)
2230                                 {
2231                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2232 #if 0
2233                                         SendRefreshBAR(pAd, pEntry);
2234                                         pEntry->NoBADataCountDown = 64;
2235 #else
2236 #ifdef DOT11_N_SUPPORT
2237                                         pEntry->NoBADataCountDown = 64;
2238 #endif // DOT11_N_SUPPORT //
2239
2240                                         if(pEntry->PsMode == PWR_ACTIVE)
2241                                         {
2242 #ifdef DOT11_N_SUPPORT
2243                                                 int tid;
2244                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2245                                                 {
2246                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2247                                                 }
2248 #endif // DOT11_N_SUPPORT //
2249
2250                                                 // Update the continuous transmission counter except PS mode
2251                                                 pEntry->ContinueTxFailCnt++;
2252                                         }
2253                                         else
2254                                         {
2255                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2256                                                 //     this tx error happened due to sta just go to sleep.
2257                                                 pEntry->FIFOCount = 0;
2258                                                 pEntry->ContinueTxFailCnt = 0;
2259                                         }
2260 #endif
2261                                         //pEntry->FIFOCount = 0;
2262                                 }
2263                                 //pEntry->bSendBAR = TRUE;
2264                         }
2265                         else
2266                         {
2267 #ifdef DOT11_N_SUPPORT
2268                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2269                                 {
2270                                         pEntry->NoBADataCountDown--;
2271                                         if (pEntry->NoBADataCountDown==0)
2272                                         {
2273                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2274                                         }
2275                                 }
2276 #endif // DOT11_N_SUPPORT //
2277                                 pEntry->FIFOCount = 0;
2278                                 pEntry->OneSecTxNoRetryOkCount++;
2279                                 // update NoDataIdleCount when sucessful send packet to STA.
2280                                 pEntry->NoDataIdleCount = 0;
2281                                 pEntry->ContinueTxFailCnt = 0;
2282                         }
2283
2284                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2285
2286                         reTry = pid - succMCS;
2287
2288                         if (StaFifo.field.TxSuccess)
2289                         {
2290                                 pEntry->TXMCSExpected[pid]++;
2291                                 if (pid == succMCS)
2292                                 {
2293                                         pEntry->TXMCSSuccessful[pid]++;
2294                                 }
2295                                 else
2296                                 {
2297                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2298                                 }
2299                         }
2300                         else
2301                         {
2302                                 pEntry->TXMCSFailed[pid]++;
2303                         }
2304
2305                         if (reTry > 0)
2306                         {
2307                                 if ((pid >= 12) && succMCS <=7)
2308                                 {
2309                                         reTry -= 4;
2310                                 }
2311                                 pEntry->OneSecTxRetryOkCount += reTry;
2312                         }
2313
2314                         i++;
2315                         // ASIC store 16 stack
2316                 } while ( i < (2*TX_RING_SIZE) );
2317
2318 }
2319
2320 /*
2321         ========================================================================
2322
2323         Routine Description:
2324                 Read statistical counters from hardware registers and record them
2325                 in software variables for later on query
2326
2327         Arguments:
2328                 pAd                                     Pointer to our adapter
2329
2330         Return Value:
2331                 None
2332
2333         IRQL = DISPATCH_LEVEL
2334
2335         ========================================================================
2336 */
2337 VOID NICUpdateRawCounters(
2338         IN PRTMP_ADAPTER pAd)
2339 {
2340         UINT32  OldValue;
2341         RX_STA_CNT0_STRUC        RxStaCnt0;
2342         RX_STA_CNT1_STRUC   RxStaCnt1;
2343         RX_STA_CNT2_STRUC   RxStaCnt2;
2344         TX_STA_CNT0_STRUC        TxStaCnt0;
2345         TX_STA_CNT1_STRUC        StaTx1;
2346         TX_STA_CNT2_STRUC        StaTx2;
2347         TX_AGG_CNT_STRUC        TxAggCnt;
2348         TX_AGG_CNT0_STRUC       TxAggCnt0;
2349         TX_AGG_CNT1_STRUC       TxAggCnt1;
2350         TX_AGG_CNT2_STRUC       TxAggCnt2;
2351         TX_AGG_CNT3_STRUC       TxAggCnt3;
2352         TX_AGG_CNT4_STRUC       TxAggCnt4;
2353         TX_AGG_CNT5_STRUC       TxAggCnt5;
2354         TX_AGG_CNT6_STRUC       TxAggCnt6;
2355         TX_AGG_CNT7_STRUC       TxAggCnt7;
2356
2357         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2358         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2359
2360         {
2361                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2362             // Update RX PLCP error counter
2363             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2364                 // Update False CCA counter
2365                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2366         }
2367
2368         // Update FCS counters
2369         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2370         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2371         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2372                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2373
2374         // Add FCS error count to private counters
2375         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2376         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2377         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2378         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2379                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2380
2381         // Update Duplicate Rcv check
2382         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2383         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2384         // Update RX Overflow counter
2385         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2386
2387         if (!pAd->bUpdateBcnCntDone)
2388         {
2389         // Update BEACON sent count
2390         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2391         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2392         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2393         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2394         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2395         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2396         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2397         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2398         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2399         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2400         }
2401
2402         {
2403                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2404                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2405                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2406                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2407                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2408                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2409                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2410                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2411                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2412                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2413                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2414                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2415                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2416
2417                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2418                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2419                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2420                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2421
2422                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2423                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2424                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2425                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2426
2427                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2428                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2429                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2430                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2431
2432                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2433                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2434
2435                 // Calculate the transmitted A-MPDU count
2436                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2437                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2438
2439                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2440                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2441
2442                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2443                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2444
2445                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2446                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2447
2448                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2449                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2450
2451                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2452                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2453
2454                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2455                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2456
2457                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2458                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2459         }
2460
2461 #ifdef DBG_DIAGNOSE
2462         {
2463                 RtmpDiagStruct  *pDiag;
2464                 COUNTER_RALINK  *pRalinkCounters;
2465                 UCHAR                   ArrayCurIdx, i;
2466
2467                 pDiag = &pAd->DiagStruct;
2468                 pRalinkCounters = &pAd->RalinkCounters;
2469                 ArrayCurIdx = pDiag->ArrayCurIdx;
2470
2471                 if (pDiag->inited == 0)
2472                 {
2473                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2474                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2475                         pDiag->inited = 1;
2476                 }
2477                 else
2478                 {
2479                         // Tx
2480                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2481                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2482                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2483                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2484                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2485                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2486                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2487                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2488                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2489                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2490                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2491                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2492                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2493                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2494                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2495                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2496                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2497                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2498                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2499
2500                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2501
2502                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2503                         ArrayCurIdx = pDiag->ArrayCurIdx;
2504                         for (i =0; i < 9; i++)
2505                         {
2506                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2507                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2508                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2509                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2510                         }
2511                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2512                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2513                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2514                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2515                         for (i = 9; i < 24; i++) // 3*3
2516                         {
2517                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2518                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2519                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2520 }
2521
2522                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2523                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2524                 }
2525
2526         }
2527 #endif // DBG_DIAGNOSE //
2528
2529
2530 }
2531
2532
2533 /*
2534         ========================================================================
2535
2536         Routine Description:
2537                 Reset NIC from error
2538
2539         Arguments:
2540                 Adapter                                         Pointer to our adapter
2541
2542         Return Value:
2543                 None
2544
2545         IRQL = PASSIVE_LEVEL
2546
2547         Note:
2548                 Reset NIC from error state
2549
2550         ========================================================================
2551 */
2552 VOID    NICResetFromError(
2553         IN      PRTMP_ADAPTER   pAd)
2554 {
2555         // Reset BBP (according to alex, reset ASIC will force reset BBP
2556         // Therefore, skip the reset BBP
2557         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2558
2559         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2560         // Remove ASIC from reset state
2561         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2562
2563         NICInitializeAdapter(pAd, FALSE);
2564         NICInitAsicFromEEPROM(pAd);
2565
2566         // Switch to current channel, since during reset process, the connection should remains on.
2567         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2568         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2569 }
2570
2571 /*
2572         ========================================================================
2573
2574         Routine Description:
2575                 erase 8051 firmware image in MAC ASIC
2576
2577         Arguments:
2578                 Adapter                                         Pointer to our adapter
2579
2580         IRQL = PASSIVE_LEVEL
2581
2582         ========================================================================
2583 */
2584 VOID NICEraseFirmware(
2585         IN PRTMP_ADAPTER pAd)
2586 {
2587         ULONG i;
2588
2589         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2590                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2591
2592 }/* End of NICEraseFirmware */
2593
2594 /*
2595         ========================================================================
2596
2597         Routine Description:
2598                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2599
2600         Arguments:
2601                 Adapter                                         Pointer to our adapter
2602
2603         Return Value:
2604                 NDIS_STATUS_SUCCESS         firmware image load ok
2605                 NDIS_STATUS_FAILURE         image not found
2606
2607         IRQL = PASSIVE_LEVEL
2608
2609         ========================================================================
2610 */
2611 NDIS_STATUS NICLoadFirmware(
2612         IN PRTMP_ADAPTER pAd)
2613 {
2614         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2615         PUCHAR                  pFirmwareImage;
2616         ULONG                   FileLength, Index;
2617         //ULONG                 firm;
2618         UINT32                  MacReg = 0;
2619
2620         pFirmwareImage = FirmwareImage;
2621         FileLength = sizeof(FirmwareImage);
2622         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2623
2624         /* check if MCU is ready */
2625         Index = 0;
2626         do
2627         {
2628                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2629
2630                 if (MacReg & 0x80)
2631                         break;
2632
2633                 RTMPusecDelay(1000);
2634         } while (Index++ < 1000);
2635
2636     if (Index >= 1000)
2637         {
2638                 Status = NDIS_STATUS_FAILURE;
2639                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2640         } /* End of if */
2641
2642     DBGPRINT(RT_DEBUG_TRACE,
2643                          ("<=== %s (status=%d)\n", __func__, Status));
2644     return Status;
2645 } /* End of NICLoadFirmware */
2646
2647
2648 /*
2649         ========================================================================
2650
2651         Routine Description:
2652                 Load Tx rate switching parameters
2653
2654         Arguments:
2655                 Adapter                                         Pointer to our adapter
2656
2657         Return Value:
2658                 NDIS_STATUS_SUCCESS         firmware image load ok
2659                 NDIS_STATUS_FAILURE         image not found
2660
2661         IRQL = PASSIVE_LEVEL
2662
2663         Rate Table Format:
2664                 1. (B0: Valid Item number) (B1:Initial item from zero)
2665                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2666
2667         ========================================================================
2668 */
2669 NDIS_STATUS NICLoadRateSwitchingParams(
2670         IN PRTMP_ADAPTER pAd)
2671 {
2672         return NDIS_STATUS_SUCCESS;
2673 }
2674
2675 /*
2676         ========================================================================
2677
2678         Routine Description:
2679                 if  pSrc1 all zero with length Length, return 0.
2680                 If not all zero, return 1
2681
2682         Arguments:
2683                 pSrc1
2684
2685         Return Value:
2686                 1:                      not all zero
2687                 0:                      all zero
2688
2689         IRQL = DISPATCH_LEVEL
2690
2691         Note:
2692
2693         ========================================================================
2694 */
2695 ULONG   RTMPNotAllZero(
2696         IN      PVOID   pSrc1,
2697         IN      ULONG   Length)
2698 {
2699         PUCHAR  pMem1;
2700         ULONG   Index = 0;
2701
2702         pMem1 = (PUCHAR) pSrc1;
2703
2704         for (Index = 0; Index < Length; Index++)
2705         {
2706                 if (pMem1[Index] != 0x0)
2707                 {
2708                         break;
2709                 }
2710         }
2711
2712         if (Index == Length)
2713         {
2714                 return (0);
2715         }
2716         else
2717         {
2718                 return (1);
2719         }
2720 }
2721
2722 /*
2723         ========================================================================
2724
2725         Routine Description:
2726                 Compare two memory block
2727
2728         Arguments:
2729                 pSrc1           Pointer to first memory address
2730                 pSrc2           Pointer to second memory address
2731
2732         Return Value:
2733                 0:                      memory is equal
2734                 1:                      pSrc1 memory is larger
2735                 2:                      pSrc2 memory is larger
2736
2737         IRQL = DISPATCH_LEVEL
2738
2739         Note:
2740
2741         ========================================================================
2742 */
2743 ULONG   RTMPCompareMemory(
2744         IN      PVOID   pSrc1,
2745         IN      PVOID   pSrc2,
2746         IN      ULONG   Length)
2747 {
2748         PUCHAR  pMem1;
2749         PUCHAR  pMem2;
2750         ULONG   Index = 0;
2751
2752         pMem1 = (PUCHAR) pSrc1;
2753         pMem2 = (PUCHAR) pSrc2;
2754
2755         for (Index = 0; Index < Length; Index++)
2756         {
2757                 if (pMem1[Index] > pMem2[Index])
2758                         return (1);
2759                 else if (pMem1[Index] < pMem2[Index])
2760                         return (2);
2761         }
2762
2763         // Equal
2764         return (0);
2765 }
2766
2767 /*
2768         ========================================================================
2769
2770         Routine Description:
2771                 Zero out memory block
2772
2773         Arguments:
2774                 pSrc1           Pointer to memory address
2775                 Length          Size
2776
2777         Return Value:
2778                 None
2779
2780         IRQL = PASSIVE_LEVEL
2781         IRQL = DISPATCH_LEVEL
2782
2783         Note:
2784
2785         ========================================================================
2786 */
2787 VOID    RTMPZeroMemory(
2788         IN      PVOID   pSrc,
2789         IN      ULONG   Length)
2790 {
2791         PUCHAR  pMem;
2792         ULONG   Index = 0;
2793
2794         pMem = (PUCHAR) pSrc;
2795
2796         for (Index = 0; Index < Length; Index++)
2797         {
2798                 pMem[Index] = 0x00;
2799         }
2800 }
2801
2802 VOID    RTMPFillMemory(
2803         IN      PVOID   pSrc,
2804         IN      ULONG   Length,
2805         IN      UCHAR   Fill)
2806 {
2807         PUCHAR  pMem;
2808         ULONG   Index = 0;
2809
2810         pMem = (PUCHAR) pSrc;
2811
2812         for (Index = 0; Index < Length; Index++)
2813         {
2814                 pMem[Index] = Fill;
2815         }
2816 }
2817
2818 /*
2819         ========================================================================
2820
2821         Routine Description:
2822                 Copy data from memory block 1 to memory block 2
2823
2824         Arguments:
2825                 pDest           Pointer to destination memory address
2826                 pSrc            Pointer to source memory address
2827                 Length          Copy size
2828
2829         Return Value:
2830                 None
2831
2832         IRQL = PASSIVE_LEVEL
2833         IRQL = DISPATCH_LEVEL
2834
2835         Note:
2836
2837         ========================================================================
2838 */
2839 VOID    RTMPMoveMemory(
2840         OUT     PVOID   pDest,
2841         IN      PVOID   pSrc,
2842         IN      ULONG   Length)
2843 {
2844         PUCHAR  pMem1;
2845         PUCHAR  pMem2;
2846         UINT    Index;
2847
2848         ASSERT((Length==0) || (pDest && pSrc));
2849
2850         pMem1 = (PUCHAR) pDest;
2851         pMem2 = (PUCHAR) pSrc;
2852
2853         for (Index = 0; Index < Length; Index++)
2854         {
2855                 pMem1[Index] = pMem2[Index];
2856         }
2857 }
2858
2859 /*
2860         ========================================================================
2861
2862         Routine Description:
2863                 Initialize port configuration structure
2864
2865         Arguments:
2866                 Adapter                                         Pointer to our adapter
2867
2868         Return Value:
2869                 None
2870
2871         IRQL = PASSIVE_LEVEL
2872
2873         Note:
2874
2875         ========================================================================
2876 */
2877 VOID    UserCfgInit(
2878         IN      PRTMP_ADAPTER pAd)
2879 {
2880     UINT key_index, bss_index;
2881
2882         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2883
2884         //
2885         //  part I. intialize common configuration
2886         //
2887
2888         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2889         {
2890                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2891                 {
2892                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2893                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2894                 }
2895         }
2896
2897         pAd->Antenna.word = 0;
2898         pAd->CommonCfg.BBPCurrentBW = BW_20;
2899
2900         pAd->LedCntl.word = 0;
2901         pAd->LedIndicatorStregth = 0;
2902         pAd->RLnkCtrlOffset = 0;
2903         pAd->HostLnkCtrlOffset = 0;
2904         pAd->CheckDmaBusyCount = 0;
2905
2906         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2907         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2908         pAd->RfIcType = RFIC_2820;
2909
2910         // Init timer for reset complete event
2911         pAd->CommonCfg.CentralChannel = 1;
2912         pAd->bForcePrintTX = FALSE;
2913         pAd->bForcePrintRX = FALSE;
2914         pAd->bStaFifoTest = FALSE;
2915         pAd->bProtectionTest = FALSE;
2916         pAd->bHCCATest = FALSE;
2917         pAd->bGenOneHCCA = FALSE;
2918         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2919         pAd->CommonCfg.TxPower = 100; //mW
2920         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2921         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2922         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2923         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2924         pAd->CommonCfg.RtsThreshold = 2347;
2925         pAd->CommonCfg.FragmentThreshold = 2346;
2926         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2927         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2928         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2929         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2930         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2931         pAd->CommonCfg.RadarDetect.CSCount = 0;
2932         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2933         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2934         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2935         pAd->CommonCfg.bAPSDCapable = FALSE;
2936         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2937         pAd->CommonCfg.TriggerTimerCount = 0;
2938         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2939         pAd->CommonCfg.bCountryFlag = FALSE;
2940         pAd->CommonCfg.TxStream = 0;
2941         pAd->CommonCfg.RxStream = 0;
2942
2943         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2944
2945 #ifdef DOT11_N_SUPPORT
2946         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2947         pAd->HTCEnable = FALSE;
2948         pAd->bBroadComHT = FALSE;
2949         pAd->CommonCfg.bRdg = FALSE;
2950
2951         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2952         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2953         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2954         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2955         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2956         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2957         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2958
2959         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2960         BATableInit(pAd, &pAd->BATable);
2961
2962         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2963         pAd->CommonCfg.bHTProtect = 1;
2964         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2965         pAd->CommonCfg.bBADecline = FALSE;
2966         pAd->CommonCfg.bDisableReordering = FALSE;
2967
2968         pAd->CommonCfg.TxBASize = 7;
2969
2970         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2971 #endif // DOT11_N_SUPPORT //
2972
2973         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2974         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2975         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2976         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2977         pAd->CommonCfg.TxRate = RATE_6;
2978
2979         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2980         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2981         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2982
2983         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2984
2985         //
2986         // part II. intialize STA specific configuration
2987         //
2988         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2989         {
2990                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2991                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2992                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2993                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2994
2995                 pAd->StaCfg.Psm = PWR_ACTIVE;
2996
2997                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2998                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2999                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3000                 pAd->StaCfg.bMixCipher = FALSE;
3001                 pAd->StaCfg.DefaultKeyId = 0;
3002
3003                 // 802.1x port control
3004                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3005                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3006                 pAd->StaCfg.LastMicErrorTime = 0;
3007                 pAd->StaCfg.MicErrCnt        = 0;
3008                 pAd->StaCfg.bBlockAssoc      = FALSE;
3009                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3010
3011                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3012
3013                 pAd->StaCfg.RssiTrigger = 0;
3014                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3015                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3016                 pAd->StaCfg.AtimWin = 0;
3017                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3018                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3019                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3020                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3021                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3022
3023                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3024                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3025         }
3026
3027         // global variables mXXXX used in MAC protocol state machines
3028         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3029         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3030         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3031
3032         // PHY specification
3033         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3034         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3035
3036         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3037         {
3038                 // user desired power mode
3039                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3040                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3041                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3042
3043                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3044                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3045
3046                 // Patch for Ndtest
3047                 pAd->StaCfg.ScanCnt = 0;
3048
3049                 // CCX 2.0 control flag init
3050                 pAd->StaCfg.CCXEnable = FALSE;
3051                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3052                 pAd->StaCfg.CCXQosECWMin        = 4;
3053                 pAd->StaCfg.CCXQosECWMax        = 10;
3054
3055                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3056                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3057                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3058                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3059                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3060
3061                 // Nitro mode control
3062                 pAd->StaCfg.bAutoReconnect = TRUE;
3063
3064                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3065                 // This patch is for driver wake up from standby mode, system will do scan right away.
3066                 pAd->StaCfg.LastScanTime = 0;
3067                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3068                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3069                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3070                 pAd->StaCfg.IEEE8021X = FALSE;
3071                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3072                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3073                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3074         }
3075
3076         // Default for extra information is not valid
3077         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3078
3079         // Default Config change flag
3080         pAd->bConfigChanged = FALSE;
3081
3082         //
3083         // part III. AP configurations
3084         //
3085
3086
3087         //
3088         // part IV. others
3089         //
3090         // dynamic BBP R66:sensibity tuning to overcome background noise
3091         pAd->BbpTuning.bEnable                = TRUE;
3092         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3093         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3094         pAd->BbpTuning.R66Delta               = 4;
3095         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3096
3097         //
3098         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3099         // if not initial this value, the default value will be 0.
3100         //
3101         pAd->BbpTuning.R66CurrentValue = 0x38;
3102
3103         pAd->Bbp94 = BBPR94_DEFAULT;
3104         pAd->BbpForCCK = FALSE;
3105
3106         // initialize MAC table and allocate spin lock
3107         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3108         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3109         NdisAllocateSpinLock(&pAd->MacTabLock);
3110
3111         pAd->CommonCfg.bWiFiTest = FALSE;
3112         pAd->bPCIclkOff = FALSE;
3113
3114         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3115         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3116 }
3117
3118 // IRQL = PASSIVE_LEVEL
3119 UCHAR BtoH(char ch)
3120 {
3121         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3122         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3123         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3124         return(255);
3125 }
3126
3127 //
3128 //  FUNCTION: AtoH(char *, UCHAR *, int)
3129 //
3130 //  PURPOSE:  Converts ascii string to network order hex
3131 //
3132 //  PARAMETERS:
3133 //    src    - pointer to input ascii string
3134 //    dest   - pointer to output hex
3135 //    destlen - size of dest
3136 //
3137 //  COMMENTS:
3138 //
3139 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3140 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3141 //
3142 // IRQL = PASSIVE_LEVEL
3143
3144 void AtoH(char * src, UCHAR * dest, int destlen)
3145 {
3146         char * srcptr;
3147         PUCHAR destTemp;
3148
3149         srcptr = src;
3150         destTemp = (PUCHAR) dest;
3151
3152         while(destlen--)
3153         {
3154                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3155                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3156                 destTemp++;
3157         }
3158 }
3159
3160 VOID    RTMPPatchMacBbpBug(
3161         IN      PRTMP_ADAPTER   pAd)
3162 {
3163         ULONG   Index;
3164
3165         // Initialize BBP register to default value
3166         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3167         {
3168                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3169         }
3170
3171         // Initialize RF register to default value
3172         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3173         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3174
3175         // Re-init BBP register from EEPROM value
3176         NICInitAsicFromEEPROM(pAd);
3177 }
3178
3179 /*
3180         ========================================================================
3181
3182         Routine Description:
3183                 Init timer objects
3184
3185         Arguments:
3186                 pAd                     Pointer to our adapter
3187                 pTimer                          Timer structure
3188                 pTimerFunc                      Function to execute when timer expired
3189                 Repeat                          Ture for period timer
3190
3191         Return Value:
3192                 None
3193
3194         Note:
3195
3196         ========================================================================
3197 */
3198 VOID    RTMPInitTimer(
3199         IN      PRTMP_ADAPTER                   pAd,
3200         IN      PRALINK_TIMER_STRUCT    pTimer,
3201         IN      PVOID                                   pTimerFunc,
3202         IN      PVOID                                   pData,
3203         IN      BOOLEAN                                 Repeat)
3204 {
3205         //
3206         // Set Valid to TRUE for later used.
3207         // It will crash if we cancel a timer or set a timer
3208         // that we haven't initialize before.
3209         //
3210         pTimer->Valid      = TRUE;
3211
3212         pTimer->PeriodicType = Repeat;
3213         pTimer->State      = FALSE;
3214         pTimer->cookie = (ULONG) pData;
3215
3216
3217         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3218 }
3219
3220 /*
3221         ========================================================================
3222
3223         Routine Description:
3224                 Init timer objects
3225
3226         Arguments:
3227                 pTimer                          Timer structure
3228                 Value                           Timer value in milliseconds
3229
3230         Return Value:
3231                 None
3232
3233         Note:
3234                 To use this routine, must call RTMPInitTimer before.
3235
3236         ========================================================================
3237 */
3238 VOID    RTMPSetTimer(
3239         IN      PRALINK_TIMER_STRUCT    pTimer,
3240         IN      ULONG                                   Value)
3241 {
3242         if (pTimer->Valid)
3243         {
3244                 pTimer->TimerValue = Value;
3245                 pTimer->State      = FALSE;
3246                 if (pTimer->PeriodicType == TRUE)
3247                 {
3248                         pTimer->Repeat = TRUE;
3249                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3250                 }
3251                 else
3252                 {
3253                         pTimer->Repeat = FALSE;
3254                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3255                 }
3256         }
3257         else
3258         {
3259                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3260         }
3261 }
3262
3263
3264 /*
3265         ========================================================================
3266
3267         Routine Description:
3268                 Init timer objects
3269
3270         Arguments:
3271                 pTimer                          Timer structure
3272                 Value                           Timer value in milliseconds
3273
3274         Return Value:
3275                 None
3276
3277         Note:
3278                 To use this routine, must call RTMPInitTimer before.
3279
3280         ========================================================================
3281 */
3282 VOID    RTMPModTimer(
3283         IN      PRALINK_TIMER_STRUCT    pTimer,
3284         IN      ULONG                                   Value)
3285 {
3286         BOOLEAN Cancel;
3287
3288         if (pTimer->Valid)
3289         {
3290                 pTimer->TimerValue = Value;
3291                 pTimer->State      = FALSE;
3292                 if (pTimer->PeriodicType == TRUE)
3293                 {
3294                         RTMPCancelTimer(pTimer, &Cancel);
3295                         RTMPSetTimer(pTimer, Value);
3296                 }
3297                 else
3298                 {
3299                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3300                 }
3301         }
3302         else
3303         {
3304                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3305         }
3306 }
3307
3308 /*
3309         ========================================================================
3310
3311         Routine Description:
3312                 Cancel timer objects
3313
3314         Arguments:
3315                 Adapter                                         Pointer to our adapter
3316
3317         Return Value:
3318                 None
3319
3320         IRQL = PASSIVE_LEVEL
3321         IRQL = DISPATCH_LEVEL
3322
3323         Note:
3324                 1.) To use this routine, must call RTMPInitTimer before.
3325                 2.) Reset NIC to initial state AS IS system boot up time.
3326
3327         ========================================================================
3328 */
3329 VOID    RTMPCancelTimer(
3330         IN      PRALINK_TIMER_STRUCT    pTimer,
3331         OUT     BOOLEAN                                 *pCancelled)
3332 {
3333         if (pTimer->Valid)
3334         {
3335                 if (pTimer->State == FALSE)
3336                         pTimer->Repeat = FALSE;
3337                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3338
3339                 if (*pCancelled == TRUE)
3340                         pTimer->State = TRUE;
3341
3342         }
3343         else
3344         {
3345                 //
3346                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3347                 // And don't set the "Valid" to False. So that we can use this timer again.
3348                 //
3349                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3350         }
3351 }
3352
3353 /*
3354         ========================================================================
3355
3356         Routine Description:
3357                 Set LED Status
3358
3359         Arguments:
3360                 pAd                                             Pointer to our adapter
3361                 Status                                  LED Status
3362
3363         Return Value:
3364                 None
3365
3366         IRQL = PASSIVE_LEVEL
3367         IRQL = DISPATCH_LEVEL
3368
3369         Note:
3370
3371         ========================================================================
3372 */
3373 VOID RTMPSetLED(
3374         IN PRTMP_ADAPTER        pAd,
3375         IN UCHAR                        Status)
3376 {
3377         //ULONG                 data;
3378         UCHAR                   HighByte = 0;
3379         UCHAR                   LowByte;
3380
3381         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3382         switch (Status)
3383         {
3384                 case LED_LINK_DOWN:
3385                         HighByte = 0x20;
3386                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3387                         pAd->LedIndicatorStregth = 0;
3388                         break;
3389                 case LED_LINK_UP:
3390                         if (pAd->CommonCfg.Channel > 14)
3391                                 HighByte = 0xa0;
3392                         else
3393                                 HighByte = 0x60;
3394                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3395                         break;
3396                 case LED_RADIO_ON:
3397                         HighByte = 0x20;
3398                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3399                         break;
3400                 case LED_HALT:
3401                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3402                 case LED_RADIO_OFF:
3403                         HighByte = 0;
3404                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3405                         break;
3406         case LED_WPS:
3407                         HighByte = 0x10;
3408                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3409                         break;
3410                 case LED_ON_SITE_SURVEY:
3411                         HighByte = 0x08;
3412                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3413                         break;
3414                 case LED_POWER_UP:
3415                         HighByte = 0x04;
3416                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3417                         break;
3418                 default:
3419                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3420                         break;
3421         }
3422
3423     //
3424         // Keep LED status for LED SiteSurvey mode.
3425         // After SiteSurvey, we will set the LED mode to previous status.
3426         //
3427         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3428                 pAd->LedStatus = Status;
3429
3430         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3431 }
3432
3433 /*
3434         ========================================================================
3435
3436         Routine Description:
3437                 Set LED Signal Stregth
3438
3439         Arguments:
3440                 pAd                                             Pointer to our adapter
3441                 Dbm                                             Signal Stregth
3442
3443         Return Value:
3444                 None
3445
3446         IRQL = PASSIVE_LEVEL
3447
3448         Note:
3449                 Can be run on any IRQL level.
3450
3451                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3452                 <= -90  No Signal
3453                 <= -81  Very Low
3454                 <= -71  Low
3455                 <= -67  Good
3456                 <= -57  Very Good
3457                  > -57  Excellent
3458         ========================================================================
3459 */
3460 VOID RTMPSetSignalLED(
3461         IN PRTMP_ADAPTER        pAd,
3462         IN NDIS_802_11_RSSI Dbm)
3463 {
3464         UCHAR           nLed = 0;
3465
3466         //
3467         // if not Signal Stregth, then do nothing.
3468         //
3469         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3470         {
3471                 return;
3472         }
3473
3474         if (Dbm <= -90)
3475                 nLed = 0;
3476         else if (Dbm <= -81)
3477                 nLed = 1;
3478         else if (Dbm <= -71)
3479                 nLed = 3;
3480         else if (Dbm <= -67)
3481                 nLed = 7;
3482         else if (Dbm <= -57)
3483                 nLed = 15;
3484         else
3485                 nLed = 31;
3486
3487         //
3488         // Update Signal Stregth to firmware if changed.
3489         //
3490         if (pAd->LedIndicatorStregth != nLed)
3491         {
3492                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3493                 pAd->LedIndicatorStregth = nLed;
3494         }
3495 }
3496
3497 /*
3498         ========================================================================
3499
3500         Routine Description:
3501                 Enable RX
3502
3503         Arguments:
3504                 pAd                                             Pointer to our adapter
3505
3506         Return Value:
3507                 None
3508
3509         IRQL <= DISPATCH_LEVEL
3510
3511         Note:
3512                 Before Enable RX, make sure you have enabled Interrupt.
3513         ========================================================================
3514 */
3515 VOID RTMPEnableRxTx(
3516         IN PRTMP_ADAPTER        pAd)
3517 {
3518         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3519
3520         // Enable Rx DMA.
3521         RT28XXDMAEnable(pAd);
3522
3523         // enable RX of MAC block
3524         if (pAd->OpMode == OPMODE_AP)
3525         {
3526                 UINT32 rx_filter_flag = APNORMAL;
3527
3528
3529                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3530         }
3531         else
3532         {
3533                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3534         }
3535
3536         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3537         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3538 }
3539
3540