git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/crc-itu-t.h>
  28 #include <linux/delay.h>
  29 #include <linux/etherdevice.h>
  30 #include <linux/init.h>
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/usb.h>
  34
  35 #include "rt2x00.h"
  36 #include "rt2x00usb.h"
  37 #include "rt73usb.h"
  38
  39 /*
  40  * Register access.
  41  * All access to the CSR registers will go through the methods
  42  * rt73usb_register_read and rt73usb_register_write.
  43  * BBP and RF register require indirect register access,
  44  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  45  * These indirect registers work with busy bits,
  46  * and we will try maximal REGISTER_BUSY_COUNT times to access
  47  * the register while taking a REGISTER_BUSY_DELAY us delay
  48  * between each attampt. When the busy bit is still set at that time,
  49  * the access attempt is considered to have failed,
  50  * and we will print an error.
  51  * The _lock versions must be used if you already hold the usb_cache_mutex
  52  */
  53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  54                                          const unsigned int offset, u32 *value)
  55 {
  56         __le32 reg;
  57         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  58                                       USB_VENDOR_REQUEST_IN, offset,
  59                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  60         *value = le32_to_cpu(reg);
  61 }
  62
  63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64                                               const unsigned int offset, u32 *value)
  65 {
  66         __le32 reg;
  67         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  68                                        USB_VENDOR_REQUEST_IN, offset,
  69                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  70         *value = le32_to_cpu(reg);
  71 }
  72
  73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74                                               const unsigned int offset,
  75                                               void *value, const u32 length)
  76 {
  77         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  78         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  79                                       USB_VENDOR_REQUEST_IN, offset,
  80                                       value, length, timeout);
  81 }
  82
  83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  84                                           const unsigned int offset, u32 value)
  85 {
  86         __le32 reg = cpu_to_le32(value);
  87         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88                                       USB_VENDOR_REQUEST_OUT, offset,
  89                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  90 }
  91
  92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  93                                                const unsigned int offset, u32 value)
  94 {
  95         __le32 reg = cpu_to_le32(value);
  96         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97                                        USB_VENDOR_REQUEST_OUT, offset,
  98                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  99 }
 100
 101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 102                                                const unsigned int offset,
 103                                                void *value, const u32 length)
 104 {
 105         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
 106         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 107                                       USB_VENDOR_REQUEST_OUT, offset,
 108                                       value, length, timeout);
 109 }
 110
 111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 112 {
 113         u32 reg;
 114         unsigned int i;
 115
 116         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 117                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 118                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 119                         break;
 120                 udelay(REGISTER_BUSY_DELAY);
 121         }
 122
 123         return reg;
 124 }
 125
 126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 127                               const unsigned int word, const u8 value)
 128 {
 129         u32 reg;
 130
 131         mutex_lock(&rt2x00dev->usb_cache_mutex);
 132
 133         /*
 134          * Wait until the BBP becomes ready.
 135          */
 136         reg = rt73usb_bbp_check(rt2x00dev);
 137         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 138                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 139                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 140                 return;
 141         }
 142
 143         /*
 144          * Write the data into the BBP.
 145          */
 146         reg = 0;
 147         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 148         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 149         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 150         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 151
 152         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 153         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 154 }
 155
 156 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 157                              const unsigned int word, u8 *value)
 158 {
 159         u32 reg;
 160
 161         mutex_lock(&rt2x00dev->usb_cache_mutex);
 162
 163         /*
 164          * Wait until the BBP becomes ready.
 165          */
 166         reg = rt73usb_bbp_check(rt2x00dev);
 167         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 168                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 169                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 170                 return;
 171         }
 172
 173         /*
 174          * Write the request into the BBP.
 175          */
 176         reg = 0;
 177         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 178         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 179         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 180
 181         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 182
 183         /*
 184          * Wait until the BBP becomes ready.
 185          */
 186         reg = rt73usb_bbp_check(rt2x00dev);
 187         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 188                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 189                 *value = 0xff;
 190                 return;
 191         }
 192
 193         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 194         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 195 }
 196
 197 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 198                              const unsigned int word, const u32 value)
 199 {
 200         u32 reg;
 201         unsigned int i;
 202
 203         if (!word)
 204                 return;
 205
 206         mutex_lock(&rt2x00dev->usb_cache_mutex);
 207
 208         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 209                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 210                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 211                         goto rf_write;
 212                 udelay(REGISTER_BUSY_DELAY);
 213         }
 214
 215         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 216         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 217         return;
 218
 219 rf_write:
 220         reg = 0;
 221         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 222
 223         /*
 224          * RF5225 and RF2527 contain 21 bits per RF register value,
 225          * all others contain 20 bits.
 226          */
 227         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 228                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 229                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 230         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 231         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 232
 233         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 234         rt2x00_rf_write(rt2x00dev, word, value);
 235         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 236 }
 237
 238 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 239 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 240
 241 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 242                              const unsigned int word, u32 *data)
 243 {
 244         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 245 }
 246
 247 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 248                               const unsigned int word, u32 data)
 249 {
 250         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 251 }
 252
 253 static const struct rt2x00debug rt73usb_rt2x00debug = {
 254         .owner  = THIS_MODULE,
 255         .csr    = {
 256                 .read           = rt73usb_read_csr,
 257                 .write          = rt73usb_write_csr,
 258                 .word_size      = sizeof(u32),
 259                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 260         },
 261         .eeprom = {
 262                 .read           = rt2x00_eeprom_read,
 263                 .write          = rt2x00_eeprom_write,
 264                 .word_size      = sizeof(u16),
 265                 .word_count     = EEPROM_SIZE / sizeof(u16),
 266         },
 267         .bbp    = {
 268                 .read           = rt73usb_bbp_read,
 269                 .write          = rt73usb_bbp_write,
 270                 .word_size      = sizeof(u8),
 271                 .word_count     = BBP_SIZE / sizeof(u8),
 272         },
 273         .rf     = {
 274                 .read           = rt2x00_rf_read,
 275                 .write          = rt73usb_rf_write,
 276                 .word_size      = sizeof(u32),
 277                 .word_count     = RF_SIZE / sizeof(u32),
 278         },
 279 };
 280 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 281
 282 #ifdef CONFIG_RT73USB_LEDS
 283 static void rt73usb_led_brightness(struct led_classdev *led_cdev,
 284                                    enum led_brightness brightness)
 285 {
 286         struct rt2x00_led *led =
 287            container_of(led_cdev, struct rt2x00_led, led_dev);
 288         unsigned int enabled = brightness != LED_OFF;
 289         unsigned int a_mode =
 290             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
 291         unsigned int bg_mode =
 292             (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
 293
 294         if (in_atomic()) {
 295                 NOTICE(led->rt2x00dev,
 296                        "Ignoring LED brightness command for led %d\n",
 297                        led->type);
 298                 return;
 299         }
 300
 301         if (led->type == LED_TYPE_RADIO) {
 302                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 303                                    MCU_LEDCS_RADIO_STATUS, enabled);
 304
 305                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 306                                             0, led->rt2x00dev->led_mcu_reg,
 307                                             REGISTER_TIMEOUT);
 308         } else if (led->type == LED_TYPE_ASSOC) {
 309                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 310                                    MCU_LEDCS_LINK_BG_STATUS, bg_mode);
 311                 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
 312                                    MCU_LEDCS_LINK_A_STATUS, a_mode);
 313
 314                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 315                                             0, led->rt2x00dev->led_mcu_reg,
 316                                             REGISTER_TIMEOUT);
 317         } else if (led->type == LED_TYPE_QUALITY) {
 318                 /*
 319                  * The brightness is divided into 6 levels (0 - 5),
 320                  * this means we need to convert the brightness
 321                  * argument into the matching level within that range.
 322                  */
 323                 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
 324                                             brightness / (LED_FULL / 6),
 325                                             led->rt2x00dev->led_mcu_reg,
 326                                             REGISTER_TIMEOUT);
 327         }
 328 }
 329 #else
 330 #define rt73usb_led_brightness  NULL
 331 #endif /* CONFIG_RT73USB_LEDS */
 332
 333 /*
 334  * Configuration handlers.
 335  */
 336 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
 337                                   const unsigned int filter_flags)
 338 {
 339         u32 reg;
 340
 341         /*
 342          * Start configuration steps.
 343          * Note that the version error will always be dropped
 344          * and broadcast frames will always be accepted since
 345          * there is no filter for it at this time.
 346          */
 347         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 348         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
 349                            !(filter_flags & FIF_FCSFAIL));
 350         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
 351                            !(filter_flags & FIF_PLCPFAIL));
 352         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
 353                            !(filter_flags & FIF_CONTROL));
 354         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
 355                            !(filter_flags & FIF_PROMISC_IN_BSS));
 356         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
 357                            !(filter_flags & FIF_PROMISC_IN_BSS) &&
 358                            !rt2x00dev->intf_ap_count);
 359         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 360         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
 361                            !(filter_flags & FIF_ALLMULTI));
 362         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
 363         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
 364                            !(filter_flags & FIF_CONTROL));
 365         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 366 }
 367
 368 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 369                                 struct rt2x00_intf *intf,
 370                                 struct rt2x00intf_conf *conf,
 371                                 const unsigned int flags)
 372 {
 373         unsigned int beacon_base;
 374         u32 reg;
 375
 376         if (flags & CONFIG_UPDATE_TYPE) {
 377                 /*
 378                  * Clear current synchronisation setup.
 379                  * For the Beacon base registers we only need to clear
 380                  * the first byte since that byte contains the VALID and OWNER
 381                  * bits which (when set to 0) will invalidate the entire beacon.
 382                  */
 383                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 384                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 385
 386                 /*
 387                  * Enable synchronisation.
 388                  */
 389                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 390                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 391                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 392                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 393                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 394         }
 395
 396         if (flags & CONFIG_UPDATE_MAC) {
 397                 reg = le32_to_cpu(conf->mac[1]);
 398                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 399                 conf->mac[1] = cpu_to_le32(reg);
 400
 401                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 402                                             conf->mac, sizeof(conf->mac));
 403         }
 404
 405         if (flags & CONFIG_UPDATE_BSSID) {
 406                 reg = le32_to_cpu(conf->bssid[1]);
 407                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 408                 conf->bssid[1] = cpu_to_le32(reg);
 409
 410                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 411                                             conf->bssid, sizeof(conf->bssid));
 412         }
 413 }
 414
 415 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
 416                                struct rt2x00lib_erp *erp)
 417 {
 418         u32 reg;
 419
 420         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 421         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
 422         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 423
 424         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 425         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 426                            !!erp->short_preamble);
 427         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 428 }
 429
 430 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 431                                    const int basic_rate_mask)
 432 {
 433         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 434 }
 435
 436 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 437                                    struct rf_channel *rf, const int txpower)
 438 {
 439         u8 r3;
 440         u8 r94;
 441         u8 smart;
 442
 443         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 444         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 445
 446         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 447                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 448
 449         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 450         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 451         rt73usb_bbp_write(rt2x00dev, 3, r3);
 452
 453         r94 = 6;
 454         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 455                 r94 += txpower - MAX_TXPOWER;
 456         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 457                 r94 += txpower;
 458         rt73usb_bbp_write(rt2x00dev, 94, r94);
 459
 460         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 461         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 462         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 463         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 464
 465         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 466         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 467         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 468         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 469
 470         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 471         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 472         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 473         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 474
 475         udelay(10);
 476 }
 477
 478 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 479                                    const int txpower)
 480 {
 481         struct rf_channel rf;
 482
 483         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 484         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 485         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 486         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 487
 488         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 489 }
 490
 491 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 492                                       struct antenna_setup *ant)
 493 {
 494         u8 r3;
 495         u8 r4;
 496         u8 r77;
 497         u8 temp;
 498
 499         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 500         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 501         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 502
 503         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 504
 505         /*
 506          * Configure the RX antenna.
 507          */
 508         switch (ant->rx) {
 509         case ANTENNA_HW_DIVERSITY:
 510                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 511                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 512                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 513                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 514                 break;
 515         case ANTENNA_A:
 516                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 517                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 518                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 519                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 520                 else
 521                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 522                 break;
 523         case ANTENNA_B:
 524         default:
 525                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 526                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 527                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 528                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 529                 else
 530                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 531                 break;
 532         }
 533
 534         rt73usb_bbp_write(rt2x00dev, 77, r77);
 535         rt73usb_bbp_write(rt2x00dev, 3, r3);
 536         rt73usb_bbp_write(rt2x00dev, 4, r4);
 537 }
 538
 539 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 540                                       struct antenna_setup *ant)
 541 {
 542         u8 r3;
 543         u8 r4;
 544         u8 r77;
 545
 546         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 547         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 548         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 549
 550         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 551         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 552                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 553
 554         /*
 555          * Configure the RX antenna.
 556          */
 557         switch (ant->rx) {
 558         case ANTENNA_HW_DIVERSITY:
 559                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 560                 break;
 561         case ANTENNA_A:
 562                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 563                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 564                 break;
 565         case ANTENNA_B:
 566         default:
 567                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 568                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 569                 break;
 570         }
 571
 572         rt73usb_bbp_write(rt2x00dev, 77, r77);
 573         rt73usb_bbp_write(rt2x00dev, 3, r3);
 574         rt73usb_bbp_write(rt2x00dev, 4, r4);
 575 }
 576
 577 struct antenna_sel {
 578         u8 word;
 579         /*
 580          * value[0] -> non-LNA
 581          * value[1] -> LNA
 582          */
 583         u8 value[2];
 584 };
 585
 586 static const struct antenna_sel antenna_sel_a[] = {
 587         { 96,  { 0x58, 0x78 } },
 588         { 104, { 0x38, 0x48 } },
 589         { 75,  { 0xfe, 0x80 } },
 590         { 86,  { 0xfe, 0x80 } },
 591         { 88,  { 0xfe, 0x80 } },
 592         { 35,  { 0x60, 0x60 } },
 593         { 97,  { 0x58, 0x58 } },
 594         { 98,  { 0x58, 0x58 } },
 595 };
 596
 597 static const struct antenna_sel antenna_sel_bg[] = {
 598         { 96,  { 0x48, 0x68 } },
 599         { 104, { 0x2c, 0x3c } },
 600         { 75,  { 0xfe, 0x80 } },
 601         { 86,  { 0xfe, 0x80 } },
 602         { 88,  { 0xfe, 0x80 } },
 603         { 35,  { 0x50, 0x50 } },
 604         { 97,  { 0x48, 0x48 } },
 605         { 98,  { 0x48, 0x48 } },
 606 };
 607
 608 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 609                                    struct antenna_setup *ant)
 610 {
 611         const struct antenna_sel *sel;
 612         unsigned int lna;
 613         unsigned int i;
 614         u32 reg;
 615
 616         /*
 617          * We should never come here because rt2x00lib is supposed
 618          * to catch this and send us the correct antenna explicitely.
 619          */
 620         BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
 621                ant->tx == ANTENNA_SW_DIVERSITY);
 622
 623         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 624                 sel = antenna_sel_a;
 625                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 626         } else {
 627                 sel = antenna_sel_bg;
 628                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 629         }
 630
 631         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 632                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 633
 634         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 635
 636         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 637                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 638         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 639                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 640
 641         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 642
 643         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 644             rt2x00_rf(&rt2x00dev->chip, RF5225))
 645                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 646         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 647                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 648                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 649 }
 650
 651 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 652                                     struct rt2x00lib_conf *libconf)
 653 {
 654         u32 reg;
 655
 656         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 657         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 658         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 659
 660         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 661         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 662         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 663         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 664         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 665
 666         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 667         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 668         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 669
 670         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 671         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 672         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 673
 674         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 675         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 676                            libconf->conf->beacon_int * 16);
 677         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 678 }
 679
 680 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 681                            struct rt2x00lib_conf *libconf,
 682                            const unsigned int flags)
 683 {
 684         if (flags & CONFIG_UPDATE_PHYMODE)
 685                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 686         if (flags & CONFIG_UPDATE_CHANNEL)
 687                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 688                                        libconf->conf->power_level);
 689         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 690                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 691         if (flags & CONFIG_UPDATE_ANTENNA)
 692                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 693         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 694                 rt73usb_config_duration(rt2x00dev, libconf);
 695 }
 696
 697 /*
 698  * Link tuning
 699  */
 700 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 701                                struct link_qual *qual)
 702 {
 703         u32 reg;
 704
 705         /*
 706          * Update FCS error count from register.
 707          */
 708         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 709         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 710
 711         /*
 712          * Update False CCA count from register.
 713          */
 714         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 715         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 716 }
 717
 718 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 719 {
 720         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 721         rt2x00dev->link.vgc_level = 0x20;
 722 }
 723
 724 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 725 {
 726         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 727         u8 r17;
 728         u8 up_bound;
 729         u8 low_bound;
 730
 731         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 732
 733         /*
 734          * Determine r17 bounds.
 735          */
 736         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 737                 low_bound = 0x28;
 738                 up_bound = 0x48;
 739
 740                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 741                         low_bound += 0x10;
 742                         up_bound += 0x10;
 743                 }
 744         } else {
 745                 if (rssi > -82) {
 746                         low_bound = 0x1c;
 747                         up_bound = 0x40;
 748                 } else if (rssi > -84) {
 749                         low_bound = 0x1c;
 750                         up_bound = 0x20;
 751                 } else {
 752                         low_bound = 0x1c;
 753                         up_bound = 0x1c;
 754                 }
 755
 756                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 757                         low_bound += 0x14;
 758                         up_bound += 0x10;
 759                 }
 760         }
 761
 762         /*
 763          * If we are not associated, we should go straight to the
 764          * dynamic CCA tuning.
 765          */
 766         if (!rt2x00dev->intf_associated)
 767                 goto dynamic_cca_tune;
 768
 769         /*
 770          * Special big-R17 for very short distance
 771          */
 772         if (rssi > -35) {
 773                 if (r17 != 0x60)
 774                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 775                 return;
 776         }
 777
 778         /*
 779          * Special big-R17 for short distance
 780          */
 781         if (rssi >= -58) {
 782                 if (r17 != up_bound)
 783                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 784                 return;
 785         }
 786
 787         /*
 788          * Special big-R17 for middle-short distance
 789          */
 790         if (rssi >= -66) {
 791                 low_bound += 0x10;
 792                 if (r17 != low_bound)
 793                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 794                 return;
 795         }
 796
 797         /*
 798          * Special mid-R17 for middle distance
 799          */
 800         if (rssi >= -74) {
 801                 if (r17 != (low_bound + 0x10))
 802                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 803                 return;
 804         }
 805
 806         /*
 807          * Special case: Change up_bound based on the rssi.
 808          * Lower up_bound when rssi is weaker then -74 dBm.
 809          */
 810         up_bound -= 2 * (-74 - rssi);
 811         if (low_bound > up_bound)
 812                 up_bound = low_bound;
 813
 814         if (r17 > up_bound) {
 815                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 816                 return;
 817         }
 818
 819 dynamic_cca_tune:
 820
 821         /*
 822          * r17 does not yet exceed upper limit, continue and base
 823          * the r17 tuning on the false CCA count.
 824          */
 825         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 826                 r17 += 4;
 827                 if (r17 > up_bound)
 828                         r17 = up_bound;
 829                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 830         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 831                 r17 -= 4;
 832                 if (r17 < low_bound)
 833                         r17 = low_bound;
 834                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 835         }
 836 }
 837
 838 /*
 839  * Firmware functions
 840  */
 841 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 842 {
 843         return FIRMWARE_RT2571;
 844 }
 845
 846 static u16 rt73usb_get_firmware_crc(void *data, const size_t len)
 847 {
 848         u16 crc;
 849
 850         /*
 851          * Use the crc itu-t algorithm.
 852          * The last 2 bytes in the firmware array are the crc checksum itself,
 853          * this means that we should never pass those 2 bytes to the crc
 854          * algorithm.
 855          */
 856         crc = crc_itu_t(0, data, len - 2);
 857         crc = crc_itu_t_byte(crc, 0);
 858         crc = crc_itu_t_byte(crc, 0);
 859
 860         return crc;
 861 }
 862
 863 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 864                                  const size_t len)
 865 {
 866         unsigned int i;
 867         int status;
 868         u32 reg;
 869         char *ptr = data;
 870         char *cache;
 871         int buflen;
 872         int timeout;
 873
 874         /*
 875          * Wait for stable hardware.
 876          */
 877         for (i = 0; i < 100; i++) {
 878                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 879                 if (reg)
 880                         break;
 881                 msleep(1);
 882         }
 883
 884         if (!reg) {
 885                 ERROR(rt2x00dev, "Unstable hardware.\n");
 886                 return -EBUSY;
 887         }
 888
 889         /*
 890          * Write firmware to device.
 891          * We setup a seperate cache for this action,
 892          * since we are going to write larger chunks of data
 893          * then normally used cache size.
 894          */
 895         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 896         if (!cache) {
 897                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 898                 return -ENOMEM;
 899         }
 900
 901         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 902                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 903                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 904
 905                 memcpy(cache, ptr, buflen);
 906
 907                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 908                                          USB_VENDOR_REQUEST_OUT,
 909                                          FIRMWARE_IMAGE_BASE + i, 0,
 910                                          cache, buflen, timeout);
 911
 912                 ptr += buflen;
 913         }
 914
 915         kfree(cache);
 916
 917         /*
 918          * Send firmware request to device to load firmware,
 919          * we need to specify a long timeout time.
 920          */
 921         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 922                                              0, USB_MODE_FIRMWARE,
 923                                              REGISTER_TIMEOUT_FIRMWARE);
 924         if (status < 0) {
 925                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 926                 return status;
 927         }
 928
 929         return 0;
 930 }
 931
 932 /*
 933  * Initialization functions.
 934  */
 935 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 936 {
 937         u32 reg;
 938
 939         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 940         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 941         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 942         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 943         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 944
 945         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 946         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 947         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 948         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 949         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 950         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 951         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 952         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 953         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 954         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 955
 956         /*
 957          * CCK TXD BBP registers
 958          */
 959         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 960         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 961         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 962         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 963         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 964         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 965         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 966         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 967         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 968         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 969
 970         /*
 971          * OFDM TXD BBP registers
 972          */
 973         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 974         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 975         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 976         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 977         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 978         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 979         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 980         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 981
 982         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 983         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 984         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 985         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 986         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 987         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 988
 989         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 990         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 991         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 992         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 993         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 994         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 995
 996         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 997
 998         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 999         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1000         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1001
1002         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1003
1004         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1005                 return -EBUSY;
1006
1007         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1008
1009         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
1010         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
1011         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
1012         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
1013
1014         /*
1015          * Invalidate all Shared Keys (SEC_CSR0),
1016          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1017          */
1018         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1019         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1020         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1021
1022         reg = 0x000023b0;
1023         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1024             rt2x00_rf(&rt2x00dev->chip, RF2527))
1025                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1026         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1027
1028         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1029         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1030         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1031
1032         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1033         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1034         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1035         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1036
1037         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1038         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1039         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1040         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1041
1042         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1043         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1044         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1045
1046         /*
1047          * Clear all beacons
1048          * For the Beacon base registers we only need to clear
1049          * the first byte since that byte contains the VALID and OWNER
1050          * bits which (when set to 0) will invalidate the entire beacon.
1051          */
1052         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1053         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1054         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1055         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1056
1057         /*
1058          * We must clear the error counters.
1059          * These registers are cleared on read,
1060          * so we may pass a useless variable to store the value.
1061          */
1062         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1063         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1064         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1065
1066         /*
1067          * Reset MAC and BBP registers.
1068          */
1069         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1070         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1071         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1072         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1073
1074         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1075         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1076         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1077         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1078
1079         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1080         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1081         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1082
1083         return 0;
1084 }
1085
1086 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1087 {
1088         unsigned int i;
1089         u16 eeprom;
1090         u8 reg_id;
1091         u8 value;
1092
1093         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1094                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1095                 if ((value != 0xff) && (value != 0x00))
1096                         goto continue_csr_init;
1097                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1098                 udelay(REGISTER_BUSY_DELAY);
1099         }
1100
1101         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1102         return -EACCES;
1103
1104 continue_csr_init:
1105         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1106         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1107         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1108         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1109         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1110         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1111         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1112         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1113         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1114         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1115         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1116         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1117         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1118         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1119         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1120         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1121         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1122         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1123         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1124         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1125         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1126         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1127         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1128         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1129         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1130
1131         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1132                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1133
1134                 if (eeprom != 0xffff && eeprom != 0x0000) {
1135                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1136                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1137                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1138                 }
1139         }
1140
1141         return 0;
1142 }
1143
1144 /*
1145  * Device state switch handlers.
1146  */
1147 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1148                               enum dev_state state)
1149 {
1150         u32 reg;
1151
1152         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1153         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1154                            state == STATE_RADIO_RX_OFF);
1155         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1156 }
1157
1158 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1159 {
1160         /*
1161          * Initialize all registers.
1162          */
1163         if (rt73usb_init_registers(rt2x00dev) ||
1164             rt73usb_init_bbp(rt2x00dev)) {
1165                 ERROR(rt2x00dev, "Register initialization failed.\n");
1166                 return -EIO;
1167         }
1168
1169         return 0;
1170 }
1171
1172 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1173 {
1174         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1175
1176         /*
1177          * Disable synchronisation.
1178          */
1179         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1180
1181         rt2x00usb_disable_radio(rt2x00dev);
1182 }
1183
1184 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1185 {
1186         u32 reg;
1187         unsigned int i;
1188         char put_to_sleep;
1189         char current_state;
1190
1191         put_to_sleep = (state != STATE_AWAKE);
1192
1193         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1194         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1195         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1196         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1197
1198         /*
1199          * Device is not guaranteed to be in the requested state yet.
1200          * We must wait until the register indicates that the
1201          * device has entered the correct state.
1202          */
1203         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1204                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1205                 current_state =
1206                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1207                 if (current_state == !put_to_sleep)
1208                         return 0;
1209                 msleep(10);
1210         }
1211
1212         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1213                "current device state %d.\n", !put_to_sleep, current_state);
1214
1215         return -EBUSY;
1216 }
1217
1218 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1219                                     enum dev_state state)
1220 {
1221         int retval = 0;
1222
1223         switch (state) {
1224         case STATE_RADIO_ON:
1225                 retval = rt73usb_enable_radio(rt2x00dev);
1226                 break;
1227         case STATE_RADIO_OFF:
1228                 rt73usb_disable_radio(rt2x00dev);
1229                 break;
1230         case STATE_RADIO_RX_ON:
1231         case STATE_RADIO_RX_ON_LINK:
1232                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1233                 break;
1234         case STATE_RADIO_RX_OFF:
1235         case STATE_RADIO_RX_OFF_LINK:
1236                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
1237                 break;
1238         case STATE_DEEP_SLEEP:
1239         case STATE_SLEEP:
1240         case STATE_STANDBY:
1241         case STATE_AWAKE:
1242                 retval = rt73usb_set_state(rt2x00dev, state);
1243                 break;
1244         default:
1245                 retval = -ENOTSUPP;
1246                 break;
1247         }
1248
1249         return retval;
1250 }
1251
1252 /*
1253  * TX descriptor initialization
1254  */
1255 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1256                                     struct sk_buff *skb,
1257                                     struct txentry_desc *txdesc,
1258                                     struct ieee80211_tx_control *control)
1259 {
1260         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1261         __le32 *txd = skbdesc->desc;
1262         u32 word;
1263
1264         /*
1265          * Start writing the descriptor words.
1266          */
1267         rt2x00_desc_read(txd, 1, &word);
1268         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1269         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1270         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1271         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1272         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1273         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1274         rt2x00_desc_write(txd, 1, word);
1275
1276         rt2x00_desc_read(txd, 2, &word);
1277         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1278         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1279         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1280         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1281         rt2x00_desc_write(txd, 2, word);
1282
1283         rt2x00_desc_read(txd, 5, &word);
1284         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1285                            TXPOWER_TO_DEV(rt2x00dev->tx_power));
1286         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1287         rt2x00_desc_write(txd, 5, word);
1288
1289         rt2x00_desc_read(txd, 0, &word);
1290         rt2x00_set_field32(&word, TXD_W0_BURST,
1291                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1292         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1293         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1294                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1295         rt2x00_set_field32(&word, TXD_W0_ACK,
1296                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1297         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1298                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1299         rt2x00_set_field32(&word, TXD_W0_OFDM,
1300                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1301         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1302         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1303                            !!(control->flags &
1304                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1305         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1306         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
1307         rt2x00_set_field32(&word, TXD_W0_BURST2,
1308                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1309         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1310         rt2x00_desc_write(txd, 0, word);
1311 }
1312
1313 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1314                                    struct sk_buff *skb)
1315 {
1316         int length;
1317
1318         /*
1319          * The length _must_ be a multiple of 4,
1320          * but it must _not_ be a multiple of the USB packet size.
1321          */
1322         length = roundup(skb->len, 4);
1323         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1324
1325         return length;
1326 }
1327
1328 /*
1329  * TX data initialization
1330  */
1331 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1332                                   const unsigned int queue)
1333 {
1334         u32 reg;
1335
1336         if (queue != RT2X00_BCN_QUEUE_BEACON)
1337                 return;
1338
1339         /*
1340          * For Wi-Fi faily generated beacons between participating stations.
1341          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1342          */
1343         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1344
1345         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1346         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1347                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1348                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1349                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1350                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1351         }
1352 }
1353
1354 /*
1355  * RX control handlers
1356  */
1357 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1358 {
1359         u16 eeprom;
1360         u8 offset;
1361         u8 lna;
1362
1363         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1364         switch (lna) {
1365         case 3:
1366                 offset = 90;
1367                 break;
1368         case 2:
1369                 offset = 74;
1370                 break;
1371         case 1:
1372                 offset = 64;
1373                 break;
1374         default:
1375                 return 0;
1376         }
1377
1378         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1379                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1380                         if (lna == 3 || lna == 2)
1381                                 offset += 10;
1382                 } else {
1383                         if (lna == 3)
1384                                 offset += 6;
1385                         else if (lna == 2)
1386                                 offset += 8;
1387                 }
1388
1389                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1390                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1391         } else {
1392                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1393                         offset += 14;
1394
1395                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1396                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1397         }
1398
1399         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1400 }
1401
1402 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1403                                 struct rxdone_entry_desc *rxdesc)
1404 {
1405         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1406         __le32 *rxd = (__le32 *)entry->skb->data;
1407         unsigned int offset = entry->queue->desc_size + 2;
1408         u32 word0;
1409         u32 word1;
1410
1411         /*
1412          * Copy descriptor to the available headroom inside the skbuffer.
1413          */
1414         skb_push(entry->skb, offset);
1415         memcpy(entry->skb->data, rxd, entry->queue->desc_size);
1416         rxd = (__le32 *)entry->skb->data;
1417
1418         /*
1419          * The descriptor is now aligned to 4 bytes and thus it is
1420          * now safe to read it on all architectures.
1421          */
1422         rt2x00_desc_read(rxd, 0, &word0);
1423         rt2x00_desc_read(rxd, 1, &word1);
1424
1425         rxdesc->flags = 0;
1426         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1427                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1428
1429         /*
1430          * Obtain the status about this packet.
1431          * When frame was received with an OFDM bitrate,
1432          * the signal is the PLCP value. If it was received with
1433          * a CCK bitrate the signal is the rate in 100kbit/s.
1434          */
1435         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1436         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1437         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1438
1439         rxdesc->dev_flags = 0;
1440         if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1441                 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1442         if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1443                 rxdesc->dev_flags |= RXDONE_MY_BSS;
1444
1445         /*
1446          * Adjust the skb memory window to the frame boundaries.
1447          */
1448         skb_pull(entry->skb, offset + entry->queue->desc_size);
1449         skb_trim(entry->skb, rxdesc->size);
1450
1451         /*
1452          * Set descriptor and data pointer.
1453          */
1454         skbdesc->data = entry->skb->data;
1455         skbdesc->data_len = rxdesc->size;
1456         skbdesc->desc = rxd;
1457         skbdesc->desc_len = entry->queue->desc_size;
1458 }
1459
1460 /*
1461  * Device probe functions.
1462  */
1463 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1464 {
1465         u16 word;
1466         u8 *mac;
1467         s8 value;
1468
1469         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1470
1471         /*
1472          * Start validation of the data that has been read.
1473          */
1474         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1475         if (!is_valid_ether_addr(mac)) {
1476                 DECLARE_MAC_BUF(macbuf);
1477
1478                 random_ether_addr(mac);
1479                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1480         }
1481
1482         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1483         if (word == 0xffff) {
1484                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1485                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1486                                    ANTENNA_B);
1487                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1488                                    ANTENNA_B);
1489                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1490                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1491                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1492                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1493                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1494                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1495         }
1496
1497         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1498         if (word == 0xffff) {
1499                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1500                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1501                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1502         }
1503
1504         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1505         if (word == 0xffff) {
1506                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1507                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1508                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1509                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1510                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1511                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1512                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1513                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1514                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1515                                    LED_MODE_DEFAULT);
1516                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1517                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1518         }
1519
1520         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1521         if (word == 0xffff) {
1522                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1523                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1524                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1525                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1526         }
1527
1528         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1529         if (word == 0xffff) {
1530                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1531                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1532                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1533                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1534         } else {
1535                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1536                 if (value < -10 || value > 10)
1537                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1538                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1539                 if (value < -10 || value > 10)
1540                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1541                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1542         }
1543
1544         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1545         if (word == 0xffff) {
1546                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1547                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1548                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1549                 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1550         } else {
1551                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1552                 if (value < -10 || value > 10)
1553                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1554                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1555                 if (value < -10 || value > 10)
1556                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1557                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1558         }
1559
1560         return 0;
1561 }
1562
1563 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1564 {
1565         u32 reg;
1566         u16 value;
1567         u16 eeprom;
1568
1569         /*
1570          * Read EEPROM word for configuration.
1571          */
1572         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1573
1574         /*
1575          * Identify RF chipset.
1576          */
1577         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1578         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1579         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1580
1581         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1582                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1583                 return -ENODEV;
1584         }
1585
1586         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1587             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1588             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1589             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1590                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1591                 return -ENODEV;
1592         }
1593
1594         /*
1595          * Identify default antenna configuration.
1596          */
1597         rt2x00dev->default_ant.tx =
1598             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1599         rt2x00dev->default_ant.rx =
1600             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1601
1602         /*
1603          * Read the Frame type.
1604          */
1605         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1606                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1607
1608         /*
1609          * Read frequency offset.
1610          */
1611         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1612         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1613
1614         /*
1615          * Read external LNA informations.
1616          */
1617         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1618
1619         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1620                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1621                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1622         }
1623
1624         /*
1625          * Store led settings, for correct led behaviour.
1626          */
1627 #ifdef CONFIG_RT73USB_LEDS
1628         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1629
1630         switch (value) {
1631         case LED_MODE_TXRX_ACTIVITY:
1632         case LED_MODE_ASUS:
1633         case LED_MODE_ALPHA:
1634         case LED_MODE_DEFAULT:
1635                 rt2x00dev->led_flags =
1636                     LED_SUPPORT_RADIO | LED_SUPPORT_ASSOC;
1637                 break;
1638         case LED_MODE_SIGNAL_STRENGTH:
1639                 rt2x00dev->led_flags =
1640                     LED_SUPPORT_RADIO | LED_SUPPORT_ASSOC |
1641                     LED_SUPPORT_QUALITY;
1642                 break;
1643         }
1644
1645         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1646         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1647                            rt2x00_get_field16(eeprom,
1648                                               EEPROM_LED_POLARITY_GPIO_0));
1649         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1650                            rt2x00_get_field16(eeprom,
1651                                               EEPROM_LED_POLARITY_GPIO_1));
1652         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1653                            rt2x00_get_field16(eeprom,
1654                                               EEPROM_LED_POLARITY_GPIO_2));
1655         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1656                            rt2x00_get_field16(eeprom,
1657                                               EEPROM_LED_POLARITY_GPIO_3));
1658         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1659                            rt2x00_get_field16(eeprom,
1660                                               EEPROM_LED_POLARITY_GPIO_4));
1661         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1662                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1663         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1664                            rt2x00_get_field16(eeprom,
1665                                               EEPROM_LED_POLARITY_RDY_G));
1666         rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1667                            rt2x00_get_field16(eeprom,
1668                                               EEPROM_LED_POLARITY_RDY_A));
1669 #endif /* CONFIG_RT73USB_LEDS */
1670
1671         return 0;
1672 }
1673
1674 /*
1675  * RF value list for RF2528
1676  * Supports: 2.4 GHz
1677  */
1678 static const struct rf_channel rf_vals_bg_2528[] = {
1679         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1680         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1681         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1682         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1683         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1684         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1685         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1686         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1687         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1688         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1689         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1690         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1691         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1692         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1693 };
1694
1695 /*
1696  * RF value list for RF5226
1697  * Supports: 2.4 GHz & 5.2 GHz
1698  */
1699 static const struct rf_channel rf_vals_5226[] = {
1700         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1701         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1702         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1703         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1704         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1705         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1706         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1707         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1708         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1709         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1710         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1711         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1712         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1713         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1714
1715         /* 802.11 UNI / HyperLan 2 */
1716         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1717         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1718         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1719         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1720         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1721         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1722         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1723         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1724
1725         /* 802.11 HyperLan 2 */
1726         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1727         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1728         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1729         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1730         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1731         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1732         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1733         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1734         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1735         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1736
1737         /* 802.11 UNII */
1738         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1739         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1740         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1741         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1742         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1743         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1744
1745         /* MMAC(Japan)J52 ch 34,38,42,46 */
1746         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1747         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1748         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1749         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1750 };
1751
1752 /*
1753  * RF value list for RF5225 & RF2527
1754  * Supports: 2.4 GHz & 5.2 GHz
1755  */
1756 static const struct rf_channel rf_vals_5225_2527[] = {
1757         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1758         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1759         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1760         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1761         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1762         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1763         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1764         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1765         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1766         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1767         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1768         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1769         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1770         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1771
1772         /* 802.11 UNI / HyperLan 2 */
1773         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1774         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1775         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1776         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1777         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1778         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1779         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1780         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1781
1782         /* 802.11 HyperLan 2 */
1783         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1784         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1785         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1786         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1787         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1788         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1789         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1790         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1791         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1792         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1793
1794         /* 802.11 UNII */
1795         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1796         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1797         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1798         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1799         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1800         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1801
1802         /* MMAC(Japan)J52 ch 34,38,42,46 */
1803         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1804         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1805         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1806         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1807 };
1808
1809
1810 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1811 {
1812         struct hw_mode_spec *spec = &rt2x00dev->spec;
1813         u8 *txpower;
1814         unsigned int i;
1815
1816         /*
1817          * Initialize all hw fields.
1818          */
1819         rt2x00dev->hw->flags =
1820             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1821             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1822         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1823         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1824         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1825         rt2x00dev->hw->queues = 4;
1826
1827         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1828         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1829                                 rt2x00_eeprom_addr(rt2x00dev,
1830                                                    EEPROM_MAC_ADDR_0));
1831
1832         /*
1833          * Convert tx_power array in eeprom.
1834          */
1835         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1836         for (i = 0; i < 14; i++)
1837                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1838
1839         /*
1840          * Initialize hw_mode information.
1841          */
1842         spec->supported_bands = SUPPORT_BAND_2GHZ;
1843         spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1844         spec->tx_power_a = NULL;
1845         spec->tx_power_bg = txpower;
1846         spec->tx_power_default = DEFAULT_TXPOWER;
1847
1848         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1849                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1850                 spec->channels = rf_vals_bg_2528;
1851         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1852                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1853                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1854                 spec->channels = rf_vals_5226;
1855         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1856                 spec->num_channels = 14;
1857                 spec->channels = rf_vals_5225_2527;
1858         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1859                 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1860                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1861                 spec->channels = rf_vals_5225_2527;
1862         }
1863
1864         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1865             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1866                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1867                 for (i = 0; i < 14; i++)
1868                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1869
1870                 spec->tx_power_a = txpower;
1871         }
1872 }
1873
1874 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1875 {
1876         int retval;
1877
1878         /*
1879          * Allocate eeprom data.
1880          */
1881         retval = rt73usb_validate_eeprom(rt2x00dev);
1882         if (retval)
1883                 return retval;
1884
1885         retval = rt73usb_init_eeprom(rt2x00dev);
1886         if (retval)
1887                 return retval;
1888
1889         /*
1890          * Initialize hw specifications.
1891          */
1892         rt73usb_probe_hw_mode(rt2x00dev);
1893
1894         /*
1895          * This device requires firmware.
1896          */
1897         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1898         __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1899
1900         /*
1901          * Set the rssi offset.
1902          */
1903         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1904
1905         return 0;
1906 }
1907
1908 /*
1909  * IEEE80211 stack callback functions.
1910  */
1911 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1912                                    u32 short_retry, u32 long_retry)
1913 {
1914         struct rt2x00_dev *rt2x00dev = hw->priv;
1915         u32 reg;
1916
1917         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1918         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1919         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1920         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1921
1922         return 0;
1923 }
1924
1925 #if 0
1926 /*
1927  * Mac80211 demands get_tsf must be atomic.
1928  * This is not possible for rt73usb since all register access
1929  * functions require sleeping. Untill mac80211 no longer needs
1930  * get_tsf to be atomic, this function should be disabled.
1931  */
1932 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1933 {
1934         struct rt2x00_dev *rt2x00dev = hw->priv;
1935         u64 tsf;
1936         u32 reg;
1937
1938         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1939         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1940         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1941         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1942
1943         return tsf;
1944 }
1945 #else
1946 #define rt73usb_get_tsf NULL
1947 #endif
1948
1949 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1950                                  struct ieee80211_tx_control *control)
1951 {
1952         struct rt2x00_dev *rt2x00dev = hw->priv;
1953         struct rt2x00_intf *intf = vif_to_intf(control->vif);
1954         struct skb_frame_desc *skbdesc;
1955         unsigned int beacon_base;
1956         unsigned int timeout;
1957         u32 reg;
1958
1959         if (unlikely(!intf->beacon))
1960                 return -ENOBUFS;
1961
1962         /*
1963          * Add the descriptor in front of the skb.
1964          */
1965         skb_push(skb, intf->beacon->queue->desc_size);
1966         memset(skb->data, 0, intf->beacon->queue->desc_size);
1967
1968         /*
1969          * Fill in skb descriptor
1970          */
1971         skbdesc = get_skb_frame_desc(skb);
1972         memset(skbdesc, 0, sizeof(*skbdesc));
1973         skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
1974         skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1975         skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
1976         skbdesc->desc = skb->data;
1977         skbdesc->desc_len = intf->beacon->queue->desc_size;
1978         skbdesc->entry = intf->beacon;
1979
1980         /*
1981          * Disable beaconing while we are reloading the beacon data,
1982          * otherwise we might be sending out invalid data.
1983          */
1984         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1985         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1986         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1987         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1988         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1989
1990         /*
1991          * mac80211 doesn't provide the control->queue variable
1992          * for beacons. Set our own queue identification so
1993          * it can be used during descriptor initialization.
1994          */
1995         control->queue = RT2X00_BCN_QUEUE_BEACON;
1996         rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
1997
1998         /*
1999          * Write entire beacon with descriptor to register,
2000          * and kick the beacon generator.
2001          */
2002         beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2003         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
2004         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2005                                  USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2006                                  skb->data, skb->len, timeout);
2007         rt73usb_kick_tx_queue(rt2x00dev, control->queue);
2008
2009         return 0;
2010 }
2011
2012 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2013         .tx                     = rt2x00mac_tx,
2014         .start                  = rt2x00mac_start,
2015         .stop                   = rt2x00mac_stop,
2016         .add_interface          = rt2x00mac_add_interface,
2017         .remove_interface       = rt2x00mac_remove_interface,
2018         .config                 = rt2x00mac_config,
2019         .config_interface       = rt2x00mac_config_interface,
2020         .configure_filter       = rt2x00mac_configure_filter,
2021         .get_stats              = rt2x00mac_get_stats,
2022         .set_retry_limit        = rt73usb_set_retry_limit,
2023         .bss_info_changed       = rt2x00mac_bss_info_changed,
2024         .conf_tx                = rt2x00mac_conf_tx,
2025         .get_tx_stats           = rt2x00mac_get_tx_stats,
2026         .get_tsf                = rt73usb_get_tsf,
2027         .beacon_update          = rt73usb_beacon_update,
2028 };
2029
2030 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2031         .probe_hw               = rt73usb_probe_hw,
2032         .get_firmware_name      = rt73usb_get_firmware_name,
2033         .get_firmware_crc       = rt73usb_get_firmware_crc,
2034         .load_firmware          = rt73usb_load_firmware,
2035         .initialize             = rt2x00usb_initialize,
2036         .uninitialize           = rt2x00usb_uninitialize,
2037         .init_rxentry           = rt2x00usb_init_rxentry,
2038         .init_txentry           = rt2x00usb_init_txentry,
2039         .set_device_state       = rt73usb_set_device_state,
2040         .link_stats             = rt73usb_link_stats,
2041         .reset_tuner            = rt73usb_reset_tuner,
2042         .link_tuner             = rt73usb_link_tuner,
2043         .led_brightness         = rt73usb_led_brightness,
2044         .write_tx_desc          = rt73usb_write_tx_desc,
2045         .write_tx_data          = rt2x00usb_write_tx_data,
2046         .get_tx_data_len        = rt73usb_get_tx_data_len,
2047         .kick_tx_queue          = rt73usb_kick_tx_queue,
2048         .fill_rxdone            = rt73usb_fill_rxdone,
2049         .config_filter          = rt73usb_config_filter,
2050         .config_intf            = rt73usb_config_intf,
2051         .config_erp             = rt73usb_config_erp,
2052         .config                 = rt73usb_config,
2053 };
2054
2055 static const struct data_queue_desc rt73usb_queue_rx = {
2056         .entry_num              = RX_ENTRIES,
2057         .data_size              = DATA_FRAME_SIZE,
2058         .desc_size              = RXD_DESC_SIZE,
2059         .priv_size              = sizeof(struct queue_entry_priv_usb_rx),
2060 };
2061
2062 static const struct data_queue_desc rt73usb_queue_tx = {
2063         .entry_num              = TX_ENTRIES,
2064         .data_size              = DATA_FRAME_SIZE,
2065         .desc_size              = TXD_DESC_SIZE,
2066         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2067 };
2068
2069 static const struct data_queue_desc rt73usb_queue_bcn = {
2070         .entry_num              = 4 * BEACON_ENTRIES,
2071         .data_size              = MGMT_FRAME_SIZE,
2072         .desc_size              = TXINFO_SIZE,
2073         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2074 };
2075
2076 static const struct rt2x00_ops rt73usb_ops = {
2077         .name           = KBUILD_MODNAME,
2078         .max_sta_intf   = 1,
2079         .max_ap_intf    = 4,
2080         .eeprom_size    = EEPROM_SIZE,
2081         .rf_size        = RF_SIZE,
2082         .rx             = &rt73usb_queue_rx,
2083         .tx             = &rt73usb_queue_tx,
2084         .bcn            = &rt73usb_queue_bcn,
2085         .lib            = &rt73usb_rt2x00_ops,
2086         .hw             = &rt73usb_mac80211_ops,
2087 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2088         .debugfs        = &rt73usb_rt2x00debug,
2089 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2090 };
2091
2092 /*
2093  * rt73usb module information.
2094  */
2095 static struct usb_device_id rt73usb_device_table[] = {
2096         /* AboCom */
2097         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2098         /* Askey */
2099         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2100         /* ASUS */
2101         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2102         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2103         /* Belkin */
2104         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2105         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2106         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2107         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2108         /* Billionton */
2109         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* Buffalo */
2111         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2112         /* CNet */
2113         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* Conceptronic */
2116         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2117         /* Corega */
2118         { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2119         /* D-Link */
2120         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2121         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2122         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2123         /* Gemtek */
2124         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2125         /* Gigabyte */
2126         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2127         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2128         /* Huawei-3Com */
2129         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2130         /* Hercules */
2131         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2132         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2133         /* Linksys */
2134         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2135         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2136         /* MSI */
2137         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2138         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2139         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2140         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2141         /* Ralink */
2142         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2143         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2144         /* Qcom */
2145         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2146         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2147         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2148         /* Senao */
2149         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2150         /* Sitecom */
2151         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2152         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2153         /* Surecom */
2154         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2155         /* Planex */
2156         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2157         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2158         { 0, }
2159 };
2160
2161 MODULE_AUTHOR(DRV_PROJECT);
2162 MODULE_VERSION(DRV_VERSION);
2163 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2164 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2165 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2166 MODULE_FIRMWARE(FIRMWARE_RT2571);
2167 MODULE_LICENSE("GPL");
2168
2169 static struct usb_driver rt73usb_driver = {
2170         .name           = KBUILD_MODNAME,
2171         .id_table       = rt73usb_device_table,
2172         .probe          = rt2x00usb_probe,
2173         .disconnect     = rt2x00usb_disconnect,
2174         .suspend        = rt2x00usb_suspend,
2175         .resume         = rt2x00usb_resume,
2176 };
2177
2178 static int __init rt73usb_init(void)
2179 {
2180         return usb_register(&rt73usb_driver);
2181 }
2182
2183 static void __exit rt73usb_exit(void)
2184 {
2185         usb_deregister(&rt73usb_driver);
2186 }
2187
2188 module_init(rt73usb_init);
2189 module_exit(rt73usb_exit);