2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ptrace.h>
21 #include <linux/errno.h>
22 #include <linux/ioport.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/delay.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
32 #include <linux/mii.h>
33 #include <linux/ethtool.h>
34 #include <linux/bitops.h>
35 #include <linux/platform_device.h>
37 #include <asm/pgtable.h>
39 #include <asm/uaccess.h>
43 static int bitbang_prep_bit(u8 **datp, u8 *mskp,
44 struct fs_mii_bit *mii_bit)
50 dat = (void*) mii_bit->offset;
52 adv = mii_bit->bit >> 3;
53 dat = (char *)dat + adv;
55 msk = 1 << (7 - (mii_bit->bit & 7));
63 static inline void bb_set(u8 *p, u8 m)
65 out_8(p, in_8(p) | m);
68 static inline void bb_clr(u8 *p, u8 m)
70 out_8(p, in_8(p) & ~m);
73 static inline int bb_read(u8 *p, u8 m)
75 return (in_8(p) & m) != 0;
78 static inline void mdio_active(struct bb_info *bitbang)
80 bb_set(bitbang->mdio_dir, bitbang->mdio_dir_msk);
83 static inline void mdio_tristate(struct bb_info *bitbang )
85 bb_clr(bitbang->mdio_dir, bitbang->mdio_dir_msk);
88 static inline int mdio_read(struct bb_info *bitbang )
90 return bb_read(bitbang->mdio_dat, bitbang->mdio_dat_msk);
93 static inline void mdio(struct bb_info *bitbang , int what)
96 bb_set(bitbang->mdio_dat, bitbang->mdio_dat_msk);
98 bb_clr(bitbang->mdio_dat, bitbang->mdio_dat_msk);
101 static inline void mdc(struct bb_info *bitbang , int what)
104 bb_set(bitbang->mdc_dat, bitbang->mdc_msk);
106 bb_clr(bitbang->mdc_dat, bitbang->mdc_msk);
109 static inline void mii_delay(struct bb_info *bitbang )
111 udelay(bitbang->delay);
114 /* Utility to send the preamble, address, and register (common to read and write). */
115 static void bitbang_pre(struct bb_info *bitbang , int read, u8 addr, u8 reg)
120 * Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
121 * The IEEE spec says this is a PHY optional requirement. The AMD
122 * 79C874 requires one after power up and one after a MII communications
123 * error. This means that we are doing more preambles than we need,
124 * but it is safer and will be much more robust.
127 mdio_active(bitbang);
129 for (j = 0; j < 32; j++) {
136 /* send the start bit (01) and the read opcode (10) or write (10) */
153 mdio(bitbang, !read);
158 /* send the PHY address */
159 for (j = 0; j < 5; j++) {
161 mdio(bitbang, (addr & 0x10) != 0);
168 /* send the register address */
169 for (j = 0; j < 5; j++) {
171 mdio(bitbang, (reg & 0x10) != 0);
179 static int fs_enet_mii_bb_read(struct mii_bus *bus , int phy_id, int location)
183 u8 addr = phy_id & 0xff;
184 u8 reg = location & 0xff;
185 struct bb_info* bitbang = bus->priv;
187 bitbang_pre(bitbang, 1, addr, reg);
189 /* tri-state our MDIO I/O pin so we can read */
191 mdio_tristate(bitbang);
196 /* check the turnaround bit: the PHY should be driving it to zero */
197 if (mdio_read(bitbang) != 0) {
198 /* PHY didn't drive TA low */
199 for (j = 0; j < 32; j++) {
212 /* read 16 bits of register data, MSB first */
214 for (j = 0; j < 16; j++) {
218 rdreg |= mdio_read(bitbang);
235 static int fs_enet_mii_bb_write(struct mii_bus *bus, int phy_id, int location, u16 val)
238 struct bb_info* bitbang = bus->priv;
240 u8 addr = phy_id & 0xff;
241 u8 reg = location & 0xff;
242 u16 value = val & 0xffff;
244 bitbang_pre(bitbang, 0, addr, reg);
246 /* send the turnaround (10) */
258 /* write 16 bits of register data, MSB first */
259 for (j = 0; j < 16; j++) {
261 mdio(bitbang, (value & 0x8000) != 0);
269 * Tri-state the MDIO line.
271 mdio_tristate(bitbang);
279 static int fs_enet_mii_bb_reset(struct mii_bus *bus)
281 /*nothing here - dunno how to reset it*/
285 static int fs_mii_bitbang_init(struct bb_info *bitbang, struct fs_mii_bb_platform_info* fmpi)
289 bitbang->delay = fmpi->delay;
291 r = bitbang_prep_bit(&bitbang->mdio_dir,
292 &bitbang->mdio_dir_msk,
297 r = bitbang_prep_bit(&bitbang->mdio_dat,
298 &bitbang->mdio_dat_msk,
303 r = bitbang_prep_bit(&bitbang->mdc_dat,
313 static int __devinit fs_enet_mdio_probe(struct device *dev)
315 struct platform_device *pdev = to_platform_device(dev);
316 struct fs_mii_bb_platform_info *pdata;
317 struct mii_bus *new_bus;
318 struct bb_info *bitbang;
324 new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
329 bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
334 new_bus->name = "BB MII Bus",
335 new_bus->read = &fs_enet_mii_bb_read,
336 new_bus->write = &fs_enet_mii_bb_write,
337 new_bus->reset = &fs_enet_mii_bb_reset,
338 new_bus->id = pdev->id;
340 new_bus->phy_mask = ~0x9;
341 pdata = (struct fs_mii_bb_platform_info *)pdev->dev.platform_data;
344 printk(KERN_ERR "gfar mdio %d: Missing platform data!\n", pdev->id);
349 fs_mii_bitbang_init(bitbang, pdata);
351 new_bus->priv = bitbang;
353 new_bus->irq = pdata->irq;
356 dev_set_drvdata(dev, new_bus);
358 err = mdiobus_register(new_bus);
361 printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
363 goto bus_register_fail;
376 static int fs_enet_mdio_remove(struct device *dev)
378 struct mii_bus *bus = dev_get_drvdata(dev);
380 mdiobus_unregister(bus);
382 dev_set_drvdata(dev, NULL);
384 iounmap((void *) (&bus->priv));
391 static struct device_driver fs_enet_bb_mdio_driver = {
392 .name = "fsl-bb-mdio",
393 .bus = &platform_bus_type,
394 .probe = fs_enet_mdio_probe,
395 .remove = fs_enet_mdio_remove,
398 int fs_enet_mdio_bb_init(void)
400 return driver_register(&fs_enet_bb_mdio_driver);
403 void fs_enet_mdio_bb_exit(void)
405 driver_unregister(&fs_enet_bb_mdio_driver);