ath9k: Handle channel initialization for AP mode
[linux-2.6] / drivers / net / tc35815.c
1 /*
2  * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
3  *
4  * Based on skelton.c by Donald Becker.
5  *
6  * This driver is a replacement of older and less maintained version.
7  * This is a header of the older version:
8  *      -----<snip>-----
9  *      Copyright 2001 MontaVista Software Inc.
10  *      Author: MontaVista Software, Inc.
11  *              ahennessy@mvista.com
12  *      Copyright (C) 2000-2001 Toshiba Corporation
13  *      static const char *version =
14  *              "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
15  *      -----<snip>-----
16  *
17  * This file is subject to the terms and conditions of the GNU General Public
18  * License.  See the file "COPYING" in the main directory of this archive
19  * for more details.
20  *
21  * (C) Copyright TOSHIBA CORPORATION 2004-2005
22  * All Rights Reserved.
23  */
24
25 #ifdef TC35815_NAPI
26 #define DRV_VERSION     "1.37-NAPI"
27 #else
28 #define DRV_VERSION     "1.37"
29 #endif
30 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31 #define MODNAME                 "tc35815"
32
33 #include <linux/module.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/fcntl.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/in.h>
40 #include <linux/slab.h>
41 #include <linux/string.h>
42 #include <linux/spinlock.h>
43 #include <linux/errno.h>
44 #include <linux/init.h>
45 #include <linux/netdevice.h>
46 #include <linux/etherdevice.h>
47 #include <linux/skbuff.h>
48 #include <linux/delay.h>
49 #include <linux/pci.h>
50 #include <linux/phy.h>
51 #include <linux/workqueue.h>
52 #include <linux/platform_device.h>
53 #include <asm/io.h>
54 #include <asm/byteorder.h>
55
56 /* First, a few definitions that the brave might change. */
57
58 #define GATHER_TXINT    /* On-Demand Tx Interrupt */
59 #define WORKAROUND_LOSTCAR
60 #define WORKAROUND_100HALF_PROMISC
61 /* #define TC35815_USE_PACKEDBUFFER */
62
63 enum tc35815_chiptype {
64         TC35815CF = 0,
65         TC35815_NWU,
66         TC35815_TX4939,
67 };
68
69 /* indexed by tc35815_chiptype, above */
70 static const struct {
71         const char *name;
72 } chip_info[] __devinitdata = {
73         { "TOSHIBA TC35815CF 10/100BaseTX" },
74         { "TOSHIBA TC35815 with Wake on LAN" },
75         { "TOSHIBA TC35815/TX4939" },
76 };
77
78 static const struct pci_device_id tc35815_pci_tbl[] = {
79         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
80         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
81         {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
82         {0,}
83 };
84 MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
85
86 /* see MODULE_PARM_DESC */
87 static struct tc35815_options {
88         int speed;
89         int duplex;
90 } options;
91
92 /*
93  * Registers
94  */
95 struct tc35815_regs {
96         __u32 DMA_Ctl;          /* 0x00 */
97         __u32 TxFrmPtr;
98         __u32 TxThrsh;
99         __u32 TxPollCtr;
100         __u32 BLFrmPtr;
101         __u32 RxFragSize;
102         __u32 Int_En;
103         __u32 FDA_Bas;
104         __u32 FDA_Lim;          /* 0x20 */
105         __u32 Int_Src;
106         __u32 unused0[2];
107         __u32 PauseCnt;
108         __u32 RemPauCnt;
109         __u32 TxCtlFrmStat;
110         __u32 unused1;
111         __u32 MAC_Ctl;          /* 0x40 */
112         __u32 CAM_Ctl;
113         __u32 Tx_Ctl;
114         __u32 Tx_Stat;
115         __u32 Rx_Ctl;
116         __u32 Rx_Stat;
117         __u32 MD_Data;
118         __u32 MD_CA;
119         __u32 CAM_Adr;          /* 0x60 */
120         __u32 CAM_Data;
121         __u32 CAM_Ena;
122         __u32 PROM_Ctl;
123         __u32 PROM_Data;
124         __u32 Algn_Cnt;
125         __u32 CRC_Cnt;
126         __u32 Miss_Cnt;
127 };
128
129 /*
130  * Bit assignments
131  */
132 /* DMA_Ctl bit asign ------------------------------------------------------- */
133 #define DMA_RxAlign            0x00c00000 /* 1:Reception Alignment           */
134 #define DMA_RxAlign_1          0x00400000
135 #define DMA_RxAlign_2          0x00800000
136 #define DMA_RxAlign_3          0x00c00000
137 #define DMA_M66EnStat          0x00080000 /* 1:66MHz Enable State            */
138 #define DMA_IntMask            0x00040000 /* 1:Interupt mask                 */
139 #define DMA_SWIntReq           0x00020000 /* 1:Software Interrupt request    */
140 #define DMA_TxWakeUp           0x00010000 /* 1:Transmit Wake Up              */
141 #define DMA_RxBigE             0x00008000 /* 1:Receive Big Endian            */
142 #define DMA_TxBigE             0x00004000 /* 1:Transmit Big Endian           */
143 #define DMA_TestMode           0x00002000 /* 1:Test Mode                     */
144 #define DMA_PowrMgmnt          0x00001000 /* 1:Power Management              */
145 #define DMA_DmBurst_Mask       0x000001fc /* DMA Burst size                  */
146
147 /* RxFragSize bit asign ---------------------------------------------------- */
148 #define RxFrag_EnPack          0x00008000 /* 1:Enable Packing                */
149 #define RxFrag_MinFragMask     0x00000ffc /* Minimum Fragment                */
150
151 /* MAC_Ctl bit asign ------------------------------------------------------- */
152 #define MAC_Link10             0x00008000 /* 1:Link Status 10Mbits           */
153 #define MAC_EnMissRoll         0x00002000 /* 1:Enable Missed Roll            */
154 #define MAC_MissRoll           0x00000400 /* 1:Missed Roll                   */
155 #define MAC_Loop10             0x00000080 /* 1:Loop 10 Mbps                  */
156 #define MAC_Conn_Auto          0x00000000 /*00:Connection mode (Automatic)   */
157 #define MAC_Conn_10M           0x00000020 /*01:                (10Mbps endec)*/
158 #define MAC_Conn_Mll           0x00000040 /*10:                (Mll clock)   */
159 #define MAC_MacLoop            0x00000010 /* 1:MAC Loopback                  */
160 #define MAC_FullDup            0x00000008 /* 1:Full Duplex 0:Half Duplex     */
161 #define MAC_Reset              0x00000004 /* 1:Software Reset                */
162 #define MAC_HaltImm            0x00000002 /* 1:Halt Immediate                */
163 #define MAC_HaltReq            0x00000001 /* 1:Halt request                  */
164
165 /* PROM_Ctl bit asign ------------------------------------------------------ */
166 #define PROM_Busy              0x00008000 /* 1:Busy (Start Operation)        */
167 #define PROM_Read              0x00004000 /*10:Read operation                */
168 #define PROM_Write             0x00002000 /*01:Write operation               */
169 #define PROM_Erase             0x00006000 /*11:Erase operation               */
170                                           /*00:Enable or Disable Writting,   */
171                                           /*      as specified in PROM_Addr. */
172 #define PROM_Addr_Ena          0x00000030 /*11xxxx:PROM Write enable         */
173                                           /*00xxxx:           disable        */
174
175 /* CAM_Ctl bit asign ------------------------------------------------------- */
176 #define CAM_CompEn             0x00000010 /* 1:CAM Compare Enable            */
177 #define CAM_NegCAM             0x00000008 /* 1:Reject packets CAM recognizes,*/
178                                           /*                    accept other */
179 #define CAM_BroadAcc           0x00000004 /* 1:Broadcast assept              */
180 #define CAM_GroupAcc           0x00000002 /* 1:Multicast assept              */
181 #define CAM_StationAcc         0x00000001 /* 1:unicast accept                */
182
183 /* CAM_Ena bit asign ------------------------------------------------------- */
184 #define CAM_ENTRY_MAX                  21   /* CAM Data entry max count      */
185 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits)  */
186 #define CAM_Ena_Bit(index)      (1 << (index))
187 #define CAM_ENTRY_DESTINATION   0
188 #define CAM_ENTRY_SOURCE        1
189 #define CAM_ENTRY_MACCTL        20
190
191 /* Tx_Ctl bit asign -------------------------------------------------------- */
192 #define Tx_En                  0x00000001 /* 1:Transmit enable               */
193 #define Tx_TxHalt              0x00000002 /* 1:Transmit Halt Request         */
194 #define Tx_NoPad               0x00000004 /* 1:Suppress Padding              */
195 #define Tx_NoCRC               0x00000008 /* 1:Suppress Padding              */
196 #define Tx_FBack               0x00000010 /* 1:Fast Back-off                 */
197 #define Tx_EnUnder             0x00000100 /* 1:Enable Underrun               */
198 #define Tx_EnExDefer           0x00000200 /* 1:Enable Excessive Deferral     */
199 #define Tx_EnLCarr             0x00000400 /* 1:Enable Lost Carrier           */
200 #define Tx_EnExColl            0x00000800 /* 1:Enable Excessive Collision    */
201 #define Tx_EnLateColl          0x00001000 /* 1:Enable Late Collision         */
202 #define Tx_EnTxPar             0x00002000 /* 1:Enable Transmit Parity        */
203 #define Tx_EnComp              0x00004000 /* 1:Enable Completion             */
204
205 /* Tx_Stat bit asign ------------------------------------------------------- */
206 #define Tx_TxColl_MASK         0x0000000F /* Tx Collision Count              */
207 #define Tx_ExColl              0x00000010 /* Excessive Collision             */
208 #define Tx_TXDefer             0x00000020 /* Transmit Defered                */
209 #define Tx_Paused              0x00000040 /* Transmit Paused                 */
210 #define Tx_IntTx               0x00000080 /* Interrupt on Tx                 */
211 #define Tx_Under               0x00000100 /* Underrun                        */
212 #define Tx_Defer               0x00000200 /* Deferral                        */
213 #define Tx_NCarr               0x00000400 /* No Carrier                      */
214 #define Tx_10Stat              0x00000800 /* 10Mbps Status                   */
215 #define Tx_LateColl            0x00001000 /* Late Collision                  */
216 #define Tx_TxPar               0x00002000 /* Tx Parity Error                 */
217 #define Tx_Comp                0x00004000 /* Completion                      */
218 #define Tx_Halted              0x00008000 /* Tx Halted                       */
219 #define Tx_SQErr               0x00010000 /* Signal Quality Error(SQE)       */
220
221 /* Rx_Ctl bit asign -------------------------------------------------------- */
222 #define Rx_EnGood              0x00004000 /* 1:Enable Good                   */
223 #define Rx_EnRxPar             0x00002000 /* 1:Enable Receive Parity         */
224 #define Rx_EnLongErr           0x00000800 /* 1:Enable Long Error             */
225 #define Rx_EnOver              0x00000400 /* 1:Enable OverFlow               */
226 #define Rx_EnCRCErr            0x00000200 /* 1:Enable CRC Error              */
227 #define Rx_EnAlign             0x00000100 /* 1:Enable Alignment              */
228 #define Rx_IgnoreCRC           0x00000040 /* 1:Ignore CRC Value              */
229 #define Rx_StripCRC            0x00000010 /* 1:Strip CRC Value               */
230 #define Rx_ShortEn             0x00000008 /* 1:Short Enable                  */
231 #define Rx_LongEn              0x00000004 /* 1:Long Enable                   */
232 #define Rx_RxHalt              0x00000002 /* 1:Receive Halt Request          */
233 #define Rx_RxEn                0x00000001 /* 1:Receive Intrrupt Enable       */
234
235 /* Rx_Stat bit asign ------------------------------------------------------- */
236 #define Rx_Halted              0x00008000 /* Rx Halted                       */
237 #define Rx_Good                0x00004000 /* Rx Good                         */
238 #define Rx_RxPar               0x00002000 /* Rx Parity Error                 */
239 #define Rx_TypePkt             0x00001000 /* Rx Type Packet                  */
240 #define Rx_LongErr             0x00000800 /* Rx Long Error                   */
241 #define Rx_Over                0x00000400 /* Rx Overflow                     */
242 #define Rx_CRCErr              0x00000200 /* Rx CRC Error                    */
243 #define Rx_Align               0x00000100 /* Rx Alignment Error              */
244 #define Rx_10Stat              0x00000080 /* Rx 10Mbps Status                */
245 #define Rx_IntRx               0x00000040 /* Rx Interrupt                    */
246 #define Rx_CtlRecd             0x00000020 /* Rx Control Receive              */
247 #define Rx_InLenErr            0x00000010 /* Rx In Range Frame Length Error  */
248
249 #define Rx_Stat_Mask           0x0000FFF0 /* Rx All Status Mask              */
250
251 /* Int_En bit asign -------------------------------------------------------- */
252 #define Int_NRAbtEn            0x00000800 /* 1:Non-recoverable Abort Enable  */
253 #define Int_TxCtlCmpEn         0x00000400 /* 1:Transmit Ctl Complete Enable  */
254 #define Int_DmParErrEn         0x00000200 /* 1:DMA Parity Error Enable       */
255 #define Int_DParDEn            0x00000100 /* 1:Data Parity Error Enable      */
256 #define Int_EarNotEn           0x00000080 /* 1:Early Notify Enable           */
257 #define Int_DParErrEn          0x00000040 /* 1:Detected Parity Error Enable  */
258 #define Int_SSysErrEn          0x00000020 /* 1:Signalled System Error Enable */
259 #define Int_RMasAbtEn          0x00000010 /* 1:Received Master Abort Enable  */
260 #define Int_RTargAbtEn         0x00000008 /* 1:Received Target Abort Enable  */
261 #define Int_STargAbtEn         0x00000004 /* 1:Signalled Target Abort Enable */
262 #define Int_BLExEn             0x00000002 /* 1:Buffer List Exhausted Enable  */
263 #define Int_FDAExEn            0x00000001 /* 1:Free Descriptor Area          */
264                                           /*               Exhausted Enable  */
265
266 /* Int_Src bit asign ------------------------------------------------------- */
267 #define Int_NRabt              0x00004000 /* 1:Non Recoverable error         */
268 #define Int_DmParErrStat       0x00002000 /* 1:DMA Parity Error & Clear      */
269 #define Int_BLEx               0x00001000 /* 1:Buffer List Empty & Clear     */
270 #define Int_FDAEx              0x00000800 /* 1:FDA Empty & Clear             */
271 #define Int_IntNRAbt           0x00000400 /* 1:Non Recoverable Abort         */
272 #define Int_IntCmp             0x00000200 /* 1:MAC control packet complete   */
273 #define Int_IntExBD            0x00000100 /* 1:Interrupt Extra BD & Clear    */
274 #define Int_DmParErr           0x00000080 /* 1:DMA Parity Error & Clear      */
275 #define Int_IntEarNot          0x00000040 /* 1:Receive Data write & Clear    */
276 #define Int_SWInt              0x00000020 /* 1:Software request & Clear      */
277 #define Int_IntBLEx            0x00000010 /* 1:Buffer List Empty & Clear     */
278 #define Int_IntFDAEx           0x00000008 /* 1:FDA Empty & Clear             */
279 #define Int_IntPCI             0x00000004 /* 1:PCI controller & Clear        */
280 #define Int_IntMacRx           0x00000002 /* 1:Rx controller & Clear         */
281 #define Int_IntMacTx           0x00000001 /* 1:Tx controller & Clear         */
282
283 /* MD_CA bit asign --------------------------------------------------------- */
284 #define MD_CA_PreSup           0x00001000 /* 1:Preamble Supress              */
285 #define MD_CA_Busy             0x00000800 /* 1:Busy (Start Operation)        */
286 #define MD_CA_Wr               0x00000400 /* 1:Write 0:Read                  */
287
288
289 /*
290  * Descriptors
291  */
292
293 /* Frame descripter */
294 struct FDesc {
295         volatile __u32 FDNext;
296         volatile __u32 FDSystem;
297         volatile __u32 FDStat;
298         volatile __u32 FDCtl;
299 };
300
301 /* Buffer descripter */
302 struct BDesc {
303         volatile __u32 BuffData;
304         volatile __u32 BDCtl;
305 };
306
307 #define FD_ALIGN        16
308
309 /* Frame Descripter bit asign ---------------------------------------------- */
310 #define FD_FDLength_MASK       0x0000FFFF /* Length MASK                     */
311 #define FD_BDCnt_MASK          0x001F0000 /* BD count MASK in FD             */
312 #define FD_FrmOpt_MASK         0x7C000000 /* Frame option MASK               */
313 #define FD_FrmOpt_BigEndian    0x40000000 /* Tx/Rx */
314 #define FD_FrmOpt_IntTx        0x20000000 /* Tx only */
315 #define FD_FrmOpt_NoCRC        0x10000000 /* Tx only */
316 #define FD_FrmOpt_NoPadding    0x08000000 /* Tx only */
317 #define FD_FrmOpt_Packing      0x04000000 /* Rx only */
318 #define FD_CownsFD             0x80000000 /* FD Controller owner bit         */
319 #define FD_Next_EOL            0x00000001 /* FD EOL indicator                */
320 #define FD_BDCnt_SHIFT         16
321
322 /* Buffer Descripter bit asign --------------------------------------------- */
323 #define BD_BuffLength_MASK     0x0000FFFF /* Recieve Data Size               */
324 #define BD_RxBDID_MASK         0x00FF0000 /* BD ID Number MASK               */
325 #define BD_RxBDSeqN_MASK       0x7F000000 /* Rx BD Sequence Number           */
326 #define BD_CownsBD             0x80000000 /* BD Controller owner bit         */
327 #define BD_RxBDID_SHIFT        16
328 #define BD_RxBDSeqN_SHIFT      24
329
330
331 /* Some useful constants. */
332 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
333
334 #ifdef NO_CHECK_CARRIER
335 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
336         Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
337         Tx_En)  /* maybe  0x7b01 */
338 #else
339 #define TX_CTL_CMD      (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
340         Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
341         Tx_En)  /* maybe  0x7b01 */
342 #endif
343 #define RX_CTL_CMD      (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
344         | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn)   /* maybe 0x6f01 */
345 #define INT_EN_CMD  (Int_NRAbtEn | \
346         Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
347         Int_SSysErrEn  | Int_RMasAbtEn | Int_RTargAbtEn | \
348         Int_STargAbtEn | \
349         Int_BLExEn  | Int_FDAExEn) /* maybe 0xb7f*/
350 #define DMA_CTL_CMD     DMA_BURST_SIZE
351 #define HAVE_DMA_RXALIGN(lp)    likely((lp)->chiptype != TC35815CF)
352
353 /* Tuning parameters */
354 #define DMA_BURST_SIZE  32
355 #define TX_THRESHOLD    1024
356 /* used threshold with packet max byte for low pci transfer ability.*/
357 #define TX_THRESHOLD_MAX 1536
358 /* setting threshold max value when overrun error occured this count. */
359 #define TX_THRESHOLD_KEEP_LIMIT 10
360
361 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
362 #ifdef TC35815_USE_PACKEDBUFFER
363 #define FD_PAGE_NUM 2
364 #define RX_BUF_NUM      8       /* >= 2 */
365 #define RX_FD_NUM       250     /* >= 32 */
366 #define TX_FD_NUM       128
367 #define RX_BUF_SIZE     PAGE_SIZE
368 #else /* TC35815_USE_PACKEDBUFFER */
369 #define FD_PAGE_NUM 4
370 #define RX_BUF_NUM      128     /* < 256 */
371 #define RX_FD_NUM       256     /* >= 32 */
372 #define TX_FD_NUM       128
373 #if RX_CTL_CMD & Rx_LongEn
374 #define RX_BUF_SIZE     PAGE_SIZE
375 #elif RX_CTL_CMD & Rx_StripCRC
376 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
377 #else
378 #define RX_BUF_SIZE     ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
379 #endif
380 #endif /* TC35815_USE_PACKEDBUFFER */
381 #define RX_FD_RESERVE   (2 / 2) /* max 2 BD per RxFD */
382 #define NAPI_WEIGHT     16
383
384 struct TxFD {
385         struct FDesc fd;
386         struct BDesc bd;
387         struct BDesc unused;
388 };
389
390 struct RxFD {
391         struct FDesc fd;
392         struct BDesc bd[0];     /* variable length */
393 };
394
395 struct FrFD {
396         struct FDesc fd;
397         struct BDesc bd[RX_BUF_NUM];
398 };
399
400
401 #define tc_readl(addr)  ioread32(addr)
402 #define tc_writel(d, addr)      iowrite32(d, addr)
403
404 #define TC35815_TX_TIMEOUT  msecs_to_jiffies(400)
405
406 /* Information that need to be kept for each controller. */
407 struct tc35815_local {
408         struct pci_dev *pci_dev;
409
410         struct net_device *dev;
411         struct napi_struct napi;
412
413         /* statistics */
414         struct {
415                 int max_tx_qlen;
416                 int tx_ints;
417                 int rx_ints;
418                 int tx_underrun;
419         } lstats;
420
421         /* Tx control lock.  This protects the transmit buffer ring
422          * state along with the "tx full" state of the driver.  This
423          * means all netif_queue flow control actions are protected
424          * by this lock as well.
425          */
426         spinlock_t lock;
427
428         struct mii_bus *mii_bus;
429         struct phy_device *phy_dev;
430         int duplex;
431         int speed;
432         int link;
433         struct work_struct restart_work;
434
435         /*
436          * Transmitting: Batch Mode.
437          *      1 BD in 1 TxFD.
438          * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
439          *      1 circular FD for Free Buffer List.
440          *      RX_BUF_NUM BD in Free Buffer FD.
441          *      One Free Buffer BD has PAGE_SIZE data buffer.
442          * Or Non-Packing Mode.
443          *      1 circular FD for Free Buffer List.
444          *      RX_BUF_NUM BD in Free Buffer FD.
445          *      One Free Buffer BD has ETH_FRAME_LEN data buffer.
446          */
447         void *fd_buf;   /* for TxFD, RxFD, FrFD */
448         dma_addr_t fd_buf_dma;
449         struct TxFD *tfd_base;
450         unsigned int tfd_start;
451         unsigned int tfd_end;
452         struct RxFD *rfd_base;
453         struct RxFD *rfd_limit;
454         struct RxFD *rfd_cur;
455         struct FrFD *fbl_ptr;
456 #ifdef TC35815_USE_PACKEDBUFFER
457         unsigned char fbl_curid;
458         void *data_buf[RX_BUF_NUM];             /* packing */
459         dma_addr_t data_buf_dma[RX_BUF_NUM];
460         struct {
461                 struct sk_buff *skb;
462                 dma_addr_t skb_dma;
463         } tx_skbs[TX_FD_NUM];
464 #else
465         unsigned int fbl_count;
466         struct {
467                 struct sk_buff *skb;
468                 dma_addr_t skb_dma;
469         } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
470 #endif
471         u32 msg_enable;
472         enum tc35815_chiptype chiptype;
473 };
474
475 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
476 {
477         return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
478 }
479 #ifdef DEBUG
480 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
481 {
482         return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
483 }
484 #endif
485 #ifdef TC35815_USE_PACKEDBUFFER
486 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
487 {
488         int i;
489         for (i = 0; i < RX_BUF_NUM; i++) {
490                 if (bus >= lp->data_buf_dma[i] &&
491                     bus < lp->data_buf_dma[i] + PAGE_SIZE)
492                         return (void *)((u8 *)lp->data_buf[i] +
493                                         (bus - lp->data_buf_dma[i]));
494         }
495         return NULL;
496 }
497
498 #define TC35815_DMA_SYNC_ONDEMAND
499 static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
500 {
501 #ifdef TC35815_DMA_SYNC_ONDEMAND
502         void *buf;
503         /* pci_map + pci_dma_sync will be more effective than
504          * pci_alloc_consistent on some archs. */
505         buf = (void *)__get_free_page(GFP_ATOMIC);
506         if (!buf)
507                 return NULL;
508         *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
509                                      PCI_DMA_FROMDEVICE);
510         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
511                 free_page((unsigned long)buf);
512                 return NULL;
513         }
514         return buf;
515 #else
516         return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
517 #endif
518 }
519
520 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
521 {
522 #ifdef TC35815_DMA_SYNC_ONDEMAND
523         pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
524         free_page((unsigned long)buf);
525 #else
526         pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
527 #endif
528 }
529 #else /* TC35815_USE_PACKEDBUFFER */
530 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
531                                        struct pci_dev *hwdev,
532                                        dma_addr_t *dma_handle)
533 {
534         struct sk_buff *skb;
535         skb = dev_alloc_skb(RX_BUF_SIZE);
536         if (!skb)
537                 return NULL;
538         *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
539                                      PCI_DMA_FROMDEVICE);
540         if (pci_dma_mapping_error(hwdev, *dma_handle)) {
541                 dev_kfree_skb_any(skb);
542                 return NULL;
543         }
544         skb_reserve(skb, 2);    /* make IP header 4byte aligned */
545         return skb;
546 }
547
548 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
549 {
550         pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
551                          PCI_DMA_FROMDEVICE);
552         dev_kfree_skb_any(skb);
553 }
554 #endif /* TC35815_USE_PACKEDBUFFER */
555
556 /* Index to functions, as function prototypes. */
557
558 static int      tc35815_open(struct net_device *dev);
559 static int      tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
560 static irqreturn_t      tc35815_interrupt(int irq, void *dev_id);
561 #ifdef TC35815_NAPI
562 static int      tc35815_rx(struct net_device *dev, int limit);
563 static int      tc35815_poll(struct napi_struct *napi, int budget);
564 #else
565 static void     tc35815_rx(struct net_device *dev);
566 #endif
567 static void     tc35815_txdone(struct net_device *dev);
568 static int      tc35815_close(struct net_device *dev);
569 static struct   net_device_stats *tc35815_get_stats(struct net_device *dev);
570 static void     tc35815_set_multicast_list(struct net_device *dev);
571 static void     tc35815_tx_timeout(struct net_device *dev);
572 static int      tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
573 #ifdef CONFIG_NET_POLL_CONTROLLER
574 static void     tc35815_poll_controller(struct net_device *dev);
575 #endif
576 static const struct ethtool_ops tc35815_ethtool_ops;
577
578 /* Example routines you must write ;->. */
579 static void     tc35815_chip_reset(struct net_device *dev);
580 static void     tc35815_chip_init(struct net_device *dev);
581
582 #ifdef DEBUG
583 static void     panic_queues(struct net_device *dev);
584 #endif
585
586 static void tc35815_restart_work(struct work_struct *work);
587
588 static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
589 {
590         struct net_device *dev = bus->priv;
591         struct tc35815_regs __iomem *tr =
592                 (struct tc35815_regs __iomem *)dev->base_addr;
593         unsigned long timeout = jiffies + 10;
594
595         tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
596         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
597                 if (time_after(jiffies, timeout))
598                         return -EIO;
599                 cpu_relax();
600         }
601         return tc_readl(&tr->MD_Data) & 0xffff;
602 }
603
604 static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
605 {
606         struct net_device *dev = bus->priv;
607         struct tc35815_regs __iomem *tr =
608                 (struct tc35815_regs __iomem *)dev->base_addr;
609         unsigned long timeout = jiffies + 10;
610
611         tc_writel(val, &tr->MD_Data);
612         tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
613                   &tr->MD_CA);
614         while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
615                 if (time_after(jiffies, timeout))
616                         return -EIO;
617                 cpu_relax();
618         }
619         return 0;
620 }
621
622 static void tc_handle_link_change(struct net_device *dev)
623 {
624         struct tc35815_local *lp = netdev_priv(dev);
625         struct phy_device *phydev = lp->phy_dev;
626         unsigned long flags;
627         int status_change = 0;
628
629         spin_lock_irqsave(&lp->lock, flags);
630         if (phydev->link &&
631             (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
632                 struct tc35815_regs __iomem *tr =
633                         (struct tc35815_regs __iomem *)dev->base_addr;
634                 u32 reg;
635
636                 reg = tc_readl(&tr->MAC_Ctl);
637                 reg |= MAC_HaltReq;
638                 tc_writel(reg, &tr->MAC_Ctl);
639                 if (phydev->duplex == DUPLEX_FULL)
640                         reg |= MAC_FullDup;
641                 else
642                         reg &= ~MAC_FullDup;
643                 tc_writel(reg, &tr->MAC_Ctl);
644                 reg &= ~MAC_HaltReq;
645                 tc_writel(reg, &tr->MAC_Ctl);
646
647                 /*
648                  * TX4939 PCFG.SPEEDn bit will be changed on
649                  * NETDEV_CHANGE event.
650                  */
651
652 #if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
653                 /*
654                  * WORKAROUND: enable LostCrS only if half duplex
655                  * operation.
656                  * (TX4939 does not have EnLCarr)
657                  */
658                 if (phydev->duplex == DUPLEX_HALF &&
659                     lp->chiptype != TC35815_TX4939)
660                         tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
661                                   &tr->Tx_Ctl);
662 #endif
663
664                 lp->speed = phydev->speed;
665                 lp->duplex = phydev->duplex;
666                 status_change = 1;
667         }
668
669         if (phydev->link != lp->link) {
670                 if (phydev->link) {
671 #ifdef WORKAROUND_100HALF_PROMISC
672                         /* delayed promiscuous enabling */
673                         if (dev->flags & IFF_PROMISC)
674                                 tc35815_set_multicast_list(dev);
675 #endif
676                 } else {
677                         lp->speed = 0;
678                         lp->duplex = -1;
679                 }
680                 lp->link = phydev->link;
681
682                 status_change = 1;
683         }
684         spin_unlock_irqrestore(&lp->lock, flags);
685
686         if (status_change && netif_msg_link(lp)) {
687                 phy_print_status(phydev);
688 #ifdef DEBUG
689                 printk(KERN_DEBUG
690                        "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
691                        dev->name,
692                        phy_read(phydev, MII_BMCR),
693                        phy_read(phydev, MII_BMSR),
694                        phy_read(phydev, MII_LPA));
695 #endif
696         }
697 }
698
699 static int tc_mii_probe(struct net_device *dev)
700 {
701         struct tc35815_local *lp = netdev_priv(dev);
702         struct phy_device *phydev = NULL;
703         int phy_addr;
704         u32 dropmask;
705
706         /* find the first phy */
707         for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
708                 if (lp->mii_bus->phy_map[phy_addr]) {
709                         if (phydev) {
710                                 printk(KERN_ERR "%s: multiple PHYs found\n",
711                                        dev->name);
712                                 return -EINVAL;
713                         }
714                         phydev = lp->mii_bus->phy_map[phy_addr];
715                         break;
716                 }
717         }
718
719         if (!phydev) {
720                 printk(KERN_ERR "%s: no PHY found\n", dev->name);
721                 return -ENODEV;
722         }
723
724         /* attach the mac to the phy */
725         phydev = phy_connect(dev, phydev->dev.bus_id,
726                              &tc_handle_link_change, 0,
727                              lp->chiptype == TC35815_TX4939 ?
728                              PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
729         if (IS_ERR(phydev)) {
730                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
731                 return PTR_ERR(phydev);
732         }
733         printk(KERN_INFO "%s: attached PHY driver [%s] "
734                 "(mii_bus:phy_addr=%s, id=%x)\n",
735                 dev->name, phydev->drv->name, phydev->dev.bus_id,
736                 phydev->phy_id);
737
738         /* mask with MAC supported features */
739         phydev->supported &= PHY_BASIC_FEATURES;
740         dropmask = 0;
741         if (options.speed == 10)
742                 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
743         else if (options.speed == 100)
744                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
745         if (options.duplex == 1)
746                 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
747         else if (options.duplex == 2)
748                 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
749         phydev->supported &= ~dropmask;
750         phydev->advertising = phydev->supported;
751
752         lp->link = 0;
753         lp->speed = 0;
754         lp->duplex = -1;
755         lp->phy_dev = phydev;
756
757         return 0;
758 }
759
760 static int tc_mii_init(struct net_device *dev)
761 {
762         struct tc35815_local *lp = netdev_priv(dev);
763         int err;
764         int i;
765
766         lp->mii_bus = mdiobus_alloc();
767         if (lp->mii_bus == NULL) {
768                 err = -ENOMEM;
769                 goto err_out;
770         }
771
772         lp->mii_bus->name = "tc35815_mii_bus";
773         lp->mii_bus->read = tc_mdio_read;
774         lp->mii_bus->write = tc_mdio_write;
775         snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%x",
776                  (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
777         lp->mii_bus->priv = dev;
778         lp->mii_bus->parent = &lp->pci_dev->dev;
779         lp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
780         if (!lp->mii_bus->irq) {
781                 err = -ENOMEM;
782                 goto err_out_free_mii_bus;
783         }
784
785         for (i = 0; i < PHY_MAX_ADDR; i++)
786                 lp->mii_bus->irq[i] = PHY_POLL;
787
788         err = mdiobus_register(lp->mii_bus);
789         if (err)
790                 goto err_out_free_mdio_irq;
791         err = tc_mii_probe(dev);
792         if (err)
793                 goto err_out_unregister_bus;
794         return 0;
795
796 err_out_unregister_bus:
797         mdiobus_unregister(lp->mii_bus);
798 err_out_free_mdio_irq:
799         kfree(lp->mii_bus->irq);
800 err_out_free_mii_bus:
801         mdiobus_free(lp->mii_bus);
802 err_out:
803         return err;
804 }
805
806 #ifdef CONFIG_CPU_TX49XX
807 /*
808  * Find a platform_device providing a MAC address.  The platform code
809  * should provide a "tc35815-mac" device with a MAC address in its
810  * platform_data.
811  */
812 static int __devinit tc35815_mac_match(struct device *dev, void *data)
813 {
814         struct platform_device *plat_dev = to_platform_device(dev);
815         struct pci_dev *pci_dev = data;
816         unsigned int id = pci_dev->irq;
817         return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
818 }
819
820 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
821 {
822         struct tc35815_local *lp = netdev_priv(dev);
823         struct device *pd = bus_find_device(&platform_bus_type, NULL,
824                                             lp->pci_dev, tc35815_mac_match);
825         if (pd) {
826                 if (pd->platform_data)
827                         memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
828                 put_device(pd);
829                 return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
830         }
831         return -ENODEV;
832 }
833 #else
834 static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
835 {
836         return -ENODEV;
837 }
838 #endif
839
840 static int __devinit tc35815_init_dev_addr(struct net_device *dev)
841 {
842         struct tc35815_regs __iomem *tr =
843                 (struct tc35815_regs __iomem *)dev->base_addr;
844         int i;
845
846         while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
847                 ;
848         for (i = 0; i < 6; i += 2) {
849                 unsigned short data;
850                 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
851                 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
852                         ;
853                 data = tc_readl(&tr->PROM_Data);
854                 dev->dev_addr[i] = data & 0xff;
855                 dev->dev_addr[i+1] = data >> 8;
856         }
857         if (!is_valid_ether_addr(dev->dev_addr))
858                 return tc35815_read_plat_dev_addr(dev);
859         return 0;
860 }
861
862 static int __devinit tc35815_init_one(struct pci_dev *pdev,
863                                       const struct pci_device_id *ent)
864 {
865         void __iomem *ioaddr = NULL;
866         struct net_device *dev;
867         struct tc35815_local *lp;
868         int rc;
869
870         static int printed_version;
871         if (!printed_version++) {
872                 printk(version);
873                 dev_printk(KERN_DEBUG, &pdev->dev,
874                            "speed:%d duplex:%d\n",
875                            options.speed, options.duplex);
876         }
877
878         if (!pdev->irq) {
879                 dev_warn(&pdev->dev, "no IRQ assigned.\n");
880                 return -ENODEV;
881         }
882
883         /* dev zeroed in alloc_etherdev */
884         dev = alloc_etherdev(sizeof(*lp));
885         if (dev == NULL) {
886                 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
887                 return -ENOMEM;
888         }
889         SET_NETDEV_DEV(dev, &pdev->dev);
890         lp = netdev_priv(dev);
891         lp->dev = dev;
892
893         /* enable device (incl. PCI PM wakeup), and bus-mastering */
894         rc = pcim_enable_device(pdev);
895         if (rc)
896                 goto err_out;
897         rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
898         if (rc)
899                 goto err_out;
900         pci_set_master(pdev);
901         ioaddr = pcim_iomap_table(pdev)[1];
902
903         /* Initialize the device structure. */
904         dev->open = tc35815_open;
905         dev->hard_start_xmit = tc35815_send_packet;
906         dev->stop = tc35815_close;
907         dev->get_stats = tc35815_get_stats;
908         dev->set_multicast_list = tc35815_set_multicast_list;
909         dev->do_ioctl = tc35815_ioctl;
910         dev->ethtool_ops = &tc35815_ethtool_ops;
911         dev->tx_timeout = tc35815_tx_timeout;
912         dev->watchdog_timeo = TC35815_TX_TIMEOUT;
913 #ifdef TC35815_NAPI
914         netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
915 #endif
916 #ifdef CONFIG_NET_POLL_CONTROLLER
917         dev->poll_controller = tc35815_poll_controller;
918 #endif
919
920         dev->irq = pdev->irq;
921         dev->base_addr = (unsigned long)ioaddr;
922
923         INIT_WORK(&lp->restart_work, tc35815_restart_work);
924         spin_lock_init(&lp->lock);
925         lp->pci_dev = pdev;
926         lp->chiptype = ent->driver_data;
927
928         lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
929         pci_set_drvdata(pdev, dev);
930
931         /* Soft reset the chip. */
932         tc35815_chip_reset(dev);
933
934         /* Retrieve the ethernet address. */
935         if (tc35815_init_dev_addr(dev)) {
936                 dev_warn(&pdev->dev, "not valid ether addr\n");
937                 random_ether_addr(dev->dev_addr);
938         }
939
940         rc = register_netdev(dev);
941         if (rc)
942                 goto err_out;
943
944         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
945         printk(KERN_INFO "%s: %s at 0x%lx, %pM, IRQ %d\n",
946                 dev->name,
947                 chip_info[ent->driver_data].name,
948                 dev->base_addr,
949                 dev->dev_addr,
950                 dev->irq);
951
952         rc = tc_mii_init(dev);
953         if (rc)
954                 goto err_out_unregister;
955
956         return 0;
957
958 err_out_unregister:
959         unregister_netdev(dev);
960 err_out:
961         free_netdev(dev);
962         return rc;
963 }
964
965
966 static void __devexit tc35815_remove_one(struct pci_dev *pdev)
967 {
968         struct net_device *dev = pci_get_drvdata(pdev);
969         struct tc35815_local *lp = netdev_priv(dev);
970
971         phy_disconnect(lp->phy_dev);
972         mdiobus_unregister(lp->mii_bus);
973         kfree(lp->mii_bus->irq);
974         mdiobus_free(lp->mii_bus);
975         unregister_netdev(dev);
976         free_netdev(dev);
977         pci_set_drvdata(pdev, NULL);
978 }
979
980 static int
981 tc35815_init_queues(struct net_device *dev)
982 {
983         struct tc35815_local *lp = netdev_priv(dev);
984         int i;
985         unsigned long fd_addr;
986
987         if (!lp->fd_buf) {
988                 BUG_ON(sizeof(struct FDesc) +
989                        sizeof(struct BDesc) * RX_BUF_NUM +
990                        sizeof(struct FDesc) * RX_FD_NUM +
991                        sizeof(struct TxFD) * TX_FD_NUM >
992                        PAGE_SIZE * FD_PAGE_NUM);
993
994                 lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
995                                                   PAGE_SIZE * FD_PAGE_NUM,
996                                                   &lp->fd_buf_dma);
997                 if (!lp->fd_buf)
998                         return -ENOMEM;
999                 for (i = 0; i < RX_BUF_NUM; i++) {
1000 #ifdef TC35815_USE_PACKEDBUFFER
1001                         lp->data_buf[i] =
1002                                 alloc_rxbuf_page(lp->pci_dev,
1003                                                  &lp->data_buf_dma[i]);
1004                         if (!lp->data_buf[i]) {
1005                                 while (--i >= 0) {
1006                                         free_rxbuf_page(lp->pci_dev,
1007                                                         lp->data_buf[i],
1008                                                         lp->data_buf_dma[i]);
1009                                         lp->data_buf[i] = NULL;
1010                                 }
1011                                 pci_free_consistent(lp->pci_dev,
1012                                                     PAGE_SIZE * FD_PAGE_NUM,
1013                                                     lp->fd_buf,
1014                                                     lp->fd_buf_dma);
1015                                 lp->fd_buf = NULL;
1016                                 return -ENOMEM;
1017                         }
1018 #else
1019                         lp->rx_skbs[i].skb =
1020                                 alloc_rxbuf_skb(dev, lp->pci_dev,
1021                                                 &lp->rx_skbs[i].skb_dma);
1022                         if (!lp->rx_skbs[i].skb) {
1023                                 while (--i >= 0) {
1024                                         free_rxbuf_skb(lp->pci_dev,
1025                                                        lp->rx_skbs[i].skb,
1026                                                        lp->rx_skbs[i].skb_dma);
1027                                         lp->rx_skbs[i].skb = NULL;
1028                                 }
1029                                 pci_free_consistent(lp->pci_dev,
1030                                                     PAGE_SIZE * FD_PAGE_NUM,
1031                                                     lp->fd_buf,
1032                                                     lp->fd_buf_dma);
1033                                 lp->fd_buf = NULL;
1034                                 return -ENOMEM;
1035                         }
1036 #endif
1037                 }
1038                 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
1039                        dev->name, lp->fd_buf);
1040 #ifdef TC35815_USE_PACKEDBUFFER
1041                 printk(" DataBuf");
1042                 for (i = 0; i < RX_BUF_NUM; i++)
1043                         printk(" %p", lp->data_buf[i]);
1044 #endif
1045                 printk("\n");
1046         } else {
1047                 for (i = 0; i < FD_PAGE_NUM; i++)
1048                         clear_page((void *)((unsigned long)lp->fd_buf +
1049                                             i * PAGE_SIZE));
1050         }
1051         fd_addr = (unsigned long)lp->fd_buf;
1052
1053         /* Free Descriptors (for Receive) */
1054         lp->rfd_base = (struct RxFD *)fd_addr;
1055         fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
1056         for (i = 0; i < RX_FD_NUM; i++)
1057                 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
1058         lp->rfd_cur = lp->rfd_base;
1059         lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
1060
1061         /* Transmit Descriptors */
1062         lp->tfd_base = (struct TxFD *)fd_addr;
1063         fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
1064         for (i = 0; i < TX_FD_NUM; i++) {
1065                 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
1066                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1067                 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
1068         }
1069         lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
1070         lp->tfd_start = 0;
1071         lp->tfd_end = 0;
1072
1073         /* Buffer List (for Receive) */
1074         lp->fbl_ptr = (struct FrFD *)fd_addr;
1075         lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
1076         lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
1077 #ifndef TC35815_USE_PACKEDBUFFER
1078         /*
1079          * move all allocated skbs to head of rx_skbs[] array.
1080          * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
1081          * tc35815_rx() had failed.
1082          */
1083         lp->fbl_count = 0;
1084         for (i = 0; i < RX_BUF_NUM; i++) {
1085                 if (lp->rx_skbs[i].skb) {
1086                         if (i != lp->fbl_count) {
1087                                 lp->rx_skbs[lp->fbl_count].skb =
1088                                         lp->rx_skbs[i].skb;
1089                                 lp->rx_skbs[lp->fbl_count].skb_dma =
1090                                         lp->rx_skbs[i].skb_dma;
1091                         }
1092                         lp->fbl_count++;
1093                 }
1094         }
1095 #endif
1096         for (i = 0; i < RX_BUF_NUM; i++) {
1097 #ifdef TC35815_USE_PACKEDBUFFER
1098                 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
1099 #else
1100                 if (i >= lp->fbl_count) {
1101                         lp->fbl_ptr->bd[i].BuffData = 0;
1102                         lp->fbl_ptr->bd[i].BDCtl = 0;
1103                         continue;
1104                 }
1105                 lp->fbl_ptr->bd[i].BuffData =
1106                         cpu_to_le32(lp->rx_skbs[i].skb_dma);
1107 #endif
1108                 /* BDID is index of FrFD.bd[] */
1109                 lp->fbl_ptr->bd[i].BDCtl =
1110                         cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
1111                                     RX_BUF_SIZE);
1112         }
1113 #ifdef TC35815_USE_PACKEDBUFFER
1114         lp->fbl_curid = 0;
1115 #endif
1116
1117         printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
1118                dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
1119         return 0;
1120 }
1121
1122 static void
1123 tc35815_clear_queues(struct net_device *dev)
1124 {
1125         struct tc35815_local *lp = netdev_priv(dev);
1126         int i;
1127
1128         for (i = 0; i < TX_FD_NUM; i++) {
1129                 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1130                 struct sk_buff *skb =
1131                         fdsystem != 0xffffffff ?
1132                         lp->tx_skbs[fdsystem].skb : NULL;
1133 #ifdef DEBUG
1134                 if (lp->tx_skbs[i].skb != skb) {
1135                         printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1136                         panic_queues(dev);
1137                 }
1138 #else
1139                 BUG_ON(lp->tx_skbs[i].skb != skb);
1140 #endif
1141                 if (skb) {
1142                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1143                         lp->tx_skbs[i].skb = NULL;
1144                         lp->tx_skbs[i].skb_dma = 0;
1145                         dev_kfree_skb_any(skb);
1146                 }
1147                 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1148         }
1149
1150         tc35815_init_queues(dev);
1151 }
1152
1153 static void
1154 tc35815_free_queues(struct net_device *dev)
1155 {
1156         struct tc35815_local *lp = netdev_priv(dev);
1157         int i;
1158
1159         if (lp->tfd_base) {
1160                 for (i = 0; i < TX_FD_NUM; i++) {
1161                         u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1162                         struct sk_buff *skb =
1163                                 fdsystem != 0xffffffff ?
1164                                 lp->tx_skbs[fdsystem].skb : NULL;
1165 #ifdef DEBUG
1166                         if (lp->tx_skbs[i].skb != skb) {
1167                                 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1168                                 panic_queues(dev);
1169                         }
1170 #else
1171                         BUG_ON(lp->tx_skbs[i].skb != skb);
1172 #endif
1173                         if (skb) {
1174                                 dev_kfree_skb(skb);
1175                                 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1176                                 lp->tx_skbs[i].skb = NULL;
1177                                 lp->tx_skbs[i].skb_dma = 0;
1178                         }
1179                         lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1180                 }
1181         }
1182
1183         lp->rfd_base = NULL;
1184         lp->rfd_limit = NULL;
1185         lp->rfd_cur = NULL;
1186         lp->fbl_ptr = NULL;
1187
1188         for (i = 0; i < RX_BUF_NUM; i++) {
1189 #ifdef TC35815_USE_PACKEDBUFFER
1190                 if (lp->data_buf[i]) {
1191                         free_rxbuf_page(lp->pci_dev,
1192                                         lp->data_buf[i], lp->data_buf_dma[i]);
1193                         lp->data_buf[i] = NULL;
1194                 }
1195 #else
1196                 if (lp->rx_skbs[i].skb) {
1197                         free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1198                                        lp->rx_skbs[i].skb_dma);
1199                         lp->rx_skbs[i].skb = NULL;
1200                 }
1201 #endif
1202         }
1203         if (lp->fd_buf) {
1204                 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1205                                     lp->fd_buf, lp->fd_buf_dma);
1206                 lp->fd_buf = NULL;
1207         }
1208 }
1209
1210 static void
1211 dump_txfd(struct TxFD *fd)
1212 {
1213         printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1214                le32_to_cpu(fd->fd.FDNext),
1215                le32_to_cpu(fd->fd.FDSystem),
1216                le32_to_cpu(fd->fd.FDStat),
1217                le32_to_cpu(fd->fd.FDCtl));
1218         printk("BD: ");
1219         printk(" %08x %08x",
1220                le32_to_cpu(fd->bd.BuffData),
1221                le32_to_cpu(fd->bd.BDCtl));
1222         printk("\n");
1223 }
1224
1225 static int
1226 dump_rxfd(struct RxFD *fd)
1227 {
1228         int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1229         if (bd_count > 8)
1230                 bd_count = 8;
1231         printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1232                le32_to_cpu(fd->fd.FDNext),
1233                le32_to_cpu(fd->fd.FDSystem),
1234                le32_to_cpu(fd->fd.FDStat),
1235                le32_to_cpu(fd->fd.FDCtl));
1236         if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1237                 return 0;
1238         printk("BD: ");
1239         for (i = 0; i < bd_count; i++)
1240                 printk(" %08x %08x",
1241                        le32_to_cpu(fd->bd[i].BuffData),
1242                        le32_to_cpu(fd->bd[i].BDCtl));
1243         printk("\n");
1244         return bd_count;
1245 }
1246
1247 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1248 static void
1249 dump_frfd(struct FrFD *fd)
1250 {
1251         int i;
1252         printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1253                le32_to_cpu(fd->fd.FDNext),
1254                le32_to_cpu(fd->fd.FDSystem),
1255                le32_to_cpu(fd->fd.FDStat),
1256                le32_to_cpu(fd->fd.FDCtl));
1257         printk("BD: ");
1258         for (i = 0; i < RX_BUF_NUM; i++)
1259                 printk(" %08x %08x",
1260                        le32_to_cpu(fd->bd[i].BuffData),
1261                        le32_to_cpu(fd->bd[i].BDCtl));
1262         printk("\n");
1263 }
1264 #endif
1265
1266 #ifdef DEBUG
1267 static void
1268 panic_queues(struct net_device *dev)
1269 {
1270         struct tc35815_local *lp = netdev_priv(dev);
1271         int i;
1272
1273         printk("TxFD base %p, start %u, end %u\n",
1274                lp->tfd_base, lp->tfd_start, lp->tfd_end);
1275         printk("RxFD base %p limit %p cur %p\n",
1276                lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1277         printk("FrFD %p\n", lp->fbl_ptr);
1278         for (i = 0; i < TX_FD_NUM; i++)
1279                 dump_txfd(&lp->tfd_base[i]);
1280         for (i = 0; i < RX_FD_NUM; i++) {
1281                 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1282                 i += (bd_count + 1) / 2;        /* skip BDs */
1283         }
1284         dump_frfd(lp->fbl_ptr);
1285         panic("%s: Illegal queue state.", dev->name);
1286 }
1287 #endif
1288
1289 static void print_eth(const u8 *add)
1290 {
1291         printk(KERN_DEBUG "print_eth(%p)\n", add);
1292         printk(KERN_DEBUG " %pM => %pM : %02x%02x\n",
1293                 add + 6, add, add[12], add[13]);
1294 }
1295
1296 static int tc35815_tx_full(struct net_device *dev)
1297 {
1298         struct tc35815_local *lp = netdev_priv(dev);
1299         return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1300 }
1301
1302 static void tc35815_restart(struct net_device *dev)
1303 {
1304         struct tc35815_local *lp = netdev_priv(dev);
1305
1306         if (lp->phy_dev) {
1307                 int timeout;
1308
1309                 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1310                 timeout = 100;
1311                 while (--timeout) {
1312                         if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1313                                 break;
1314                         udelay(1);
1315                 }
1316                 if (!timeout)
1317                         printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1318         }
1319
1320         spin_lock_irq(&lp->lock);
1321         tc35815_chip_reset(dev);
1322         tc35815_clear_queues(dev);
1323         tc35815_chip_init(dev);
1324         /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1325         tc35815_set_multicast_list(dev);
1326         spin_unlock_irq(&lp->lock);
1327
1328         netif_wake_queue(dev);
1329 }
1330
1331 static void tc35815_restart_work(struct work_struct *work)
1332 {
1333         struct tc35815_local *lp =
1334                 container_of(work, struct tc35815_local, restart_work);
1335         struct net_device *dev = lp->dev;
1336
1337         tc35815_restart(dev);
1338 }
1339
1340 static void tc35815_schedule_restart(struct net_device *dev)
1341 {
1342         struct tc35815_local *lp = netdev_priv(dev);
1343         struct tc35815_regs __iomem *tr =
1344                 (struct tc35815_regs __iomem *)dev->base_addr;
1345
1346         /* disable interrupts */
1347         tc_writel(0, &tr->Int_En);
1348         tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1349         schedule_work(&lp->restart_work);
1350 }
1351
1352 static void tc35815_tx_timeout(struct net_device *dev)
1353 {
1354         struct tc35815_regs __iomem *tr =
1355                 (struct tc35815_regs __iomem *)dev->base_addr;
1356
1357         printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1358                dev->name, tc_readl(&tr->Tx_Stat));
1359
1360         /* Try to restart the adaptor. */
1361         tc35815_schedule_restart(dev);
1362         dev->stats.tx_errors++;
1363 }
1364
1365 /*
1366  * Open/initialize the controller. This is called (in the current kernel)
1367  * sometime after booting when the 'ifconfig' program is run.
1368  *
1369  * This routine should set everything up anew at each open, even
1370  * registers that "should" only need to be set once at boot, so that
1371  * there is non-reboot way to recover if something goes wrong.
1372  */
1373 static int
1374 tc35815_open(struct net_device *dev)
1375 {
1376         struct tc35815_local *lp = netdev_priv(dev);
1377
1378         /*
1379          * This is used if the interrupt line can turned off (shared).
1380          * See 3c503.c for an example of selecting the IRQ at config-time.
1381          */
1382         if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
1383                         dev->name, dev))
1384                 return -EAGAIN;
1385
1386         tc35815_chip_reset(dev);
1387
1388         if (tc35815_init_queues(dev) != 0) {
1389                 free_irq(dev->irq, dev);
1390                 return -EAGAIN;
1391         }
1392
1393 #ifdef TC35815_NAPI
1394         napi_enable(&lp->napi);
1395 #endif
1396
1397         /* Reset the hardware here. Don't forget to set the station address. */
1398         spin_lock_irq(&lp->lock);
1399         tc35815_chip_init(dev);
1400         spin_unlock_irq(&lp->lock);
1401
1402         netif_carrier_off(dev);
1403         /* schedule a link state check */
1404         phy_start(lp->phy_dev);
1405
1406         /* We are now ready to accept transmit requeusts from
1407          * the queueing layer of the networking.
1408          */
1409         netif_start_queue(dev);
1410
1411         return 0;
1412 }
1413
1414 /* This will only be invoked if your driver is _not_ in XOFF state.
1415  * What this means is that you need not check it, and that this
1416  * invariant will hold if you make sure that the netif_*_queue()
1417  * calls are done at the proper times.
1418  */
1419 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1420 {
1421         struct tc35815_local *lp = netdev_priv(dev);
1422         struct TxFD *txfd;
1423         unsigned long flags;
1424
1425         /* If some error occurs while trying to transmit this
1426          * packet, you should return '1' from this function.
1427          * In such a case you _may not_ do anything to the
1428          * SKB, it is still owned by the network queueing
1429          * layer when an error is returned.  This means you
1430          * may not modify any SKB fields, you may not free
1431          * the SKB, etc.
1432          */
1433
1434         /* This is the most common case for modern hardware.
1435          * The spinlock protects this code from the TX complete
1436          * hardware interrupt handler.  Queue flow control is
1437          * thus managed under this lock as well.
1438          */
1439         spin_lock_irqsave(&lp->lock, flags);
1440
1441         /* failsafe... (handle txdone now if half of FDs are used) */
1442         if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1443             TX_FD_NUM / 2)
1444                 tc35815_txdone(dev);
1445
1446         if (netif_msg_pktdata(lp))
1447                 print_eth(skb->data);
1448 #ifdef DEBUG
1449         if (lp->tx_skbs[lp->tfd_start].skb) {
1450                 printk("%s: tx_skbs conflict.\n", dev->name);
1451                 panic_queues(dev);
1452         }
1453 #else
1454         BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1455 #endif
1456         lp->tx_skbs[lp->tfd_start].skb = skb;
1457         lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1458
1459         /*add to ring */
1460         txfd = &lp->tfd_base[lp->tfd_start];
1461         txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1462         txfd->bd.BDCtl = cpu_to_le32(skb->len);
1463         txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1464         txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1465
1466         if (lp->tfd_start == lp->tfd_end) {
1467                 struct tc35815_regs __iomem *tr =
1468                         (struct tc35815_regs __iomem *)dev->base_addr;
1469                 /* Start DMA Transmitter. */
1470                 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1471 #ifdef GATHER_TXINT
1472                 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1473 #endif
1474                 if (netif_msg_tx_queued(lp)) {
1475                         printk("%s: starting TxFD.\n", dev->name);
1476                         dump_txfd(txfd);
1477                 }
1478                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1479         } else {
1480                 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1481                 if (netif_msg_tx_queued(lp)) {
1482                         printk("%s: queueing TxFD.\n", dev->name);
1483                         dump_txfd(txfd);
1484                 }
1485         }
1486         lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1487
1488         dev->trans_start = jiffies;
1489
1490         /* If we just used up the very last entry in the
1491          * TX ring on this device, tell the queueing
1492          * layer to send no more.
1493          */
1494         if (tc35815_tx_full(dev)) {
1495                 if (netif_msg_tx_queued(lp))
1496                         printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1497                 netif_stop_queue(dev);
1498         }
1499
1500         /* When the TX completion hw interrupt arrives, this
1501          * is when the transmit statistics are updated.
1502          */
1503
1504         spin_unlock_irqrestore(&lp->lock, flags);
1505         return 0;
1506 }
1507
1508 #define FATAL_ERROR_INT \
1509         (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1510 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1511 {
1512         static int count;
1513         printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1514                dev->name, status);
1515         if (status & Int_IntPCI)
1516                 printk(" IntPCI");
1517         if (status & Int_DmParErr)
1518                 printk(" DmParErr");
1519         if (status & Int_IntNRAbt)
1520                 printk(" IntNRAbt");
1521         printk("\n");
1522         if (count++ > 100)
1523                 panic("%s: Too many fatal errors.", dev->name);
1524         printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1525         /* Try to restart the adaptor. */
1526         tc35815_schedule_restart(dev);
1527 }
1528
1529 #ifdef TC35815_NAPI
1530 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1531 #else
1532 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1533 #endif
1534 {
1535         struct tc35815_local *lp = netdev_priv(dev);
1536         struct tc35815_regs __iomem *tr =
1537                 (struct tc35815_regs __iomem *)dev->base_addr;
1538         int ret = -1;
1539
1540         /* Fatal errors... */
1541         if (status & FATAL_ERROR_INT) {
1542                 tc35815_fatal_error_interrupt(dev, status);
1543                 return 0;
1544         }
1545         /* recoverable errors */
1546         if (status & Int_IntFDAEx) {
1547                 /* disable FDAEx int. (until we make rooms...) */
1548                 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1549                 printk(KERN_WARNING
1550                        "%s: Free Descriptor Area Exhausted (%#x).\n",
1551                        dev->name, status);
1552                 dev->stats.rx_dropped++;
1553                 ret = 0;
1554         }
1555         if (status & Int_IntBLEx) {
1556                 /* disable BLEx int. (until we make rooms...) */
1557                 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1558                 printk(KERN_WARNING
1559                        "%s: Buffer List Exhausted (%#x).\n",
1560                        dev->name, status);
1561                 dev->stats.rx_dropped++;
1562                 ret = 0;
1563         }
1564         if (status & Int_IntExBD) {
1565                 printk(KERN_WARNING
1566                        "%s: Excessive Buffer Descriptiors (%#x).\n",
1567                        dev->name, status);
1568                 dev->stats.rx_length_errors++;
1569                 ret = 0;
1570         }
1571
1572         /* normal notification */
1573         if (status & Int_IntMacRx) {
1574                 /* Got a packet(s). */
1575 #ifdef TC35815_NAPI
1576                 ret = tc35815_rx(dev, limit);
1577 #else
1578                 tc35815_rx(dev);
1579                 ret = 0;
1580 #endif
1581                 lp->lstats.rx_ints++;
1582         }
1583         if (status & Int_IntMacTx) {
1584                 /* Transmit complete. */
1585                 lp->lstats.tx_ints++;
1586                 tc35815_txdone(dev);
1587                 netif_wake_queue(dev);
1588                 ret = 0;
1589         }
1590         return ret;
1591 }
1592
1593 /*
1594  * The typical workload of the driver:
1595  * Handle the network interface interrupts.
1596  */
1597 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1598 {
1599         struct net_device *dev = dev_id;
1600         struct tc35815_local *lp = netdev_priv(dev);
1601         struct tc35815_regs __iomem *tr =
1602                 (struct tc35815_regs __iomem *)dev->base_addr;
1603 #ifdef TC35815_NAPI
1604         u32 dmactl = tc_readl(&tr->DMA_Ctl);
1605
1606         if (!(dmactl & DMA_IntMask)) {
1607                 /* disable interrupts */
1608                 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1609                 if (netif_rx_schedule_prep(dev, &lp->napi))
1610                         __netif_rx_schedule(dev, &lp->napi);
1611                 else {
1612                         printk(KERN_ERR "%s: interrupt taken in poll\n",
1613                                dev->name);
1614                         BUG();
1615                 }
1616                 (void)tc_readl(&tr->Int_Src);   /* flush */
1617                 return IRQ_HANDLED;
1618         }
1619         return IRQ_NONE;
1620 #else
1621         int handled;
1622         u32 status;
1623
1624         spin_lock(&lp->lock);
1625         status = tc_readl(&tr->Int_Src);
1626         tc_writel(status, &tr->Int_Src);        /* write to clear */
1627         handled = tc35815_do_interrupt(dev, status);
1628         (void)tc_readl(&tr->Int_Src);   /* flush */
1629         spin_unlock(&lp->lock);
1630         return IRQ_RETVAL(handled >= 0);
1631 #endif /* TC35815_NAPI */
1632 }
1633
1634 #ifdef CONFIG_NET_POLL_CONTROLLER
1635 static void tc35815_poll_controller(struct net_device *dev)
1636 {
1637         disable_irq(dev->irq);
1638         tc35815_interrupt(dev->irq, dev);
1639         enable_irq(dev->irq);
1640 }
1641 #endif
1642
1643 /* We have a good packet(s), get it/them out of the buffers. */
1644 #ifdef TC35815_NAPI
1645 static int
1646 tc35815_rx(struct net_device *dev, int limit)
1647 #else
1648 static void
1649 tc35815_rx(struct net_device *dev)
1650 #endif
1651 {
1652         struct tc35815_local *lp = netdev_priv(dev);
1653         unsigned int fdctl;
1654         int i;
1655         int buf_free_count = 0;
1656         int fd_free_count = 0;
1657 #ifdef TC35815_NAPI
1658         int received = 0;
1659 #endif
1660
1661         while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1662                 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1663                 int pkt_len = fdctl & FD_FDLength_MASK;
1664                 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1665 #ifdef DEBUG
1666                 struct RxFD *next_rfd;
1667 #endif
1668 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1669                 pkt_len -= 4;
1670 #endif
1671
1672                 if (netif_msg_rx_status(lp))
1673                         dump_rxfd(lp->rfd_cur);
1674                 if (status & Rx_Good) {
1675                         struct sk_buff *skb;
1676                         unsigned char *data;
1677                         int cur_bd;
1678 #ifdef TC35815_USE_PACKEDBUFFER
1679                         int offset;
1680 #endif
1681
1682 #ifdef TC35815_NAPI
1683                         if (--limit < 0)
1684                                 break;
1685 #endif
1686 #ifdef TC35815_USE_PACKEDBUFFER
1687                         BUG_ON(bd_count > 2);
1688                         skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1689                         if (skb == NULL) {
1690                                 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1691                                        dev->name);
1692                                 dev->stats.rx_dropped++;
1693                                 break;
1694                         }
1695                         skb_reserve(skb, 2);   /* 16 bit alignment */
1696
1697                         data = skb_put(skb, pkt_len);
1698
1699                         /* copy from receive buffer */
1700                         cur_bd = 0;
1701                         offset = 0;
1702                         while (offset < pkt_len && cur_bd < bd_count) {
1703                                 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1704                                         BD_BuffLength_MASK;
1705                                 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1706                                 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1707                                 if (offset + len > pkt_len)
1708                                         len = pkt_len - offset;
1709 #ifdef TC35815_DMA_SYNC_ONDEMAND
1710                                 pci_dma_sync_single_for_cpu(lp->pci_dev,
1711                                                             dma, len,
1712                                                             PCI_DMA_FROMDEVICE);
1713 #endif
1714                                 memcpy(data + offset, rxbuf, len);
1715 #ifdef TC35815_DMA_SYNC_ONDEMAND
1716                                 pci_dma_sync_single_for_device(lp->pci_dev,
1717                                                                dma, len,
1718                                                                PCI_DMA_FROMDEVICE);
1719 #endif
1720                                 offset += len;
1721                                 cur_bd++;
1722                         }
1723 #else /* TC35815_USE_PACKEDBUFFER */
1724                         BUG_ON(bd_count > 1);
1725                         cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1726                                   & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1727 #ifdef DEBUG
1728                         if (cur_bd >= RX_BUF_NUM) {
1729                                 printk("%s: invalid BDID.\n", dev->name);
1730                                 panic_queues(dev);
1731                         }
1732                         BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1733                                (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1734                         if (!lp->rx_skbs[cur_bd].skb) {
1735                                 printk("%s: NULL skb.\n", dev->name);
1736                                 panic_queues(dev);
1737                         }
1738 #else
1739                         BUG_ON(cur_bd >= RX_BUF_NUM);
1740 #endif
1741                         skb = lp->rx_skbs[cur_bd].skb;
1742                         prefetch(skb->data);
1743                         lp->rx_skbs[cur_bd].skb = NULL;
1744                         pci_unmap_single(lp->pci_dev,
1745                                          lp->rx_skbs[cur_bd].skb_dma,
1746                                          RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1747                         if (!HAVE_DMA_RXALIGN(lp))
1748                                 memmove(skb->data, skb->data - 2, pkt_len);
1749                         data = skb_put(skb, pkt_len);
1750 #endif /* TC35815_USE_PACKEDBUFFER */
1751                         if (netif_msg_pktdata(lp))
1752                                 print_eth(data);
1753                         skb->protocol = eth_type_trans(skb, dev);
1754 #ifdef TC35815_NAPI
1755                         netif_receive_skb(skb);
1756                         received++;
1757 #else
1758                         netif_rx(skb);
1759 #endif
1760                         dev->stats.rx_packets++;
1761                         dev->stats.rx_bytes += pkt_len;
1762                 } else {
1763                         dev->stats.rx_errors++;
1764                         printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1765                                dev->name, status & Rx_Stat_Mask);
1766                         /* WORKAROUND: LongErr and CRCErr means Overflow. */
1767                         if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1768                                 status &= ~(Rx_LongErr|Rx_CRCErr);
1769                                 status |= Rx_Over;
1770                         }
1771                         if (status & Rx_LongErr)
1772                                 dev->stats.rx_length_errors++;
1773                         if (status & Rx_Over)
1774                                 dev->stats.rx_fifo_errors++;
1775                         if (status & Rx_CRCErr)
1776                                 dev->stats.rx_crc_errors++;
1777                         if (status & Rx_Align)
1778                                 dev->stats.rx_frame_errors++;
1779                 }
1780
1781                 if (bd_count > 0) {
1782                         /* put Free Buffer back to controller */
1783                         int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1784                         unsigned char id =
1785                                 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1786 #ifdef DEBUG
1787                         if (id >= RX_BUF_NUM) {
1788                                 printk("%s: invalid BDID.\n", dev->name);
1789                                 panic_queues(dev);
1790                         }
1791 #else
1792                         BUG_ON(id >= RX_BUF_NUM);
1793 #endif
1794                         /* free old buffers */
1795 #ifdef TC35815_USE_PACKEDBUFFER
1796                         while (lp->fbl_curid != id)
1797 #else
1798                         lp->fbl_count--;
1799                         while (lp->fbl_count < RX_BUF_NUM)
1800 #endif
1801                         {
1802 #ifdef TC35815_USE_PACKEDBUFFER
1803                                 unsigned char curid = lp->fbl_curid;
1804 #else
1805                                 unsigned char curid =
1806                                         (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1807 #endif
1808                                 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1809 #ifdef DEBUG
1810                                 bdctl = le32_to_cpu(bd->BDCtl);
1811                                 if (bdctl & BD_CownsBD) {
1812                                         printk("%s: Freeing invalid BD.\n",
1813                                                dev->name);
1814                                         panic_queues(dev);
1815                                 }
1816 #endif
1817                                 /* pass BD to controller */
1818 #ifndef TC35815_USE_PACKEDBUFFER
1819                                 if (!lp->rx_skbs[curid].skb) {
1820                                         lp->rx_skbs[curid].skb =
1821                                                 alloc_rxbuf_skb(dev,
1822                                                                 lp->pci_dev,
1823                                                                 &lp->rx_skbs[curid].skb_dma);
1824                                         if (!lp->rx_skbs[curid].skb)
1825                                                 break; /* try on next reception */
1826                                         bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1827                                 }
1828 #endif /* TC35815_USE_PACKEDBUFFER */
1829                                 /* Note: BDLength was modified by chip. */
1830                                 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1831                                                         (curid << BD_RxBDID_SHIFT) |
1832                                                         RX_BUF_SIZE);
1833 #ifdef TC35815_USE_PACKEDBUFFER
1834                                 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1835                                 if (netif_msg_rx_status(lp)) {
1836                                         printk("%s: Entering new FBD %d\n",
1837                                                dev->name, lp->fbl_curid);
1838                                         dump_frfd(lp->fbl_ptr);
1839                                 }
1840 #else
1841                                 lp->fbl_count++;
1842 #endif
1843                                 buf_free_count++;
1844                         }
1845                 }
1846
1847                 /* put RxFD back to controller */
1848 #ifdef DEBUG
1849                 next_rfd = fd_bus_to_virt(lp,
1850                                           le32_to_cpu(lp->rfd_cur->fd.FDNext));
1851                 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1852                         printk("%s: RxFD FDNext invalid.\n", dev->name);
1853                         panic_queues(dev);
1854                 }
1855 #endif
1856                 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1857                         /* pass FD to controller */
1858 #ifdef DEBUG
1859                         lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1860 #else
1861                         lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1862 #endif
1863                         lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1864                         lp->rfd_cur++;
1865                         fd_free_count++;
1866                 }
1867                 if (lp->rfd_cur > lp->rfd_limit)
1868                         lp->rfd_cur = lp->rfd_base;
1869 #ifdef DEBUG
1870                 if (lp->rfd_cur != next_rfd)
1871                         printk("rfd_cur = %p, next_rfd %p\n",
1872                                lp->rfd_cur, next_rfd);
1873 #endif
1874         }
1875
1876         /* re-enable BL/FDA Exhaust interrupts. */
1877         if (fd_free_count) {
1878                 struct tc35815_regs __iomem *tr =
1879                         (struct tc35815_regs __iomem *)dev->base_addr;
1880                 u32 en, en_old = tc_readl(&tr->Int_En);
1881                 en = en_old | Int_FDAExEn;
1882                 if (buf_free_count)
1883                         en |= Int_BLExEn;
1884                 if (en != en_old)
1885                         tc_writel(en, &tr->Int_En);
1886         }
1887 #ifdef TC35815_NAPI
1888         return received;
1889 #endif
1890 }
1891
1892 #ifdef TC35815_NAPI
1893 static int tc35815_poll(struct napi_struct *napi, int budget)
1894 {
1895         struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
1896         struct net_device *dev = lp->dev;
1897         struct tc35815_regs __iomem *tr =
1898                 (struct tc35815_regs __iomem *)dev->base_addr;
1899         int received = 0, handled;
1900         u32 status;
1901
1902         spin_lock(&lp->lock);
1903         status = tc_readl(&tr->Int_Src);
1904         do {
1905                 tc_writel(status, &tr->Int_Src);        /* write to clear */
1906
1907                 handled = tc35815_do_interrupt(dev, status, limit);
1908                 if (handled >= 0) {
1909                         received += handled;
1910                         if (received >= budget)
1911                                 break;
1912                 }
1913                 status = tc_readl(&tr->Int_Src);
1914         } while (status);
1915         spin_unlock(&lp->lock);
1916
1917         if (received < budget) {
1918                 netif_rx_complete(dev, napi);
1919                 /* enable interrupts */
1920                 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1921         }
1922         return received;
1923 }
1924 #endif
1925
1926 #ifdef NO_CHECK_CARRIER
1927 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1928 #else
1929 #define TX_STA_ERR      (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1930 #endif
1931
1932 static void
1933 tc35815_check_tx_stat(struct net_device *dev, int status)
1934 {
1935         struct tc35815_local *lp = netdev_priv(dev);
1936         const char *msg = NULL;
1937
1938         /* count collisions */
1939         if (status & Tx_ExColl)
1940                 dev->stats.collisions += 16;
1941         if (status & Tx_TxColl_MASK)
1942                 dev->stats.collisions += status & Tx_TxColl_MASK;
1943
1944 #ifndef NO_CHECK_CARRIER
1945         /* TX4939 does not have NCarr */
1946         if (lp->chiptype == TC35815_TX4939)
1947                 status &= ~Tx_NCarr;
1948 #ifdef WORKAROUND_LOSTCAR
1949         /* WORKAROUND: ignore LostCrS in full duplex operation */
1950         if (!lp->link || lp->duplex == DUPLEX_FULL)
1951                 status &= ~Tx_NCarr;
1952 #endif
1953 #endif
1954
1955         if (!(status & TX_STA_ERR)) {
1956                 /* no error. */
1957                 dev->stats.tx_packets++;
1958                 return;
1959         }
1960
1961         dev->stats.tx_errors++;
1962         if (status & Tx_ExColl) {
1963                 dev->stats.tx_aborted_errors++;
1964                 msg = "Excessive Collision.";
1965         }
1966         if (status & Tx_Under) {
1967                 dev->stats.tx_fifo_errors++;
1968                 msg = "Tx FIFO Underrun.";
1969                 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1970                         lp->lstats.tx_underrun++;
1971                         if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1972                                 struct tc35815_regs __iomem *tr =
1973                                         (struct tc35815_regs __iomem *)dev->base_addr;
1974                                 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1975                                 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1976                         }
1977                 }
1978         }
1979         if (status & Tx_Defer) {
1980                 dev->stats.tx_fifo_errors++;
1981                 msg = "Excessive Deferral.";
1982         }
1983 #ifndef NO_CHECK_CARRIER
1984         if (status & Tx_NCarr) {
1985                 dev->stats.tx_carrier_errors++;
1986                 msg = "Lost Carrier Sense.";
1987         }
1988 #endif
1989         if (status & Tx_LateColl) {
1990                 dev->stats.tx_aborted_errors++;
1991                 msg = "Late Collision.";
1992         }
1993         if (status & Tx_TxPar) {
1994                 dev->stats.tx_fifo_errors++;
1995                 msg = "Transmit Parity Error.";
1996         }
1997         if (status & Tx_SQErr) {
1998                 dev->stats.tx_heartbeat_errors++;
1999                 msg = "Signal Quality Error.";
2000         }
2001         if (msg && netif_msg_tx_err(lp))
2002                 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
2003 }
2004
2005 /* This handles TX complete events posted by the device
2006  * via interrupts.
2007  */
2008 static void
2009 tc35815_txdone(struct net_device *dev)
2010 {
2011         struct tc35815_local *lp = netdev_priv(dev);
2012         struct TxFD *txfd;
2013         unsigned int fdctl;
2014
2015         txfd = &lp->tfd_base[lp->tfd_end];
2016         while (lp->tfd_start != lp->tfd_end &&
2017                !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
2018                 int status = le32_to_cpu(txfd->fd.FDStat);
2019                 struct sk_buff *skb;
2020                 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
2021                 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
2022
2023                 if (netif_msg_tx_done(lp)) {
2024                         printk("%s: complete TxFD.\n", dev->name);
2025                         dump_txfd(txfd);
2026                 }
2027                 tc35815_check_tx_stat(dev, status);
2028
2029                 skb = fdsystem != 0xffffffff ?
2030                         lp->tx_skbs[fdsystem].skb : NULL;
2031 #ifdef DEBUG
2032                 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
2033                         printk("%s: tx_skbs mismatch.\n", dev->name);
2034                         panic_queues(dev);
2035                 }
2036 #else
2037                 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
2038 #endif
2039                 if (skb) {
2040                         dev->stats.tx_bytes += skb->len;
2041                         pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
2042                         lp->tx_skbs[lp->tfd_end].skb = NULL;
2043                         lp->tx_skbs[lp->tfd_end].skb_dma = 0;
2044 #ifdef TC35815_NAPI
2045                         dev_kfree_skb_any(skb);
2046 #else
2047                         dev_kfree_skb_irq(skb);
2048 #endif
2049                 }
2050                 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
2051
2052                 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
2053                 txfd = &lp->tfd_base[lp->tfd_end];
2054 #ifdef DEBUG
2055                 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
2056                         printk("%s: TxFD FDNext invalid.\n", dev->name);
2057                         panic_queues(dev);
2058                 }
2059 #endif
2060                 if (fdnext & FD_Next_EOL) {
2061                         /* DMA Transmitter has been stopping... */
2062                         if (lp->tfd_end != lp->tfd_start) {
2063                                 struct tc35815_regs __iomem *tr =
2064                                         (struct tc35815_regs __iomem *)dev->base_addr;
2065                                 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
2066                                 struct TxFD *txhead = &lp->tfd_base[head];
2067                                 int qlen = (lp->tfd_start + TX_FD_NUM
2068                                             - lp->tfd_end) % TX_FD_NUM;
2069
2070 #ifdef DEBUG
2071                                 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
2072                                         printk("%s: TxFD FDCtl invalid.\n", dev->name);
2073                                         panic_queues(dev);
2074                                 }
2075 #endif
2076                                 /* log max queue length */
2077                                 if (lp->lstats.max_tx_qlen < qlen)
2078                                         lp->lstats.max_tx_qlen = qlen;
2079
2080
2081                                 /* start DMA Transmitter again */
2082                                 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
2083 #ifdef GATHER_TXINT
2084                                 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
2085 #endif
2086                                 if (netif_msg_tx_queued(lp)) {
2087                                         printk("%s: start TxFD on queue.\n",
2088                                                dev->name);
2089                                         dump_txfd(txfd);
2090                                 }
2091                                 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
2092                         }
2093                         break;
2094                 }
2095         }
2096
2097         /* If we had stopped the queue due to a "tx full"
2098          * condition, and space has now been made available,
2099          * wake up the queue.
2100          */
2101         if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
2102                 netif_wake_queue(dev);
2103 }
2104
2105 /* The inverse routine to tc35815_open(). */
2106 static int
2107 tc35815_close(struct net_device *dev)
2108 {
2109         struct tc35815_local *lp = netdev_priv(dev);
2110
2111         netif_stop_queue(dev);
2112 #ifdef TC35815_NAPI
2113         napi_disable(&lp->napi);
2114 #endif
2115         if (lp->phy_dev)
2116                 phy_stop(lp->phy_dev);
2117         cancel_work_sync(&lp->restart_work);
2118
2119         /* Flush the Tx and disable Rx here. */
2120         tc35815_chip_reset(dev);
2121         free_irq(dev->irq, dev);
2122
2123         tc35815_free_queues(dev);
2124
2125         return 0;
2126
2127 }
2128
2129 /*
2130  * Get the current statistics.
2131  * This may be called with the card open or closed.
2132  */
2133 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
2134 {
2135         struct tc35815_regs __iomem *tr =
2136                 (struct tc35815_regs __iomem *)dev->base_addr;
2137         if (netif_running(dev))
2138                 /* Update the statistics from the device registers. */
2139                 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
2140
2141         return &dev->stats;
2142 }
2143
2144 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
2145 {
2146         struct tc35815_local *lp = netdev_priv(dev);
2147         struct tc35815_regs __iomem *tr =
2148                 (struct tc35815_regs __iomem *)dev->base_addr;
2149         int cam_index = index * 6;
2150         u32 cam_data;
2151         u32 saved_addr;
2152
2153         saved_addr = tc_readl(&tr->CAM_Adr);
2154
2155         if (netif_msg_hw(lp))
2156                 printk(KERN_DEBUG "%s: CAM %d: %pM\n",
2157                         dev->name, index, addr);
2158         if (index & 1) {
2159                 /* read modify write */
2160                 tc_writel(cam_index - 2, &tr->CAM_Adr);
2161                 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
2162                 cam_data |= addr[0] << 8 | addr[1];
2163                 tc_writel(cam_data, &tr->CAM_Data);
2164                 /* write whole word */
2165                 tc_writel(cam_index + 2, &tr->CAM_Adr);
2166                 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2167                 tc_writel(cam_data, &tr->CAM_Data);
2168         } else {
2169                 /* write whole word */
2170                 tc_writel(cam_index, &tr->CAM_Adr);
2171                 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2172                 tc_writel(cam_data, &tr->CAM_Data);
2173                 /* read modify write */
2174                 tc_writel(cam_index + 4, &tr->CAM_Adr);
2175                 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2176                 cam_data |= addr[4] << 24 | (addr[5] << 16);
2177                 tc_writel(cam_data, &tr->CAM_Data);
2178         }
2179
2180         tc_writel(saved_addr, &tr->CAM_Adr);
2181 }
2182
2183
2184 /*
2185  * Set or clear the multicast filter for this adaptor.
2186  * num_addrs == -1      Promiscuous mode, receive all packets
2187  * num_addrs == 0       Normal mode, clear multicast list
2188  * num_addrs > 0        Multicast mode, receive normal and MC packets,
2189  *                      and do best-effort filtering.
2190  */
2191 static void
2192 tc35815_set_multicast_list(struct net_device *dev)
2193 {
2194         struct tc35815_regs __iomem *tr =
2195                 (struct tc35815_regs __iomem *)dev->base_addr;
2196
2197         if (dev->flags & IFF_PROMISC) {
2198 #ifdef WORKAROUND_100HALF_PROMISC
2199                 /* With some (all?) 100MHalf HUB, controller will hang
2200                  * if we enabled promiscuous mode before linkup... */
2201                 struct tc35815_local *lp = netdev_priv(dev);
2202
2203                 if (!lp->link)
2204                         return;
2205 #endif
2206                 /* Enable promiscuous mode */
2207                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2208         } else if ((dev->flags & IFF_ALLMULTI) ||
2209                   dev->mc_count > CAM_ENTRY_MAX - 3) {
2210                 /* CAM 0, 1, 20 are reserved. */
2211                 /* Disable promiscuous mode, use normal mode. */
2212                 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2213         } else if (dev->mc_count) {
2214                 struct dev_mc_list *cur_addr = dev->mc_list;
2215                 int i;
2216                 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2217
2218                 tc_writel(0, &tr->CAM_Ctl);
2219                 /* Walk the address list, and load the filter */
2220                 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2221                         if (!cur_addr)
2222                                 break;
2223                         /* entry 0,1 is reserved. */
2224                         tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2225                         ena_bits |= CAM_Ena_Bit(i + 2);
2226                 }
2227                 tc_writel(ena_bits, &tr->CAM_Ena);
2228                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2229         } else {
2230                 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2231                 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2232         }
2233 }
2234
2235 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2236 {
2237         struct tc35815_local *lp = netdev_priv(dev);
2238         strcpy(info->driver, MODNAME);
2239         strcpy(info->version, DRV_VERSION);
2240         strcpy(info->bus_info, pci_name(lp->pci_dev));
2241 }
2242
2243 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2244 {
2245         struct tc35815_local *lp = netdev_priv(dev);
2246
2247         if (!lp->phy_dev)
2248                 return -ENODEV;
2249         return phy_ethtool_gset(lp->phy_dev, cmd);
2250 }
2251
2252 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2253 {
2254         struct tc35815_local *lp = netdev_priv(dev);
2255
2256         if (!lp->phy_dev)
2257                 return -ENODEV;
2258         return phy_ethtool_sset(lp->phy_dev, cmd);
2259 }
2260
2261 static u32 tc35815_get_msglevel(struct net_device *dev)
2262 {
2263         struct tc35815_local *lp = netdev_priv(dev);
2264         return lp->msg_enable;
2265 }
2266
2267 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2268 {
2269         struct tc35815_local *lp = netdev_priv(dev);
2270         lp->msg_enable = datum;
2271 }
2272
2273 static int tc35815_get_sset_count(struct net_device *dev, int sset)
2274 {
2275         struct tc35815_local *lp = netdev_priv(dev);
2276
2277         switch (sset) {
2278         case ETH_SS_STATS:
2279                 return sizeof(lp->lstats) / sizeof(int);
2280         default:
2281                 return -EOPNOTSUPP;
2282         }
2283 }
2284
2285 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2286 {
2287         struct tc35815_local *lp = netdev_priv(dev);
2288         data[0] = lp->lstats.max_tx_qlen;
2289         data[1] = lp->lstats.tx_ints;
2290         data[2] = lp->lstats.rx_ints;
2291         data[3] = lp->lstats.tx_underrun;
2292 }
2293
2294 static struct {
2295         const char str[ETH_GSTRING_LEN];
2296 } ethtool_stats_keys[] = {
2297         { "max_tx_qlen" },
2298         { "tx_ints" },
2299         { "rx_ints" },
2300         { "tx_underrun" },
2301 };
2302
2303 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2304 {
2305         memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2306 }
2307
2308 static const struct ethtool_ops tc35815_ethtool_ops = {
2309         .get_drvinfo            = tc35815_get_drvinfo,
2310         .get_settings           = tc35815_get_settings,
2311         .set_settings           = tc35815_set_settings,
2312         .get_link               = ethtool_op_get_link,
2313         .get_msglevel           = tc35815_get_msglevel,
2314         .set_msglevel           = tc35815_set_msglevel,
2315         .get_strings            = tc35815_get_strings,
2316         .get_sset_count         = tc35815_get_sset_count,
2317         .get_ethtool_stats      = tc35815_get_ethtool_stats,
2318 };
2319
2320 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2321 {
2322         struct tc35815_local *lp = netdev_priv(dev);
2323
2324         if (!netif_running(dev))
2325                 return -EINVAL;
2326         if (!lp->phy_dev)
2327                 return -ENODEV;
2328         return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2329 }
2330
2331 static void tc35815_chip_reset(struct net_device *dev)
2332 {
2333         struct tc35815_regs __iomem *tr =
2334                 (struct tc35815_regs __iomem *)dev->base_addr;
2335         int i;
2336         /* reset the controller */
2337         tc_writel(MAC_Reset, &tr->MAC_Ctl);
2338         udelay(4); /* 3200ns */
2339         i = 0;
2340         while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2341                 if (i++ > 100) {
2342                         printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2343                         break;
2344                 }
2345                 mdelay(1);
2346         }
2347         tc_writel(0, &tr->MAC_Ctl);
2348
2349         /* initialize registers to default value */
2350         tc_writel(0, &tr->DMA_Ctl);
2351         tc_writel(0, &tr->TxThrsh);
2352         tc_writel(0, &tr->TxPollCtr);
2353         tc_writel(0, &tr->RxFragSize);
2354         tc_writel(0, &tr->Int_En);
2355         tc_writel(0, &tr->FDA_Bas);
2356         tc_writel(0, &tr->FDA_Lim);
2357         tc_writel(0xffffffff, &tr->Int_Src);    /* Write 1 to clear */
2358         tc_writel(0, &tr->CAM_Ctl);
2359         tc_writel(0, &tr->Tx_Ctl);
2360         tc_writel(0, &tr->Rx_Ctl);
2361         tc_writel(0, &tr->CAM_Ena);
2362         (void)tc_readl(&tr->Miss_Cnt);  /* Read to clear */
2363
2364         /* initialize internal SRAM */
2365         tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2366         for (i = 0; i < 0x1000; i += 4) {
2367                 tc_writel(i, &tr->CAM_Adr);
2368                 tc_writel(0, &tr->CAM_Data);
2369         }
2370         tc_writel(0, &tr->DMA_Ctl);
2371 }
2372
2373 static void tc35815_chip_init(struct net_device *dev)
2374 {
2375         struct tc35815_local *lp = netdev_priv(dev);
2376         struct tc35815_regs __iomem *tr =
2377                 (struct tc35815_regs __iomem *)dev->base_addr;
2378         unsigned long txctl = TX_CTL_CMD;
2379
2380         /* load station address to CAM */
2381         tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2382
2383         /* Enable CAM (broadcast and unicast) */
2384         tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2385         tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2386
2387         /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2388         if (HAVE_DMA_RXALIGN(lp))
2389                 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2390         else
2391                 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2392 #ifdef TC35815_USE_PACKEDBUFFER
2393         tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize);   /* Packing */
2394 #else
2395         tc_writel(ETH_ZLEN, &tr->RxFragSize);
2396 #endif
2397         tc_writel(0, &tr->TxPollCtr);   /* Batch mode */
2398         tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2399         tc_writel(INT_EN_CMD, &tr->Int_En);
2400
2401         /* set queues */
2402         tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2403         tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2404                   &tr->FDA_Lim);
2405         /*
2406          * Activation method:
2407          * First, enable the MAC Transmitter and the DMA Receive circuits.
2408          * Then enable the DMA Transmitter and the MAC Receive circuits.
2409          */
2410         tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr);      /* start DMA receiver */
2411         tc_writel(RX_CTL_CMD, &tr->Rx_Ctl);     /* start MAC receiver */
2412
2413         /* start MAC transmitter */
2414 #ifndef NO_CHECK_CARRIER
2415         /* TX4939 does not have EnLCarr */
2416         if (lp->chiptype == TC35815_TX4939)
2417                 txctl &= ~Tx_EnLCarr;
2418 #ifdef WORKAROUND_LOSTCAR
2419         /* WORKAROUND: ignore LostCrS in full duplex operation */
2420         if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2421                 txctl &= ~Tx_EnLCarr;
2422 #endif
2423 #endif /* !NO_CHECK_CARRIER */
2424 #ifdef GATHER_TXINT
2425         txctl &= ~Tx_EnComp;    /* disable global tx completion int. */
2426 #endif
2427         tc_writel(txctl, &tr->Tx_Ctl);
2428 }
2429
2430 #ifdef CONFIG_PM
2431 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2432 {
2433         struct net_device *dev = pci_get_drvdata(pdev);
2434         struct tc35815_local *lp = netdev_priv(dev);
2435         unsigned long flags;
2436
2437         pci_save_state(pdev);
2438         if (!netif_running(dev))
2439                 return 0;
2440         netif_device_detach(dev);
2441         if (lp->phy_dev)
2442                 phy_stop(lp->phy_dev);
2443         spin_lock_irqsave(&lp->lock, flags);
2444         tc35815_chip_reset(dev);
2445         spin_unlock_irqrestore(&lp->lock, flags);
2446         pci_set_power_state(pdev, PCI_D3hot);
2447         return 0;
2448 }
2449
2450 static int tc35815_resume(struct pci_dev *pdev)
2451 {
2452         struct net_device *dev = pci_get_drvdata(pdev);
2453         struct tc35815_local *lp = netdev_priv(dev);
2454
2455         pci_restore_state(pdev);
2456         if (!netif_running(dev))
2457                 return 0;
2458         pci_set_power_state(pdev, PCI_D0);
2459         tc35815_restart(dev);
2460         netif_carrier_off(dev);
2461         if (lp->phy_dev)
2462                 phy_start(lp->phy_dev);
2463         netif_device_attach(dev);
2464         return 0;
2465 }
2466 #endif /* CONFIG_PM */
2467
2468 static struct pci_driver tc35815_pci_driver = {
2469         .name           = MODNAME,
2470         .id_table       = tc35815_pci_tbl,
2471         .probe          = tc35815_init_one,
2472         .remove         = __devexit_p(tc35815_remove_one),
2473 #ifdef CONFIG_PM
2474         .suspend        = tc35815_suspend,
2475         .resume         = tc35815_resume,
2476 #endif
2477 };
2478
2479 module_param_named(speed, options.speed, int, 0);
2480 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2481 module_param_named(duplex, options.duplex, int, 0);
2482 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2483
2484 static int __init tc35815_init_module(void)
2485 {
2486         return pci_register_driver(&tc35815_pci_driver);
2487 }
2488
2489 static void __exit tc35815_cleanup_module(void)
2490 {
2491         pci_unregister_driver(&tc35815_pci_driver);
2492 }
2493
2494 module_init(tc35815_init_module);
2495 module_exit(tc35815_cleanup_module);
2496
2497 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2498 MODULE_LICENSE("GPL");