2 * Powermac setup and early boot code plus other random bits.
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * Adapted for Power Macintosh by Paul Mackerras
8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
23 * bootup setup stuff..
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/kernel.h>
31 #include <linux/stddef.h>
32 #include <linux/unistd.h>
33 #include <linux/ptrace.h>
34 #include <linux/slab.h>
35 #include <linux/user.h>
36 #include <linux/a.out.h>
37 #include <linux/tty.h>
38 #include <linux/string.h>
39 #include <linux/delay.h>
40 #include <linux/ioport.h>
41 #include <linux/major.h>
42 #include <linux/initrd.h>
43 #include <linux/vt_kern.h>
44 #include <linux/console.h>
45 #include <linux/pci.h>
46 #include <linux/adb.h>
47 #include <linux/cuda.h>
48 #include <linux/pmu.h>
49 #include <linux/irq.h>
50 #include <linux/seq_file.h>
51 #include <linux/root_dev.h>
52 #include <linux/bitops.h>
53 #include <linux/suspend.h>
56 #include <asm/sections.h>
58 #include <asm/system.h>
59 #include <asm/pgtable.h>
61 #include <asm/kexec.h>
62 #include <asm/pci-bridge.h>
63 #include <asm/ohare.h>
64 #include <asm/mediabay.h>
65 #include <asm/machdep.h>
67 #include <asm/cputable.h>
68 #include <asm/btext.h>
69 #include <asm/pmac_feature.h>
71 #include <asm/of_device.h>
72 #include <asm/of_platform.h>
73 #include <asm/mmu_context.h>
74 #include <asm/iommu.h>
82 #undef SHOW_GATWICK_IRQS
84 int ppc_override_l2cr = 0;
85 int ppc_override_l2cr_value;
90 static int current_root_goodness = -1;
92 extern struct machdep_calls pmac_md;
94 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
101 extern void zs_kgdb_hook(int tty_num);
103 sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
104 EXPORT_SYMBOL(sys_ctrler);
106 #ifdef CONFIG_PMAC_SMU
107 unsigned long smu_cmdbuf_abs;
108 EXPORT_SYMBOL(smu_cmdbuf_abs);
112 extern struct smp_ops_t psurge_smp_ops;
113 extern struct smp_ops_t core99_smp_ops;
114 #endif /* CONFIG_SMP */
116 static void pmac_show_cpuinfo(struct seq_file *m)
118 struct device_node *np;
122 unsigned int mbflags;
125 mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
126 PMAC_MB_INFO_MODEL, 0);
127 mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
128 PMAC_MB_INFO_FLAGS, 0);
129 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
130 (long) &mbname) != 0)
133 /* find motherboard type */
134 seq_printf(m, "machine\t\t: ");
135 np = of_find_node_by_path("/");
137 pp = of_get_property(np, "model", NULL);
139 seq_printf(m, "%s\n", pp);
141 seq_printf(m, "PowerMac\n");
142 pp = of_get_property(np, "compatible", &plen);
144 seq_printf(m, "motherboard\t:");
146 int l = strlen(pp) + 1;
147 seq_printf(m, " %s", pp);
155 seq_printf(m, "PowerMac\n");
157 /* print parsed model */
158 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
159 seq_printf(m, "pmac flags\t: %08x\n", mbflags);
161 /* find l2 cache info */
162 np = of_find_node_by_name(NULL, "l2-cache");
164 np = of_find_node_by_type(NULL, "cache");
166 const unsigned int *ic =
167 of_get_property(np, "i-cache-size", NULL);
168 const unsigned int *dc =
169 of_get_property(np, "d-cache-size", NULL);
170 seq_printf(m, "L2 cache\t:");
172 if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
173 seq_printf(m, " %dK unified", *dc / 1024);
176 seq_printf(m, " %dK instruction", *ic / 1024);
178 seq_printf(m, "%s %dK data",
179 (ic? " +": ""), *dc / 1024);
181 pp = of_get_property(np, "ram-type", NULL);
183 seq_printf(m, " %s", pp);
188 /* Indicate newworld/oldworld */
189 seq_printf(m, "pmac-generation\t: %s\n",
190 pmac_newworld ? "NewWorld" : "OldWorld");
193 #ifndef CONFIG_ADB_CUDA
194 int find_via_cuda(void)
196 struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
201 printk("WARNING ! Your machine is CUDA-based but your kernel\n");
202 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
207 #ifndef CONFIG_ADB_PMU
208 int find_via_pmu(void)
210 struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
215 printk("WARNING ! Your machine is PMU-based but your kernel\n");
216 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
221 #ifndef CONFIG_PMAC_SMU
224 /* should check and warn if SMU is present */
230 static volatile u32 *sysctrl_regs;
232 static void __init ohare_init(void)
234 struct device_node *dn;
236 /* this area has the CPU identification register
237 and some registers used by smp boards */
238 sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
241 * Turn on the L2 cache.
242 * We assume that we have a PSX memory controller iff
243 * we have an ohare I/O controller.
245 dn = of_find_node_by_name(NULL, "ohare");
248 if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
249 if (sysctrl_regs[4] & 0x10)
250 sysctrl_regs[4] |= 0x04000020;
252 sysctrl_regs[4] |= 0x04000000;
254 printk(KERN_INFO "Level 2 cache enabled\n");
259 static void __init l2cr_init(void)
261 /* Checks "l2cr-value" property in the registry */
262 if (cpu_has_feature(CPU_FTR_L2CR)) {
263 struct device_node *np = of_find_node_by_name(NULL, "cpus");
265 np = of_find_node_by_type(NULL, "cpu");
267 const unsigned int *l2cr =
268 of_get_property(np, "l2cr-value", NULL);
270 ppc_override_l2cr = 1;
271 ppc_override_l2cr_value = *l2cr;
273 _set_L2CR(ppc_override_l2cr_value);
279 if (ppc_override_l2cr)
280 printk(KERN_INFO "L2CR overridden (0x%x), "
281 "backside cache is %s\n",
282 ppc_override_l2cr_value,
283 (ppc_override_l2cr_value & 0x80000000)
284 ? "enabled" : "disabled");
288 static void __init pmac_setup_arch(void)
290 struct device_node *cpu, *ic;
294 pvr = PVR_VER(mfspr(SPRN_PVR));
296 /* Set loops_per_jiffy to a half-way reasonable value,
297 for use until calibrate_delay gets called. */
298 loops_per_jiffy = 50000000 / HZ;
299 cpu = of_find_node_by_type(NULL, "cpu");
301 fp = of_get_property(cpu, "clock-frequency", NULL);
303 if (pvr >= 0x30 && pvr < 0x80)
305 loops_per_jiffy = *fp / (3 * HZ);
306 else if (pvr == 4 || pvr >= 8)
307 /* 604, G3, G4 etc. */
308 loops_per_jiffy = *fp / HZ;
311 loops_per_jiffy = *fp / (2 * HZ);
316 /* See if newworld or oldworld */
317 for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
318 if (of_get_property(ic, "interrupt-controller", NULL))
325 /* Lookup PCI hosts */
331 #endif /* CONFIG_PPC32 */
341 #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64)
346 #ifdef CONFIG_BLK_DEV_INITRD
348 ROOT_DEV = Root_RAM0;
351 ROOT_DEV = DEFAULT_ROOT_DEVICE;
355 /* Check for Core99 */
356 ic = of_find_node_by_name(NULL, "uni-n");
358 ic = of_find_node_by_name(NULL, "u3");
360 ic = of_find_node_by_name(NULL, "u4");
363 smp_ops = &core99_smp_ops;
368 * We have to set bits in cpu_possible_map here since the
369 * secondary CPU(s) aren't in the device tree, and
370 * setup_per_cpu_areas only allocates per-cpu data for
371 * CPUs in the cpu_possible_map.
375 for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
376 cpu_set(cpu, cpu_possible_map);
377 smp_ops = &psurge_smp_ops;
380 #endif /* CONFIG_SMP */
383 if (strstr(cmd_line, "adb_sync")) {
384 extern int __adb_probe_sync;
385 __adb_probe_sync = 1;
387 #endif /* CONFIG_ADB */
395 static dev_t boot_dev;
398 void note_scsi_host(struct device_node *node, void *host)
403 l = strlen(node->full_name);
404 if (bootpath != NULL && bootdevice != NULL
405 && strncmp(node->full_name, bootdevice, l) == 0
406 && (bootdevice[l] == '/' || bootdevice[l] == 0)) {
409 * There's a bug in OF 1.0.5. (Why am I not surprised.)
410 * If you pass a path like scsi/sd@1:0 to canon, it returns
411 * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0
412 * That is, the scsi target number doesn't get preserved.
413 * So we pick the target number out of bootpath and use that.
415 p = strstr(bootpath, "/sd@");
418 boot_target = simple_strtoul(p, NULL, 10);
421 boot_part = simple_strtoul(p + 1, NULL, 10);
425 EXPORT_SYMBOL(note_scsi_host);
428 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
429 static dev_t __init find_ide_boot(void)
433 dev_t __init pmac_find_ide_boot(char *bootdevice, int n);
435 if (bootdevice == NULL)
437 p = strrchr(bootdevice, '/');
442 return pmac_find_ide_boot(bootdevice, n);
444 #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */
446 static void __init find_boot_device(void)
448 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
449 boot_dev = find_ide_boot();
453 static int initializing = 1;
455 static int pmac_late_init(void)
458 /* this is udbg (which is __init) and we can later use it during
459 * cpu hotplug (in smp_core99_kick_cpu) */
460 ppc_md.progress = NULL;
464 late_initcall(pmac_late_init);
466 /* can't be __init - can be called whenever a disk is first accessed */
467 void note_bootable_part(dev_t dev, int part, int goodness)
469 static int found_boot = 0;
474 if ((goodness <= current_root_goodness) &&
475 ROOT_DEV != DEFAULT_ROOT_DEVICE)
477 p = strstr(boot_command_line, "root=");
478 if (p != NULL && (p == boot_command_line || p[-1] == ' '))
485 if (!boot_dev || dev == boot_dev) {
486 ROOT_DEV = dev + part;
488 current_root_goodness = goodness;
492 #ifdef CONFIG_ADB_CUDA
493 static void cuda_restart(void)
495 struct adb_request req;
497 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
502 static void cuda_shutdown(void)
504 struct adb_request req;
506 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
512 #define cuda_restart()
513 #define cuda_shutdown()
516 #ifndef CONFIG_ADB_PMU
517 #define pmu_restart()
518 #define pmu_shutdown()
521 #ifndef CONFIG_PMAC_SMU
522 #define smu_restart()
523 #define smu_shutdown()
526 static void pmac_restart(char *cmd)
528 switch (sys_ctrler) {
529 case SYS_CTRLER_CUDA:
542 static void pmac_power_off(void)
544 switch (sys_ctrler) {
545 case SYS_CTRLER_CUDA:
565 * Early initialization.
567 static void __init pmac_init_early(void)
569 /* Enable early btext debug if requested */
570 if (strstr(cmd_line, "btextdbg")) {
571 udbg_adb_init_early();
572 register_early_udbg_console();
575 /* Probe motherboard chipset */
578 /* Initialize debug stuff */
579 udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
580 udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
583 iommu_init_early_dart();
587 static int __init pmac_declare_of_platform_devices(void)
589 struct device_node *np;
591 if (machine_is(chrp))
594 if (!machine_is(powermac))
597 np = of_find_node_by_name(NULL, "valkyrie");
599 of_platform_device_create(np, "valkyrie", NULL);
600 np = of_find_node_by_name(NULL, "platinum");
602 of_platform_device_create(np, "platinum", NULL);
603 np = of_find_node_by_type(NULL, "smu");
605 of_platform_device_create(np, "smu", NULL);
612 device_initcall(pmac_declare_of_platform_devices);
615 * Called very early, MMU is off, device-tree isn't unflattened
617 static int __init pmac_probe(void)
619 unsigned long root = of_get_flat_dt_root();
621 if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
622 !of_flat_dt_is_compatible(root, "MacRISC"))
627 * On U3, the DART (iommu) must be allocated now since it
628 * has an impact on htab_initialize (due to the large page it
629 * occupies having to be broken up so the DART itself is not
630 * part of the cacheable linar mapping
638 /* isa_io_base gets set in pmac_pci_init */
639 ISA_DMA_THRESHOLD = ~0L;
643 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
644 #ifdef CONFIG_BLK_DEV_IDE_PMAC
645 ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports;
646 ppc_ide_md.default_io_base = pmac_ide_get_base;
647 #endif /* CONFIG_BLK_DEV_IDE_PMAC */
648 #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
650 #endif /* CONFIG_PPC32 */
652 #ifdef CONFIG_PMAC_SMU
654 * SMU based G5s need some memory below 2Gb, at least the current
655 * driver needs that. We have to allocate it now. We allocate 4k
656 * (1 small page) for now.
658 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
659 #endif /* CONFIG_PMAC_SMU */
665 /* Move that to pci.c */
666 static int pmac_pci_probe_mode(struct pci_bus *bus)
668 struct device_node *node = bus->sysdata;
670 /* We need to use normal PCI probing for the AGP bus,
671 * since the device for the AGP bridge isn't in the tree.
673 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
674 of_device_is_compatible(node, "u4-pcie")))
675 return PCI_PROBE_NORMAL;
676 return PCI_PROBE_DEVTREE;
679 #ifdef CONFIG_HOTPLUG_CPU
680 /* access per cpu vars from generic smp.c */
681 DECLARE_PER_CPU(int, cpu_state);
683 static void pmac_cpu_die(void)
686 * turn off as much as possible, we'll be
687 * kicked out as this will only be invoked
688 * on core99 platforms for now ...
691 printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
692 __get_cpu_var(cpu_state) = CPU_DEAD;
696 * during the path that leads here preemption is disabled,
697 * reenable it now so that when coming up preempt count is
703 * hard-disable interrupts for the non-NAP case, the NAP code
704 * needs to re-enable interrupts (but soft-disables them)
709 /* let's not take timer interrupts too often ... */
712 /* should always be true at this point */
713 if (cpu_has_feature(CPU_FTR_CAN_NAP))
714 power4_cpu_offline_powersave();
721 #endif /* CONFIG_HOTPLUG_CPU */
723 #endif /* CONFIG_PPC64 */
725 define_machine(powermac) {
728 .setup_arch = pmac_setup_arch,
729 .init_early = pmac_init_early,
730 .show_cpuinfo = pmac_show_cpuinfo,
731 .init_IRQ = pmac_pic_init,
732 .get_irq = NULL, /* changed later */
733 .pci_irq_fixup = pmac_pci_irq_fixup,
734 .restart = pmac_restart,
735 .power_off = pmac_power_off,
737 .time_init = pmac_time_init,
738 .get_boot_time = pmac_get_boot_time,
739 .set_rtc_time = pmac_set_rtc_time,
740 .get_rtc_time = pmac_get_rtc_time,
741 .calibrate_decr = pmac_calibrate_decr,
742 .feature_call = pmac_do_feature_call,
743 .progress = udbg_progress,
745 .pci_probe_mode = pmac_pci_probe_mode,
746 .power_save = power4_idle,
747 .enable_pmcs = power4_enable_pmcs,
749 .machine_kexec = default_machine_kexec,
750 .machine_kexec_prepare = default_machine_kexec_prepare,
751 .machine_crash_shutdown = default_machine_crash_shutdown,
753 #endif /* CONFIG_PPC64 */
755 .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
756 .pcibios_after_init = pmac_pcibios_after_init,
757 .phys_mem_access_prot = pci_phys_mem_access_prot,
759 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
760 .cpu_die = pmac_cpu_die,