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   1 /*
   2  * Copyright (c) 2002-2003,2006 Silicon Graphics, Inc.  All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of version 2 of the GNU General Public License
   6  * as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it would be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11  *
  12  * Further, this software is distributed without any warranty that it is
  13  * free of the rightful claim of any third person regarding infringement
  14  * or the like.  Any license provided herein, whether implied or
  15  * otherwise, applies only to this software file.  Patent licenses, if
  16  * any, provided herein do not apply to combinations of this program with
  17  * other software, or any other product whatsoever.
  18  *
  19  * You should have received a copy of the GNU General Public
  20  * License along with this program; if not, write the Free Software
  21  * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  22  *
  23  * For further information regarding this notice, see:
  24  *
  25  * http://oss.sgi.com/projects/GenInfo/NoticeExplan
  26  */
  27
  28 #ifndef _ASM_IA64_MACHVEC_SN2_H
  29 #define _ASM_IA64_MACHVEC_SN2_H
  30
  31 extern ia64_mv_setup_t sn_setup;
  32 extern ia64_mv_cpu_init_t sn_cpu_init;
  33 extern ia64_mv_irq_init_t sn_irq_init;
  34 extern ia64_mv_send_ipi_t sn2_send_IPI;
  35 extern ia64_mv_timer_interrupt_t sn_timer_interrupt;
  36 extern ia64_mv_global_tlb_purge_t sn2_global_tlb_purge;
  37 extern ia64_mv_tlb_migrate_finish_t     sn_tlb_migrate_finish;
  38 extern ia64_mv_irq_to_vector sn_irq_to_vector;
  39 extern ia64_mv_local_vector_to_irq sn_local_vector_to_irq;
  40 extern ia64_mv_pci_get_legacy_mem_t sn_pci_get_legacy_mem;
  41 extern ia64_mv_pci_legacy_read_t sn_pci_legacy_read;
  42 extern ia64_mv_pci_legacy_write_t sn_pci_legacy_write;
  43 extern ia64_mv_inb_t __sn_inb;
  44 extern ia64_mv_inw_t __sn_inw;
  45 extern ia64_mv_inl_t __sn_inl;
  46 extern ia64_mv_outb_t __sn_outb;
  47 extern ia64_mv_outw_t __sn_outw;
  48 extern ia64_mv_outl_t __sn_outl;
  49 extern ia64_mv_mmiowb_t __sn_mmiowb;
  50 extern ia64_mv_readb_t __sn_readb;
  51 extern ia64_mv_readw_t __sn_readw;
  52 extern ia64_mv_readl_t __sn_readl;
  53 extern ia64_mv_readq_t __sn_readq;
  54 extern ia64_mv_readb_t __sn_readb_relaxed;
  55 extern ia64_mv_readw_t __sn_readw_relaxed;
  56 extern ia64_mv_readl_t __sn_readl_relaxed;
  57 extern ia64_mv_readq_t __sn_readq_relaxed;
  58 extern ia64_mv_dma_alloc_coherent       sn_dma_alloc_coherent;
  59 extern ia64_mv_dma_free_coherent        sn_dma_free_coherent;
  60 extern ia64_mv_dma_map_single_attrs     sn_dma_map_single_attrs;
  61 extern ia64_mv_dma_unmap_single_attrs   sn_dma_unmap_single_attrs;
  62 extern ia64_mv_dma_map_sg_attrs         sn_dma_map_sg_attrs;
  63 extern ia64_mv_dma_unmap_sg_attrs       sn_dma_unmap_sg_attrs;
  64 extern ia64_mv_dma_sync_single_for_cpu  sn_dma_sync_single_for_cpu;
  65 extern ia64_mv_dma_sync_sg_for_cpu      sn_dma_sync_sg_for_cpu;
  66 extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device;
  67 extern ia64_mv_dma_sync_sg_for_device   sn_dma_sync_sg_for_device;
  68 extern ia64_mv_dma_mapping_error        sn_dma_mapping_error;
  69 extern ia64_mv_dma_supported            sn_dma_supported;
  70 extern ia64_mv_migrate_t                sn_migrate;
  71 extern ia64_mv_kernel_launch_event_t    sn_kernel_launch_event;
  72 extern ia64_mv_setup_msi_irq_t          sn_setup_msi_irq;
  73 extern ia64_mv_teardown_msi_irq_t       sn_teardown_msi_irq;
  74 extern ia64_mv_pci_fixup_bus_t          sn_pci_fixup_bus;
  75
  76
  77 /*
  78  * This stuff has dual use!
  79  *
  80  * For a generic kernel, the macros are used to initialize the
  81  * platform's machvec structure.  When compiling a non-generic kernel,
  82  * the macros are used directly.
  83  */
  84 #define platform_name                   "sn2"
  85 #define platform_setup                  sn_setup
  86 #define platform_cpu_init               sn_cpu_init
  87 #define platform_irq_init               sn_irq_init
  88 #define platform_send_ipi               sn2_send_IPI
  89 #define platform_timer_interrupt        sn_timer_interrupt
  90 #define platform_global_tlb_purge       sn2_global_tlb_purge
  91 #define platform_tlb_migrate_finish     sn_tlb_migrate_finish
  92 #define platform_pci_fixup              sn_pci_fixup
  93 #define platform_inb                    __sn_inb
  94 #define platform_inw                    __sn_inw
  95 #define platform_inl                    __sn_inl
  96 #define platform_outb                   __sn_outb
  97 #define platform_outw                   __sn_outw
  98 #define platform_outl                   __sn_outl
  99 #define platform_mmiowb                 __sn_mmiowb
 100 #define platform_readb                  __sn_readb
 101 #define platform_readw                  __sn_readw
 102 #define platform_readl                  __sn_readl
 103 #define platform_readq                  __sn_readq
 104 #define platform_readb_relaxed          __sn_readb_relaxed
 105 #define platform_readw_relaxed          __sn_readw_relaxed
 106 #define platform_readl_relaxed          __sn_readl_relaxed
 107 #define platform_readq_relaxed          __sn_readq_relaxed
 108 #define platform_irq_to_vector          sn_irq_to_vector
 109 #define platform_local_vector_to_irq    sn_local_vector_to_irq
 110 #define platform_pci_get_legacy_mem     sn_pci_get_legacy_mem
 111 #define platform_pci_legacy_read        sn_pci_legacy_read
 112 #define platform_pci_legacy_write       sn_pci_legacy_write
 113 #define platform_dma_init               machvec_noop
 114 #define platform_dma_alloc_coherent     sn_dma_alloc_coherent
 115 #define platform_dma_free_coherent      sn_dma_free_coherent
 116 #define platform_dma_map_single_attrs   sn_dma_map_single_attrs
 117 #define platform_dma_unmap_single_attrs sn_dma_unmap_single_attrs
 118 #define platform_dma_map_sg_attrs       sn_dma_map_sg_attrs
 119 #define platform_dma_unmap_sg_attrs     sn_dma_unmap_sg_attrs
 120 #define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu
 121 #define platform_dma_sync_sg_for_cpu    sn_dma_sync_sg_for_cpu
 122 #define platform_dma_sync_single_for_device sn_dma_sync_single_for_device
 123 #define platform_dma_sync_sg_for_device sn_dma_sync_sg_for_device
 124 #define platform_dma_mapping_error              sn_dma_mapping_error
 125 #define platform_dma_supported          sn_dma_supported
 126 #define platform_migrate                sn_migrate
 127 #define platform_kernel_launch_event    sn_kernel_launch_event
 128 #ifdef CONFIG_PCI_MSI
 129 #define platform_setup_msi_irq          sn_setup_msi_irq
 130 #define platform_teardown_msi_irq       sn_teardown_msi_irq
 131 #else
 132 #define platform_setup_msi_irq          ((ia64_mv_setup_msi_irq_t*)NULL)
 133 #define platform_teardown_msi_irq       ((ia64_mv_teardown_msi_irq_t*)NULL)
 134 #endif
 135 #define platform_pci_fixup_bus          sn_pci_fixup_bus
 136
 137 #include <asm/sn/io.h>
 138
 139 #endif /* _ASM_IA64_MACHVEC_SN2_H */